From: Peter Maydell <peter.maydell@linaro.org>
To: Dorjoy Chowdhury <dorjoychy111@gmail.com>
Cc: qemu-devel@nongnu.org
Subject: Re: [PATCH] target/arm: fix MPIDR value for ARM CPUs with SMT
Date: Sat, 4 May 2024 14:31:00 +0100 [thread overview]
Message-ID: <CAFEAcA-CGkdi2jzHLM6oKQTKwqVXVUe_F+0nrTDuoV3XFeZuzw@mail.gmail.com> (raw)
In-Reply-To: <CAFfO_h4zNuk0xuxaiGAMPcaQR5+CGuSnE7sr6OY8r-yiGow_ow@mail.gmail.com>
On Fri, 3 May 2024 at 19:14, Dorjoy Chowdhury <dorjoychy111@gmail.com> wrote:
>
> On Fri, May 3, 2024 at 10:28 PM Peter Maydell <peter.maydell@linaro.org> wrote:
> > In the meantime, there is one tiny bit of this that we can
> > do now:
> >
> > > diff --git a/hw/arm/npcm7xx.c b/hw/arm/npcm7xx.c
> > > index cc68b5d8f1..9d5dcf1a3f 100644
> > > --- a/hw/arm/npcm7xx.c
> > > +++ b/hw/arm/npcm7xx.c
> > > @@ -487,7 +487,7 @@ static void npcm7xx_realize(DeviceState *dev, Error **errp)
> > > /* CPUs */
> > > for (i = 0; i < nc->num_cpus; i++) {
> > > object_property_set_int(OBJECT(&s->cpu[i]), "mp-affinity",
> > > - arm_build_mp_affinity(i, NPCM7XX_MAX_NUM_CPUS),
> > > + arm_build_mp_affinity(ARM_CPU(&s->cpu[i]), i, NPCM7XX_MAX_NUM_CPUS),
> > > &error_abort);
> > > object_property_set_int(OBJECT(&s->cpu[i]), "reset-cbar",
> > > NPCM7XX_GIC_CPU_IF_ADDR, &error_abort);
> >
> > In this file, the value of the mp-affinity property that the
> > board is setting is always the same as the default value it
> > would have anyway. So we can delete the call to
> > object_property_set_int() entirely, which gives us one fewer
> > place we need to deal with when we do eventually figure out
> > how the MPIDR values should work.
> >
>
> Before I send the patch removing the "object_property_set_int" line
> for "mp-affinity", just so that I understand, where else is it that
> for npcm7xx the mp_affinity is being set? I can't follow the code
> easily and I am not seeing where else it is being set to the same
> value. It's a bit hard to follow the initialization codes in QEMU.
The value that npcm7xx sets here is identical to the default value
that the Arm CPU will use if we don't set the property at all.
If the board doesn't set the property then the cpu mp_affinity field
is left at its default of ARM64_AFFINITY_INVALID, which then causes
arm_cpu_realizefn() to set it to the result of
arm_build_mp_affinity(cs->cpu_index, ARM_DEFAULT_CPUS_PER_CLUSTER)
Although ARM_DEFAULT_CPUS_PER_CLUSTER and NPCM7XX_MAX_NUM_CPUS are
different, the number of CPUs on an npcm7xx is always exactly 2,
so we never get to a CPU number high enough for that difference
to cause the mp_affinity value to be different from the default.
(The two CPUs get an mp_affinity of 0 and 1.)
thanks
-- PMM
next prev parent reply other threads:[~2024-05-04 13:32 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-04-19 18:31 [PATCH] target/arm: fix MPIDR value for ARM CPUs with SMT Dorjoy Chowdhury
2024-04-21 5:40 ` Richard Henderson
2024-04-21 8:40 ` Dorjoy Chowdhury
2024-04-22 10:46 ` Peter Maydell
2024-04-22 11:26 ` Peter Maydell
2024-04-22 15:21 ` Richard Henderson
2024-04-22 15:24 ` Richard Henderson
2024-05-01 18:08 ` Marcin Juszkiewicz
2024-05-02 9:11 ` Peter Maydell
2024-05-02 10:37 ` Peter Maydell
2024-05-02 10:56 ` Marcin Juszkiewicz
2024-05-02 11:40 ` Peter Maydell
2024-04-25 16:46 ` Dorjoy Chowdhury
2024-05-02 12:14 ` Marcin Juszkiewicz
2024-05-02 13:04 ` Dorjoy Chowdhury
2024-05-02 13:11 ` Marcin Juszkiewicz
2024-05-02 13:13 ` Peter Maydell
2024-05-02 13:50 ` Marcin Juszkiewicz
2024-05-02 13:57 ` Peter Maydell
2024-05-03 16:28 ` Peter Maydell
2024-05-03 16:52 ` Dorjoy Chowdhury
2024-05-31 12:52 ` Peter Maydell
2024-05-31 13:46 ` Dorjoy Chowdhury
2024-05-03 18:14 ` Dorjoy Chowdhury
2024-05-04 13:31 ` Peter Maydell [this message]
2024-05-04 14:20 ` Dorjoy Chowdhury
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