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From: Anup Patel <anup@brainfault.org>
To: Marc Zyngier <maz@kernel.org>
Cc: Anup Patel <anup.patel@wdc.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Palmer Dabbelt <palmerdabbelt@google.com>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Thomas Gleixner <tglx@linutronix.de>,
	Daniel Lezcano <daniel.lezcano@linaro.org>,
	Rob Herring <robh+dt@kernel.org>,
	Atish Patra <atish.patra@wdc.com>,
	Alistair Francis <Alistair.Francis@wdc.com>,
	linux-riscv <linux-riscv@lists.infradead.org>,
	"linux-kernel@vger.kernel.org List"
	<linux-kernel@vger.kernel.org>, DTML <devicetree@vger.kernel.org>
Subject: Re: [RFC PATCH v1 04/10] RISC-V: Use IPIs for remote TLB flush when possible
Date: Sun, 13 Jun 2021 17:58:39 +0530	[thread overview]
Message-ID: <CAAhSdy1-VbEwmWbYzB4KmCK3HjDXzi5-3S+9BS-D3o6q0iOY9g@mail.gmail.com> (raw)
In-Reply-To: <87a6nut8h9.wl-maz@kernel.org>

On Sun, Jun 13, 2021 at 3:03 PM Marc Zyngier <maz@kernel.org> wrote:
>
> On Sat, 12 Jun 2021 17:04:16 +0100,
> Anup Patel <anup.patel@wdc.com> wrote:
> >
> > If IPI calls are injected using SBI IPI calls then remote TLB flush
> > using SBI RFENCE calls is much faster because using IPIs for remote
> > TLB flush would still endup as SBI IPI calls with extra processing
> > on kernel side.
> >
> > It is now possible to have specialized hardware (such as RISC-V AIA)
> > which allows S-mode software to directly inject IPIs without any
> > assistance from M-mode runtime firmware.
> >
> > This patch extends remote TLB flush functions to use IPIs whenever
> > underlying IPI operations are suitable for remote FENCEs.
> >
> > Signed-off-by: Anup Patel <anup.patel@wdc.com>
> > ---
> >  arch/riscv/mm/tlbflush.c | 62 +++++++++++++++++++++++++++++++---------
> >  1 file changed, 48 insertions(+), 14 deletions(-)
> >
> > diff --git a/arch/riscv/mm/tlbflush.c b/arch/riscv/mm/tlbflush.c
> > index 720b443c4528..009c56fa102d 100644
> > --- a/arch/riscv/mm/tlbflush.c
> > +++ b/arch/riscv/mm/tlbflush.c
> > @@ -1,39 +1,73 @@
> >  // SPDX-License-Identifier: GPL-2.0
> > +/*
> > + * TLB flush implementation.
> > + *
> > + * Copyright (c) 2021 Western Digital Corporation or its affiliates.
> > + */
>
> I find this a bit odd. You don't mention this addition in the commit
> message, and a quick look at the commits touching tlbflush.[ch]
> doesn't make the copyright assignment obvious (most commits originate
> from either SiFive or Christoph).
>
> In any way, please keep this kind of changes out of this series if
> possible, and have a separate discussion on who gets to brag about
> this code.

I agree it's unrelated change.

The commit history suggest mm/tlbflush.c was added by Christoph
and other commits after that are from Atish (Western Digital).

I will sort this out separately.

Regards,
Anup

>
> Thanks,
>
>         M.
>
> --
> Without deviation from the norm, progress is not possible.

WARNING: multiple messages have this Message-ID (diff)
From: Anup Patel <anup@brainfault.org>
To: Marc Zyngier <maz@kernel.org>
Cc: Anup Patel <anup.patel@wdc.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	 Palmer Dabbelt <palmerdabbelt@google.com>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	 Thomas Gleixner <tglx@linutronix.de>,
	Daniel Lezcano <daniel.lezcano@linaro.org>,
	 Rob Herring <robh+dt@kernel.org>,
	Atish Patra <atish.patra@wdc.com>,
	 Alistair Francis <Alistair.Francis@wdc.com>,
	linux-riscv <linux-riscv@lists.infradead.org>,
	 "linux-kernel@vger.kernel.org List"
	<linux-kernel@vger.kernel.org>, DTML <devicetree@vger.kernel.org>
Subject: Re: [RFC PATCH v1 04/10] RISC-V: Use IPIs for remote TLB flush when possible
Date: Sun, 13 Jun 2021 17:58:39 +0530	[thread overview]
Message-ID: <CAAhSdy1-VbEwmWbYzB4KmCK3HjDXzi5-3S+9BS-D3o6q0iOY9g@mail.gmail.com> (raw)
In-Reply-To: <87a6nut8h9.wl-maz@kernel.org>

On Sun, Jun 13, 2021 at 3:03 PM Marc Zyngier <maz@kernel.org> wrote:
>
> On Sat, 12 Jun 2021 17:04:16 +0100,
> Anup Patel <anup.patel@wdc.com> wrote:
> >
> > If IPI calls are injected using SBI IPI calls then remote TLB flush
> > using SBI RFENCE calls is much faster because using IPIs for remote
> > TLB flush would still endup as SBI IPI calls with extra processing
> > on kernel side.
> >
> > It is now possible to have specialized hardware (such as RISC-V AIA)
> > which allows S-mode software to directly inject IPIs without any
> > assistance from M-mode runtime firmware.
> >
> > This patch extends remote TLB flush functions to use IPIs whenever
> > underlying IPI operations are suitable for remote FENCEs.
> >
> > Signed-off-by: Anup Patel <anup.patel@wdc.com>
> > ---
> >  arch/riscv/mm/tlbflush.c | 62 +++++++++++++++++++++++++++++++---------
> >  1 file changed, 48 insertions(+), 14 deletions(-)
> >
> > diff --git a/arch/riscv/mm/tlbflush.c b/arch/riscv/mm/tlbflush.c
> > index 720b443c4528..009c56fa102d 100644
> > --- a/arch/riscv/mm/tlbflush.c
> > +++ b/arch/riscv/mm/tlbflush.c
> > @@ -1,39 +1,73 @@
> >  // SPDX-License-Identifier: GPL-2.0
> > +/*
> > + * TLB flush implementation.
> > + *
> > + * Copyright (c) 2021 Western Digital Corporation or its affiliates.
> > + */
>
> I find this a bit odd. You don't mention this addition in the commit
> message, and a quick look at the commits touching tlbflush.[ch]
> doesn't make the copyright assignment obvious (most commits originate
> from either SiFive or Christoph).
>
> In any way, please keep this kind of changes out of this series if
> possible, and have a separate discussion on who gets to brag about
> this code.

I agree it's unrelated change.

The commit history suggest mm/tlbflush.c was added by Christoph
and other commits after that are from Atish (Western Digital).

I will sort this out separately.

Regards,
Anup

>
> Thanks,
>
>         M.
>
> --
> Without deviation from the norm, progress is not possible.

_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

  reply	other threads:[~2021-06-13 12:30 UTC|newest]

Thread overview: 50+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-06-12 16:04 [RFC PATCH v1 00/10] RISC-V ACLINT Support Anup Patel
2021-06-12 16:04 ` Anup Patel
2021-06-12 16:04 ` [RFC PATCH v1 01/10] RISC-V: Clear SIP bit only when using SBI IPI operations Anup Patel
2021-06-12 16:04   ` Anup Patel
2021-06-14 13:33   ` Bin Meng
2021-06-14 13:33     ` Bin Meng
2021-06-12 16:04 ` [RFC PATCH v1 02/10] RISC-V: Use common print prefix in smp.c Anup Patel
2021-06-12 16:04   ` Anup Patel
2021-06-14 13:33   ` Bin Meng
2021-06-14 13:33     ` Bin Meng
2021-06-12 16:04 ` [RFC PATCH v1 03/10] RISC-V: Allow more details in IPI operations Anup Patel
2021-06-12 16:04   ` Anup Patel
2021-06-12 16:04 ` [RFC PATCH v1 04/10] RISC-V: Use IPIs for remote TLB flush when possible Anup Patel
2021-06-12 16:04   ` Anup Patel
2021-06-13  9:33   ` Marc Zyngier
2021-06-13  9:33     ` Marc Zyngier
2021-06-13 12:28     ` Anup Patel [this message]
2021-06-13 12:28       ` Anup Patel
2021-06-12 16:04 ` [RFC PATCH v1 05/10] irqchip: Add ACLINT software interrupt driver Anup Patel
2021-06-12 16:04   ` Anup Patel
2021-06-13  9:41   ` Marc Zyngier
2021-06-13  9:41     ` Marc Zyngier
2021-06-13 12:25     ` Anup Patel
2021-06-13 12:25       ` Anup Patel
2021-06-14  9:38       ` Marc Zyngier
2021-06-14  9:38         ` Marc Zyngier
2021-06-14 13:13         ` Anup Patel
2021-06-14 13:13           ` Anup Patel
2021-06-12 16:04 ` [RFC PATCH v1 06/10] RISC-V: Select ACLINT SWI driver for virt machine Anup Patel
2021-06-12 16:04   ` Anup Patel
2021-06-14 13:34   ` Bin Meng
2021-06-14 13:34     ` Bin Meng
2021-06-12 16:04 ` [RFC PATCH v1 07/10] clocksource: clint: Add support for ACLINT MTIMER device Anup Patel
2021-06-12 16:04   ` Anup Patel
2021-06-14 13:34   ` Bin Meng
2021-06-14 13:34     ` Bin Meng
2021-06-12 16:04 ` [RFC PATCH v1 08/10] dt-bindings: timer: Add ACLINT MTIMER bindings Anup Patel
2021-06-12 16:04   ` Anup Patel
2021-06-14 13:34   ` Bin Meng
2021-06-14 13:34     ` Bin Meng
2021-06-12 16:04 ` [RFC PATCH v1 09/10] dt-bindings: timer: Add ACLINT MSWI and SSWI bindings Anup Patel
2021-06-12 16:04   ` Anup Patel
2021-06-14 13:34   ` Bin Meng
2021-06-14 13:34     ` Bin Meng
2021-06-24 19:37   ` Rob Herring
2021-06-24 19:37     ` Rob Herring
2021-06-12 16:04 ` [RFC PATCH v1 10/10] MAINTAINERS: Add entry for RISC-V ACLINT drivers Anup Patel
2021-06-12 16:04   ` Anup Patel
2021-06-14 13:34   ` Bin Meng
2021-06-14 13:34     ` Bin Meng

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