* [PATCH 1/1] net: sun8i-emac: fix MDIO frequency
@ 2021-06-03 7:52 Heinrich Schuchardt
2021-06-10 5:48 ` Ramon Fried
0 siblings, 1 reply; 3+ messages in thread
From: Heinrich Schuchardt @ 2021-06-03 7:52 UTC (permalink / raw)
To: Joe Hershberger, Ramon Fried
Cc: u-boot, Jagan Teki, Andre Przywara, Heinrich Schuchardt
Commit 4f0278dac56a ("net: sun8i-emac: Lower MDIO frequency") leads to
network failure on the OrangePi PC.
=> dhcp
sun8i_emac_eth_start: Timeout
According to the commit message the change of the MDIO frequency is only
required for external PHYs.
Fixes: 4f0278dac56a ("net: sun8i-emac: Lower MDIO frequency")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
---
drivers/net/sun8i_emac.c | 8 ++++++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/drivers/net/sun8i_emac.c b/drivers/net/sun8i_emac.c
index 5a1b38bf80..d7553fe163 100644
--- a/drivers/net/sun8i_emac.c
+++ b/drivers/net/sun8i_emac.c
@@ -211,7 +211,9 @@ static int sun8i_mdio_read(struct mii_dev *bus, int addr, int devad, int reg)
* The EMAC clock is either 200 or 300 MHz, so we need a divider
* of 128 to get the MDIO frequency below the required 2.5 MHz.
*/
- mii_cmd |= MDIO_CMD_MII_CLK_CSR_DIV_128 << MDIO_CMD_MII_CLK_CSR_SHIFT;
+ if (!priv->use_internal_phy)
+ mii_cmd |= MDIO_CMD_MII_CLK_CSR_DIV_128 <<
+ MDIO_CMD_MII_CLK_CSR_SHIFT;
mii_cmd |= MDIO_CMD_MII_BUSY;
@@ -242,7 +244,9 @@ static int sun8i_mdio_write(struct mii_dev *bus, int addr, int devad, int reg,
* The EMAC clock is either 200 or 300 MHz, so we need a divider
* of 128 to get the MDIO frequency below the required 2.5 MHz.
*/
- mii_cmd |= MDIO_CMD_MII_CLK_CSR_DIV_128 << MDIO_CMD_MII_CLK_CSR_SHIFT;
+ if (!priv->use_internal_phy)
+ mii_cmd |= MDIO_CMD_MII_CLK_CSR_DIV_128 <<
+ MDIO_CMD_MII_CLK_CSR_SHIFT;
mii_cmd |= MDIO_CMD_MII_WRITE;
mii_cmd |= MDIO_CMD_MII_BUSY;
--
2.31.0
^ permalink raw reply related [flat|nested] 3+ messages in thread* Re: [PATCH 1/1] net: sun8i-emac: fix MDIO frequency
2021-06-03 7:52 [PATCH 1/1] net: sun8i-emac: fix MDIO frequency Heinrich Schuchardt
@ 2021-06-10 5:48 ` Ramon Fried
2021-06-12 18:41 ` Ramon Fried
0 siblings, 1 reply; 3+ messages in thread
From: Ramon Fried @ 2021-06-10 5:48 UTC (permalink / raw)
To: Heinrich Schuchardt
Cc: Joe Hershberger, U-Boot Mailing List, Jagan Teki, Andre Przywara
On Thu, Jun 3, 2021 at 10:52 AM Heinrich Schuchardt <xypron.glpk@gmx.de> wrote:
>
> Commit 4f0278dac56a ("net: sun8i-emac: Lower MDIO frequency") leads to
> network failure on the OrangePi PC.
>
> => dhcp
> sun8i_emac_eth_start: Timeout
>
> According to the commit message the change of the MDIO frequency is only
> required for external PHYs.
>
> Fixes: 4f0278dac56a ("net: sun8i-emac: Lower MDIO frequency")
> Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
> ---
> drivers/net/sun8i_emac.c | 8 ++++++--
> 1 file changed, 6 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/net/sun8i_emac.c b/drivers/net/sun8i_emac.c
> index 5a1b38bf80..d7553fe163 100644
> --- a/drivers/net/sun8i_emac.c
> +++ b/drivers/net/sun8i_emac.c
> @@ -211,7 +211,9 @@ static int sun8i_mdio_read(struct mii_dev *bus, int addr, int devad, int reg)
> * The EMAC clock is either 200 or 300 MHz, so we need a divider
> * of 128 to get the MDIO frequency below the required 2.5 MHz.
> */
> - mii_cmd |= MDIO_CMD_MII_CLK_CSR_DIV_128 << MDIO_CMD_MII_CLK_CSR_SHIFT;
> + if (!priv->use_internal_phy)
> + mii_cmd |= MDIO_CMD_MII_CLK_CSR_DIV_128 <<
> + MDIO_CMD_MII_CLK_CSR_SHIFT;
>
> mii_cmd |= MDIO_CMD_MII_BUSY;
>
> @@ -242,7 +244,9 @@ static int sun8i_mdio_write(struct mii_dev *bus, int addr, int devad, int reg,
> * The EMAC clock is either 200 or 300 MHz, so we need a divider
> * of 128 to get the MDIO frequency below the required 2.5 MHz.
> */
> - mii_cmd |= MDIO_CMD_MII_CLK_CSR_DIV_128 << MDIO_CMD_MII_CLK_CSR_SHIFT;
> + if (!priv->use_internal_phy)
> + mii_cmd |= MDIO_CMD_MII_CLK_CSR_DIV_128 <<
> + MDIO_CMD_MII_CLK_CSR_SHIFT;
>
> mii_cmd |= MDIO_CMD_MII_WRITE;
> mii_cmd |= MDIO_CMD_MII_BUSY;
> --
> 2.31.0
>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
^ permalink raw reply [flat|nested] 3+ messages in thread* Re: [PATCH 1/1] net: sun8i-emac: fix MDIO frequency
2021-06-10 5:48 ` Ramon Fried
@ 2021-06-12 18:41 ` Ramon Fried
0 siblings, 0 replies; 3+ messages in thread
From: Ramon Fried @ 2021-06-12 18:41 UTC (permalink / raw)
To: Ramon Fried, Heinrich Schuchardt
Cc: Joe Hershberger, U-Boot Mailing List, Jagan Teki, Andre Przywara
On Thu Jun 10, 2021 at 8:48 AM IDT, Ramon Fried wrote:
> On Thu, Jun 3, 2021 at 10:52 AM Heinrich Schuchardt <xypron.glpk@gmx.de>
> wrote:
> >
> > Commit 4f0278dac56a ("net: sun8i-emac: Lower MDIO frequency") leads to
> > network failure on the OrangePi PC.
> >
> > => dhcp
> > sun8i_emac_eth_start: Timeout
> >
> > According to the commit message the change of the MDIO frequency is only
> > required for external PHYs.
> >
> > Fixes: 4f0278dac56a ("net: sun8i-emac: Lower MDIO frequency")
> > Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
> > ---
> > drivers/net/sun8i_emac.c | 8 ++++++--
> > 1 file changed, 6 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/net/sun8i_emac.c b/drivers/net/sun8i_emac.c
> > index 5a1b38bf80..d7553fe163 100644
> > --- a/drivers/net/sun8i_emac.c
> > +++ b/drivers/net/sun8i_emac.c
> > @@ -211,7 +211,9 @@ static int sun8i_mdio_read(struct mii_dev *bus, int addr, int devad, int reg)
> > * The EMAC clock is either 200 or 300 MHz, so we need a divider
> > * of 128 to get the MDIO frequency below the required 2.5 MHz.
> > */
> > - mii_cmd |= MDIO_CMD_MII_CLK_CSR_DIV_128 << MDIO_CMD_MII_CLK_CSR_SHIFT;
> > + if (!priv->use_internal_phy)
> > + mii_cmd |= MDIO_CMD_MII_CLK_CSR_DIV_128 <<
> > + MDIO_CMD_MII_CLK_CSR_SHIFT;
> >
> > mii_cmd |= MDIO_CMD_MII_BUSY;
> >
> > @@ -242,7 +244,9 @@ static int sun8i_mdio_write(struct mii_dev *bus, int addr, int devad, int reg,
> > * The EMAC clock is either 200 or 300 MHz, so we need a divider
> > * of 128 to get the MDIO frequency below the required 2.5 MHz.
> > */
> > - mii_cmd |= MDIO_CMD_MII_CLK_CSR_DIV_128 << MDIO_CMD_MII_CLK_CSR_SHIFT;
> > + if (!priv->use_internal_phy)
> > + mii_cmd |= MDIO_CMD_MII_CLK_CSR_DIV_128 <<
> > + MDIO_CMD_MII_CLK_CSR_SHIFT;
> >
> > mii_cmd |= MDIO_CMD_MII_WRITE;
> > mii_cmd |= MDIO_CMD_MII_BUSY;
> > --
> > 2.31.0
> >
> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
applied to u-boot-net/master, thanks!
Best regards,
Ramon Fried
^ permalink raw reply [flat|nested] 3+ messages in thread
end of thread, other threads:[~2021-06-12 18:41 UTC | newest]
Thread overview: 3+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-06-03 7:52 [PATCH 1/1] net: sun8i-emac: fix MDIO frequency Heinrich Schuchardt
2021-06-10 5:48 ` Ramon Fried
2021-06-12 18:41 ` Ramon Fried
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.