From: Punit Agrawal <punitagrawal@gmail.com>
To: Marc Zyngier <maz@kernel.org>
Cc: helgaas@kernel.org, robh+dt@kernel.org,
linux-rockchip@lists.infradead.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org,
alexandru.elisei@arm.com, wqu@suse.com, robin.murphy@arm.com,
pgwipeout@gmail.com, ardb@kernel.org, briannorris@chromium.org,
shawn.lin@rock-chips.com
Subject: Re: [PATCH v3 0/4] PCI: of: Improvements to handle 64-bit attribute for non-prefetchable ranges
Date: Thu, 10 Jun 2021 23:17:26 +0900 [thread overview]
Message-ID: <87r1h9kdmx.fsf@stealth> (raw)
In-Reply-To: <87lf7jqavd.wl-maz@kernel.org> (Marc Zyngier's message of "Wed, 09 Jun 2021 17:08:22 +0100")
Hi Marc,
Marc Zyngier <maz@kernel.org> writes:
> Hi Punit,
>
> On Mon, 07 Jun 2021 12:28:52 +0100,
> Punit Agrawal <punitagrawal@gmail.com> wrote:
>>
>> Hi,
>>
>> This is the third iteration to improve handling of the 64-bit
>> attribute on non-prefetchable host bridge ranges. Previous version can
>> be found at [0][1].
>>
>> This version is a small update over the previous version - changelog
>> below. If there is no futher feedback on the patches, please consider
>> merging them.
>
> Thanks for this. This brings my test machine back to life:
>
> Acked-by: Marc Zyngier <maz@kernel.org>
> Tested-by: Marc Zyngier <maz@kernel.org>
Thanks for taking the patches for a spin. Based on the comments on Patch
1, there'll at least be another update. I'll copy you when I send that
out.
Thanks,
Punit
[...]
WARNING: multiple messages have this Message-ID (diff)
From: Punit Agrawal <punitagrawal@gmail.com>
To: Marc Zyngier <maz@kernel.org>
Cc: helgaas@kernel.org, robh+dt@kernel.org,
linux-rockchip@lists.infradead.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org,
alexandru.elisei@arm.com, wqu@suse.com, robin.murphy@arm.com,
pgwipeout@gmail.com, ardb@kernel.org, briannorris@chromium.org,
shawn.lin@rock-chips.com
Subject: Re: [PATCH v3 0/4] PCI: of: Improvements to handle 64-bit attribute for non-prefetchable ranges
Date: Thu, 10 Jun 2021 23:17:26 +0900 [thread overview]
Message-ID: <87r1h9kdmx.fsf@stealth> (raw)
In-Reply-To: <87lf7jqavd.wl-maz@kernel.org> (Marc Zyngier's message of "Wed, 09 Jun 2021 17:08:22 +0100")
Hi Marc,
Marc Zyngier <maz@kernel.org> writes:
> Hi Punit,
>
> On Mon, 07 Jun 2021 12:28:52 +0100,
> Punit Agrawal <punitagrawal@gmail.com> wrote:
>>
>> Hi,
>>
>> This is the third iteration to improve handling of the 64-bit
>> attribute on non-prefetchable host bridge ranges. Previous version can
>> be found at [0][1].
>>
>> This version is a small update over the previous version - changelog
>> below. If there is no futher feedback on the patches, please consider
>> merging them.
>
> Thanks for this. This brings my test machine back to life:
>
> Acked-by: Marc Zyngier <maz@kernel.org>
> Tested-by: Marc Zyngier <maz@kernel.org>
Thanks for taking the patches for a spin. Based on the comments on Patch
1, there'll at least be another update. I'll copy you when I send that
out.
Thanks,
Punit
[...]
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
WARNING: multiple messages have this Message-ID (diff)
From: Punit Agrawal <punitagrawal@gmail.com>
To: Marc Zyngier <maz@kernel.org>
Cc: helgaas@kernel.org, robh+dt@kernel.org,
linux-rockchip@lists.infradead.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org,
alexandru.elisei@arm.com, wqu@suse.com, robin.murphy@arm.com,
pgwipeout@gmail.com, ardb@kernel.org, briannorris@chromium.org,
shawn.lin@rock-chips.com
Subject: Re: [PATCH v3 0/4] PCI: of: Improvements to handle 64-bit attribute for non-prefetchable ranges
Date: Thu, 10 Jun 2021 23:17:26 +0900 [thread overview]
Message-ID: <87r1h9kdmx.fsf@stealth> (raw)
In-Reply-To: <87lf7jqavd.wl-maz@kernel.org> (Marc Zyngier's message of "Wed, 09 Jun 2021 17:08:22 +0100")
Hi Marc,
Marc Zyngier <maz@kernel.org> writes:
> Hi Punit,
>
> On Mon, 07 Jun 2021 12:28:52 +0100,
> Punit Agrawal <punitagrawal@gmail.com> wrote:
>>
>> Hi,
>>
>> This is the third iteration to improve handling of the 64-bit
>> attribute on non-prefetchable host bridge ranges. Previous version can
>> be found at [0][1].
>>
>> This version is a small update over the previous version - changelog
>> below. If there is no futher feedback on the patches, please consider
>> merging them.
>
> Thanks for this. This brings my test machine back to life:
>
> Acked-by: Marc Zyngier <maz@kernel.org>
> Tested-by: Marc Zyngier <maz@kernel.org>
Thanks for taking the patches for a spin. Based on the comments on Patch
1, there'll at least be another update. I'll copy you when I send that
out.
Thanks,
Punit
[...]
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2021-06-10 14:18 UTC|newest]
Thread overview: 69+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-06-07 11:28 [PATCH v3 0/4] PCI: of: Improvements to handle 64-bit attribute for non-prefetchable ranges Punit Agrawal
2021-06-07 11:28 ` Punit Agrawal
2021-06-07 11:28 ` Punit Agrawal
2021-06-07 11:28 ` [PATCH v3 1/4] PCI: of: Clear 64-bit flag for non-prefetchable memory below 4GB Punit Agrawal
2021-06-07 11:28 ` Punit Agrawal
2021-06-07 11:28 ` Punit Agrawal
2021-06-10 0:22 ` Bjorn Helgaas
2021-06-10 0:22 ` Bjorn Helgaas
2021-06-10 0:22 ` Bjorn Helgaas
2021-06-10 13:34 ` Punit Agrawal
2021-06-10 13:34 ` Punit Agrawal
2021-06-10 13:34 ` Punit Agrawal
2021-06-10 18:28 ` Bjorn Helgaas
2021-06-10 18:28 ` Bjorn Helgaas
2021-06-10 18:28 ` Bjorn Helgaas
2021-06-07 11:28 ` [PATCH v3 2/4] PCI: of: Relax the condition for warning about non-prefetchable memory aperture size Punit Agrawal
2021-06-07 11:28 ` Punit Agrawal
2021-06-07 11:28 ` Punit Agrawal
2021-06-08 19:06 ` Vidya Sagar
2021-06-08 19:06 ` Vidya Sagar
2021-06-08 19:06 ` Vidya Sagar
2021-06-10 4:04 ` Bjorn Helgaas
2021-06-10 4:04 ` Bjorn Helgaas
2021-06-10 4:04 ` Bjorn Helgaas
2021-06-10 14:11 ` Punit Agrawal
2021-06-10 14:11 ` Punit Agrawal
2021-06-10 14:11 ` Punit Agrawal
2021-06-10 19:58 ` Bjorn Helgaas
2021-06-10 19:58 ` Bjorn Helgaas
2021-06-10 19:58 ` Bjorn Helgaas
2021-06-07 11:28 ` [PATCH v3 3/4] PCI: of: Refactor the check for non-prefetchable 32-bit window Punit Agrawal
2021-06-07 11:28 ` Punit Agrawal
2021-06-07 11:28 ` Punit Agrawal
2021-06-07 11:28 ` [PATCH v3 4/4] arm64: dts: rockchip: Update PCI host bridge window to 32-bit address memory Punit Agrawal
2021-06-07 11:28 ` Punit Agrawal
2021-06-07 11:28 ` Punit Agrawal
2021-06-10 21:50 ` Heiko Stübner
2021-06-10 21:50 ` Heiko Stübner
2021-06-10 21:50 ` Heiko Stübner
2021-06-11 14:38 ` Punit Agrawal
2021-06-11 14:38 ` Punit Agrawal
2021-06-11 14:38 ` Punit Agrawal
2021-06-15 21:29 ` Rob Herring
2021-06-15 21:29 ` Rob Herring
2021-06-15 21:29 ` Rob Herring
2021-06-15 21:49 ` Heiko Stübner
2021-06-15 21:49 ` Heiko Stübner
2021-06-15 21:49 ` Heiko Stübner
2021-06-16 13:00 ` Punit Agrawal
2021-06-16 13:00 ` Punit Agrawal
2021-06-16 13:00 ` Punit Agrawal
2021-06-09 16:08 ` [PATCH v3 0/4] PCI: of: Improvements to handle 64-bit attribute for non-prefetchable ranges Marc Zyngier
2021-06-09 16:08 ` Marc Zyngier
2021-06-09 16:08 ` Marc Zyngier
2021-06-10 14:17 ` Punit Agrawal [this message]
2021-06-10 14:17 ` Punit Agrawal
2021-06-10 14:17 ` Punit Agrawal
2021-06-10 9:05 ` Anand Moon
2021-06-10 9:05 ` Anand Moon
2021-06-10 9:05 ` Anand Moon
2021-06-10 14:25 ` Punit Agrawal
2021-06-10 14:25 ` Punit Agrawal
2021-06-10 14:25 ` Punit Agrawal
2021-06-10 18:36 ` Anand Moon
2021-06-10 18:36 ` Anand Moon
2021-06-10 18:36 ` Anand Moon
2021-06-11 22:15 ` (subset) " Heiko Stuebner
2021-06-11 22:15 ` Heiko Stuebner
2021-06-11 22:15 ` Heiko Stuebner
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