From: Damien Le Moal <dlemoal@kernel.org> To: "Manivannan Sadhasivam" <manivannan.sadhasivam@linaro.org>, "Kishon Vijay Abraham I" <kishon@kernel.org>, "Shawn Lin" <shawn.lin@rock-chips.com>, "Krzysztof Wilczyński" <kw@linux.com>, "Bjorn Helgaas" <bhelgaas@google.com>, "Heiko Stuebner" <heiko@sntech.de>, linux-pci@vger.kernel.org Cc: linux-rockchip@lists.infradead.org Subject: [PATCH 08/19] PCI: rockchip-ep: Fix address translation unit programming Date: Fri, 29 Mar 2024 18:09:34 +0900 [thread overview] Message-ID: <20240329090945.1097609-9-dlemoal@kernel.org> (raw) In-Reply-To: <20240329090945.1097609-1-dlemoal@kernel.org> The rockchip PCIe endpoint controller handles PCIe transfers addresses by masking the lower bits of the programmed PCI address and using the same number of lower bits masked from the CPU address space used for the mapping. For a PCI mapping of <size> bytes starting from <pci_addr>, the number of bits masked is the number of address bits changing in the address range [pci_addr..pci_addr + size - 1]. However, rockchip_pcie_prog_ep_ob_atu() calculates num_pass_bits only using the size of the mapping, resulting in an incorrect number of mask bits depending on the value of the PCI address to map. Fix this by introducing the helper function rockchip_pcie_ep_ob_atu_num_bits() to correctly calculate the number of mask bits to use to program the address translation unit. The number of mask bits iscalculated depending on both the PCI address and size of the mapping, and clamped between 8 and 20 using the macros ROCKCHIP_PCIE_AT_MIN_NUM_BITS and ROCKCHIP_PCIE_AT_MAX_NUM_BITS. Fixes: cf590b078391 ("PCI: rockchip: Add EP driver for Rockchip PCIe controller") Cc: stable@vger.kernel.org Signed-off-by: Damien Le Moal <dlemoal@kernel.org> --- drivers/pci/controller/pcie-rockchip-ep.c | 15 +++++++++++---- drivers/pci/controller/pcie-rockchip.h | 4 ++++ 2 files changed, 15 insertions(+), 4 deletions(-) diff --git a/drivers/pci/controller/pcie-rockchip-ep.c b/drivers/pci/controller/pcie-rockchip-ep.c index c9046e97a1d2..786efd918b3f 100644 --- a/drivers/pci/controller/pcie-rockchip-ep.c +++ b/drivers/pci/controller/pcie-rockchip-ep.c @@ -63,16 +63,23 @@ static void rockchip_pcie_clear_ep_ob_atu(struct rockchip_pcie *rockchip, ROCKCHIP_PCIE_AT_OB_REGION_DESC1(region)); } +static int rockchip_pcie_ep_ob_atu_num_bits(struct rockchip_pcie *rockchip, + u64 pci_addr, size_t size) +{ + int num_pass_bits = fls64(pci_addr ^ (pci_addr + size - 1)); + + return clamp(num_pass_bits, ROCKCHIP_PCIE_AT_MIN_NUM_BITS, + ROCKCHIP_PCIE_AT_MAX_NUM_BITS); +} + static void rockchip_pcie_prog_ep_ob_atu(struct rockchip_pcie *rockchip, u8 fn, u32 r, u64 cpu_addr, u64 pci_addr, size_t size) { - int num_pass_bits = fls64(size - 1); + int num_pass_bits = + rockchip_pcie_ep_ob_atu_num_bits(rockchip, pci_addr, size); u32 addr0, addr1, desc0; - if (num_pass_bits < 8) - num_pass_bits = 8; - addr0 = ((num_pass_bits - 1) & PCIE_CORE_OB_REGION_ADDR0_NUM_BITS) | (lower_32_bits(pci_addr) & PCIE_CORE_OB_REGION_ADDR0_LO_ADDR); addr1 = upper_32_bits(pci_addr); diff --git a/drivers/pci/controller/pcie-rockchip.h b/drivers/pci/controller/pcie-rockchip.h index 6111de35f84c..15ee949f2485 100644 --- a/drivers/pci/controller/pcie-rockchip.h +++ b/drivers/pci/controller/pcie-rockchip.h @@ -245,6 +245,10 @@ (PCIE_EP_PF_CONFIG_REGS_BASE + (((fn) << 12) & GENMASK(19, 12))) #define ROCKCHIP_PCIE_EP_VIRT_FUNC_BASE(fn) \ (PCIE_EP_PF_CONFIG_REGS_BASE + 0x10000 + (((fn) << 12) & GENMASK(19, 12))) + +#define ROCKCHIP_PCIE_AT_MIN_NUM_BITS 8 +#define ROCKCHIP_PCIE_AT_MAX_NUM_BITS 20 + #define ROCKCHIP_PCIE_AT_IB_EP_FUNC_BAR_ADDR0(fn, bar) \ (PCIE_CORE_AXI_CONF_BASE + 0x0828 + (fn) * 0x0040 + (bar) * 0x0008) #define ROCKCHIP_PCIE_AT_IB_EP_FUNC_BAR_ADDR1(fn, bar) \ -- 2.44.0
WARNING: multiple messages have this Message-ID (diff)
From: Damien Le Moal <dlemoal@kernel.org> To: "Manivannan Sadhasivam" <manivannan.sadhasivam@linaro.org>, "Kishon Vijay Abraham I" <kishon@kernel.org>, "Shawn Lin" <shawn.lin@rock-chips.com>, "Krzysztof Wilczyński" <kw@linux.com>, "Bjorn Helgaas" <bhelgaas@google.com>, "Heiko Stuebner" <heiko@sntech.de>, linux-pci@vger.kernel.org Cc: linux-rockchip@lists.infradead.org Subject: [PATCH 08/19] PCI: rockchip-ep: Fix address translation unit programming Date: Fri, 29 Mar 2024 18:09:34 +0900 [thread overview] Message-ID: <20240329090945.1097609-9-dlemoal@kernel.org> (raw) In-Reply-To: <20240329090945.1097609-1-dlemoal@kernel.org> The rockchip PCIe endpoint controller handles PCIe transfers addresses by masking the lower bits of the programmed PCI address and using the same number of lower bits masked from the CPU address space used for the mapping. For a PCI mapping of <size> bytes starting from <pci_addr>, the number of bits masked is the number of address bits changing in the address range [pci_addr..pci_addr + size - 1]. However, rockchip_pcie_prog_ep_ob_atu() calculates num_pass_bits only using the size of the mapping, resulting in an incorrect number of mask bits depending on the value of the PCI address to map. Fix this by introducing the helper function rockchip_pcie_ep_ob_atu_num_bits() to correctly calculate the number of mask bits to use to program the address translation unit. The number of mask bits iscalculated depending on both the PCI address and size of the mapping, and clamped between 8 and 20 using the macros ROCKCHIP_PCIE_AT_MIN_NUM_BITS and ROCKCHIP_PCIE_AT_MAX_NUM_BITS. Fixes: cf590b078391 ("PCI: rockchip: Add EP driver for Rockchip PCIe controller") Cc: stable@vger.kernel.org Signed-off-by: Damien Le Moal <dlemoal@kernel.org> --- drivers/pci/controller/pcie-rockchip-ep.c | 15 +++++++++++---- drivers/pci/controller/pcie-rockchip.h | 4 ++++ 2 files changed, 15 insertions(+), 4 deletions(-) diff --git a/drivers/pci/controller/pcie-rockchip-ep.c b/drivers/pci/controller/pcie-rockchip-ep.c index c9046e97a1d2..786efd918b3f 100644 --- a/drivers/pci/controller/pcie-rockchip-ep.c +++ b/drivers/pci/controller/pcie-rockchip-ep.c @@ -63,16 +63,23 @@ static void rockchip_pcie_clear_ep_ob_atu(struct rockchip_pcie *rockchip, ROCKCHIP_PCIE_AT_OB_REGION_DESC1(region)); } +static int rockchip_pcie_ep_ob_atu_num_bits(struct rockchip_pcie *rockchip, + u64 pci_addr, size_t size) +{ + int num_pass_bits = fls64(pci_addr ^ (pci_addr + size - 1)); + + return clamp(num_pass_bits, ROCKCHIP_PCIE_AT_MIN_NUM_BITS, + ROCKCHIP_PCIE_AT_MAX_NUM_BITS); +} + static void rockchip_pcie_prog_ep_ob_atu(struct rockchip_pcie *rockchip, u8 fn, u32 r, u64 cpu_addr, u64 pci_addr, size_t size) { - int num_pass_bits = fls64(size - 1); + int num_pass_bits = + rockchip_pcie_ep_ob_atu_num_bits(rockchip, pci_addr, size); u32 addr0, addr1, desc0; - if (num_pass_bits < 8) - num_pass_bits = 8; - addr0 = ((num_pass_bits - 1) & PCIE_CORE_OB_REGION_ADDR0_NUM_BITS) | (lower_32_bits(pci_addr) & PCIE_CORE_OB_REGION_ADDR0_LO_ADDR); addr1 = upper_32_bits(pci_addr); diff --git a/drivers/pci/controller/pcie-rockchip.h b/drivers/pci/controller/pcie-rockchip.h index 6111de35f84c..15ee949f2485 100644 --- a/drivers/pci/controller/pcie-rockchip.h +++ b/drivers/pci/controller/pcie-rockchip.h @@ -245,6 +245,10 @@ (PCIE_EP_PF_CONFIG_REGS_BASE + (((fn) << 12) & GENMASK(19, 12))) #define ROCKCHIP_PCIE_EP_VIRT_FUNC_BASE(fn) \ (PCIE_EP_PF_CONFIG_REGS_BASE + 0x10000 + (((fn) << 12) & GENMASK(19, 12))) + +#define ROCKCHIP_PCIE_AT_MIN_NUM_BITS 8 +#define ROCKCHIP_PCIE_AT_MAX_NUM_BITS 20 + #define ROCKCHIP_PCIE_AT_IB_EP_FUNC_BAR_ADDR0(fn, bar) \ (PCIE_CORE_AXI_CONF_BASE + 0x0828 + (fn) * 0x0040 + (bar) * 0x0008) #define ROCKCHIP_PCIE_AT_IB_EP_FUNC_BAR_ADDR1(fn, bar) \ -- 2.44.0 _______________________________________________ Linux-rockchip mailing list Linux-rockchip@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-rockchip
next prev parent reply other threads:[~2024-03-29 9:10 UTC|newest] Thread overview: 58+ messages / expand[flat|nested] mbox.gz Atom feed top 2024-03-29 9:09 [PATCH 00/19] Improve PCI memory mapping API Damien Le Moal 2024-03-29 9:09 ` Damien Le Moal 2024-03-29 9:09 ` [PATCH 01/19] PCI: endpoint: Introduce pci_epc_check_func() Damien Le Moal 2024-03-29 9:09 ` Damien Le Moal 2024-03-29 12:33 ` Bjorn Helgaas 2024-03-29 12:33 ` Bjorn Helgaas 2024-03-29 9:09 ` [PATCH 02/19] PCI: endpoint: Improve pci_epc_mem_alloc_addr() Damien Le Moal 2024-03-29 9:09 ` Damien Le Moal 2024-03-29 15:32 ` Frank Li 2024-03-29 15:32 ` Frank Li 2024-03-29 9:09 ` [PATCH 03/19] PCI: endpoint: Introduce pci_epc_map_align() Damien Le Moal 2024-03-29 9:09 ` Damien Le Moal 2024-03-29 9:09 ` [PATCH 04/19] PCI: endpoint: Introduce pci_epc_mem_map()/unmap() Damien Le Moal 2024-03-29 9:09 ` Damien Le Moal 2024-03-29 9:09 ` [PATCH 05/19] PCI: endpoint: test: Use pci_epc_mem_map/unmap() Damien Le Moal 2024-03-29 9:09 ` Damien Le Moal 2024-03-29 9:09 ` [PATCH 06/19] PCI: endpoint: test: Synchronously cancel command handler work Damien Le Moal 2024-03-29 9:09 ` Damien Le Moal 2024-03-29 15:36 ` Frank Li 2024-03-29 15:36 ` Frank Li 2024-03-29 9:09 ` [PATCH 07/19] PCI: endpoint: test: Implement link_down event operation Damien Le Moal 2024-03-29 9:09 ` Damien Le Moal 2024-03-29 15:37 ` Frank Li 2024-03-29 15:37 ` Frank Li 2024-03-29 9:09 ` Damien Le Moal [this message] 2024-03-29 9:09 ` [PATCH 08/19] PCI: rockchip-ep: Fix address translation unit programming Damien Le Moal 2024-03-29 9:09 ` [PATCH 09/19] PCI: rockchip-ep: use macro to define EP controller .align feature Damien Le Moal 2024-03-29 9:09 ` Damien Le Moal 2024-03-29 9:09 ` [PATCH 10/19] PCI: rockchip-ep: Improve rockchip_pcie_ep_unmap_addr() Damien Le Moal 2024-03-29 9:09 ` Damien Le Moal 2024-03-29 9:09 ` [PATCH 11/19] PCI: rockchip-ep: Improve rockchip_pcie_ep_map_addr() Damien Le Moal 2024-03-29 9:09 ` Damien Le Moal 2024-03-29 9:09 ` [PATCH 12/19] PCI: rockchip-ep: Implement the map_info endpoint controller operation Damien Le Moal 2024-03-29 9:09 ` Damien Le Moal 2024-03-29 9:09 ` [PATCH 13/19] PCI: rockchip-ep: Refactor rockchip_pcie_ep_probe() memory allocations Damien Le Moal 2024-03-29 9:09 ` Damien Le Moal 2024-03-29 9:09 ` [PATCH 14/19] PCI: rockchip-ep: Refactor rockchip_pcie_ep_probe() MSIX hiding Damien Le Moal 2024-03-29 9:09 ` Damien Le Moal 2024-03-29 9:09 ` [PATCH 15/19] PCI: rockchip-ep: Refactor endpoint link training enable Damien Le Moal 2024-03-29 9:09 ` Damien Le Moal 2024-03-29 9:09 ` [PATCH 16/19] PCI: rockship-ep: Introduce rockchip_pcie_ep_stop() Damien Le Moal 2024-03-29 9:09 ` Damien Le Moal 2024-03-29 9:09 ` [PATCH 17/19] PCI: rockchip-ep: Improve link training Damien Le Moal 2024-03-29 9:09 ` Damien Le Moal 2024-03-31 2:03 ` kernel test robot 2024-03-31 2:03 ` kernel test robot 2024-03-29 9:09 ` [PATCH 18/19] dt-bindings: pci: rockchip,rk3399-pcie-ep: Add ep-gpios property Damien Le Moal 2024-03-29 9:09 ` Damien Le Moal 2024-03-29 12:28 ` Krzysztof Kozlowski 2024-03-29 12:28 ` Krzysztof Kozlowski 2024-03-29 9:09 ` [PATCH 19/19] PCI: rockchip-ep: Handle PERST signal in endpoint mode Damien Le Moal 2024-03-29 9:09 ` Damien Le Moal 2024-03-30 10:31 ` kernel test robot 2024-03-30 10:31 ` kernel test robot 2024-03-31 5:40 ` kernel test robot 2024-03-31 5:40 ` kernel test robot 2024-03-29 12:41 ` [PATCH 00/19] Improve PCI memory mapping API Bjorn Helgaas 2024-03-29 12:41 ` Bjorn Helgaas
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