From: Damien Le Moal <dlemoal@kernel.org> To: "Manivannan Sadhasivam" <manivannan.sadhasivam@linaro.org>, "Kishon Vijay Abraham I" <kishon@kernel.org>, "Shawn Lin" <shawn.lin@rock-chips.com>, "Krzysztof Wilczyński" <kw@linux.com>, "Bjorn Helgaas" <bhelgaas@google.com>, "Heiko Stuebner" <heiko@sntech.de>, linux-pci@vger.kernel.org Cc: linux-rockchip@lists.infradead.org Subject: [PATCH 12/19] PCI: rockchip-ep: Implement the map_info endpoint controller operation Date: Fri, 29 Mar 2024 18:09:38 +0900 [thread overview] Message-ID: <20240329090945.1097609-13-dlemoal@kernel.org> (raw) In-Reply-To: <20240329090945.1097609-1-dlemoal@kernel.org> The rockchip PCIe endpoint controller handles PCIe transfers addresses by masking the lower bits of the programmed PCI address and using the same number of lower bits from the CPU address space used for the mapping. For a PCI mapping of size bytes starting from pci_addr, the number of bits masked is the number of address bits changing in the address range [pci_addr..pci_addr + size - 1], up to 20 bits, that is, up to 1MB mappings. This means that when preparing a PCI address mapping, an endpoint function driver must use an offset into the allocated controller memory region that is equal to the mask of the starting PCI address over rockchip_pcie_ep_ob_atu_num_bits() bits. This offset also determines the maximum size of the mapping given the starting PCI address and the fixed 1MB controller memory window size. Implement the ->map_info() endpoint controller operation to allow this mapping information to be transparently used by endpoint function drivers through the function pci_epc_map_info(). Co-developed-by: Rick Wertenbroek <rick.wertenbroek@gmail.com> Signed-off-by: Damien Le Moal <dlemoal@kernel.org> --- drivers/pci/controller/pcie-rockchip-ep.c | 22 ++++++++++++++++++++++ drivers/pci/controller/pcie-rockchip.h | 5 +++++ 2 files changed, 27 insertions(+) diff --git a/drivers/pci/controller/pcie-rockchip-ep.c b/drivers/pci/controller/pcie-rockchip-ep.c index c2ca7878cee3..223132acc787 100644 --- a/drivers/pci/controller/pcie-rockchip-ep.c +++ b/drivers/pci/controller/pcie-rockchip-ep.c @@ -237,6 +237,27 @@ static inline u32 rockchip_ob_region(phys_addr_t addr) return (addr >> ilog2(SZ_1M)) & 0x1f; } +static int rockchip_pcie_ep_map_align(struct pci_epc *epc, u8 fn, u8 vfn, + struct pci_epc_map *map) +{ + struct rockchip_pcie_ep *ep = epc_get_drvdata(epc); + int num_bits; + + num_bits = rockchip_pcie_ep_ob_atu_num_bits(&ep->rockchip, + map->pci_addr, map->pci_size); + + map->map_pci_addr = map->pci_addr & ~((1ULL << num_bits) - 1); + map->map_ofst = map->pci_addr - map->map_pci_addr; + + if (map->map_ofst + map->pci_size > SZ_1M) + map->pci_size = SZ_1M - map->map_ofst; + + map->map_size = ALIGN(map->map_ofst + map->pci_size, + ROCKCHIP_PCIE_AT_SIZE_ALIGN); + + return 0; +} + static int rockchip_pcie_ep_map_addr(struct pci_epc *epc, u8 fn, u8 vfn, phys_addr_t addr, u64 pci_addr, size_t size) @@ -460,6 +481,7 @@ static const struct pci_epc_ops rockchip_pcie_epc_ops = { .write_header = rockchip_pcie_ep_write_header, .set_bar = rockchip_pcie_ep_set_bar, .clear_bar = rockchip_pcie_ep_clear_bar, + .map_align = rockchip_pcie_ep_map_align, .map_addr = rockchip_pcie_ep_map_addr, .unmap_addr = rockchip_pcie_ep_unmap_addr, .set_msi = rockchip_pcie_ep_set_msi, diff --git a/drivers/pci/controller/pcie-rockchip.h b/drivers/pci/controller/pcie-rockchip.h index 02368ce9bd54..30398156095f 100644 --- a/drivers/pci/controller/pcie-rockchip.h +++ b/drivers/pci/controller/pcie-rockchip.h @@ -241,6 +241,11 @@ #define ROCKCHIP_PCIE_EP_MSIX_CAP_CP_MASK GENMASK(15, 8) #define ROCKCHIP_PCIE_EP_DUMMY_IRQ_ADDR 0x1 #define ROCKCHIP_PCIE_EP_PCI_LEGACY_IRQ_ADDR 0x3 + +#define ROCKCHIP_PCIE_AT_MIN_NUM_BITS 8 +#define ROCKCHIP_PCIE_AT_MAX_NUM_BITS 20 +#define ROCKCHIP_PCIE_AT_SIZE_ALIGN (1UL << ROCKCHIP_PCIE_AT_MIN_NUM_BITS) + #define ROCKCHIP_PCIE_EP_FUNC_BASE(fn) \ (PCIE_EP_PF_CONFIG_REGS_BASE + (((fn) << 12) & GENMASK(19, 12))) #define ROCKCHIP_PCIE_EP_VIRT_FUNC_BASE(fn) \ -- 2.44.0
WARNING: multiple messages have this Message-ID (diff)
From: Damien Le Moal <dlemoal@kernel.org> To: "Manivannan Sadhasivam" <manivannan.sadhasivam@linaro.org>, "Kishon Vijay Abraham I" <kishon@kernel.org>, "Shawn Lin" <shawn.lin@rock-chips.com>, "Krzysztof Wilczyński" <kw@linux.com>, "Bjorn Helgaas" <bhelgaas@google.com>, "Heiko Stuebner" <heiko@sntech.de>, linux-pci@vger.kernel.org Cc: linux-rockchip@lists.infradead.org Subject: [PATCH 12/19] PCI: rockchip-ep: Implement the map_info endpoint controller operation Date: Fri, 29 Mar 2024 18:09:38 +0900 [thread overview] Message-ID: <20240329090945.1097609-13-dlemoal@kernel.org> (raw) In-Reply-To: <20240329090945.1097609-1-dlemoal@kernel.org> The rockchip PCIe endpoint controller handles PCIe transfers addresses by masking the lower bits of the programmed PCI address and using the same number of lower bits from the CPU address space used for the mapping. For a PCI mapping of size bytes starting from pci_addr, the number of bits masked is the number of address bits changing in the address range [pci_addr..pci_addr + size - 1], up to 20 bits, that is, up to 1MB mappings. This means that when preparing a PCI address mapping, an endpoint function driver must use an offset into the allocated controller memory region that is equal to the mask of the starting PCI address over rockchip_pcie_ep_ob_atu_num_bits() bits. This offset also determines the maximum size of the mapping given the starting PCI address and the fixed 1MB controller memory window size. Implement the ->map_info() endpoint controller operation to allow this mapping information to be transparently used by endpoint function drivers through the function pci_epc_map_info(). Co-developed-by: Rick Wertenbroek <rick.wertenbroek@gmail.com> Signed-off-by: Damien Le Moal <dlemoal@kernel.org> --- drivers/pci/controller/pcie-rockchip-ep.c | 22 ++++++++++++++++++++++ drivers/pci/controller/pcie-rockchip.h | 5 +++++ 2 files changed, 27 insertions(+) diff --git a/drivers/pci/controller/pcie-rockchip-ep.c b/drivers/pci/controller/pcie-rockchip-ep.c index c2ca7878cee3..223132acc787 100644 --- a/drivers/pci/controller/pcie-rockchip-ep.c +++ b/drivers/pci/controller/pcie-rockchip-ep.c @@ -237,6 +237,27 @@ static inline u32 rockchip_ob_region(phys_addr_t addr) return (addr >> ilog2(SZ_1M)) & 0x1f; } +static int rockchip_pcie_ep_map_align(struct pci_epc *epc, u8 fn, u8 vfn, + struct pci_epc_map *map) +{ + struct rockchip_pcie_ep *ep = epc_get_drvdata(epc); + int num_bits; + + num_bits = rockchip_pcie_ep_ob_atu_num_bits(&ep->rockchip, + map->pci_addr, map->pci_size); + + map->map_pci_addr = map->pci_addr & ~((1ULL << num_bits) - 1); + map->map_ofst = map->pci_addr - map->map_pci_addr; + + if (map->map_ofst + map->pci_size > SZ_1M) + map->pci_size = SZ_1M - map->map_ofst; + + map->map_size = ALIGN(map->map_ofst + map->pci_size, + ROCKCHIP_PCIE_AT_SIZE_ALIGN); + + return 0; +} + static int rockchip_pcie_ep_map_addr(struct pci_epc *epc, u8 fn, u8 vfn, phys_addr_t addr, u64 pci_addr, size_t size) @@ -460,6 +481,7 @@ static const struct pci_epc_ops rockchip_pcie_epc_ops = { .write_header = rockchip_pcie_ep_write_header, .set_bar = rockchip_pcie_ep_set_bar, .clear_bar = rockchip_pcie_ep_clear_bar, + .map_align = rockchip_pcie_ep_map_align, .map_addr = rockchip_pcie_ep_map_addr, .unmap_addr = rockchip_pcie_ep_unmap_addr, .set_msi = rockchip_pcie_ep_set_msi, diff --git a/drivers/pci/controller/pcie-rockchip.h b/drivers/pci/controller/pcie-rockchip.h index 02368ce9bd54..30398156095f 100644 --- a/drivers/pci/controller/pcie-rockchip.h +++ b/drivers/pci/controller/pcie-rockchip.h @@ -241,6 +241,11 @@ #define ROCKCHIP_PCIE_EP_MSIX_CAP_CP_MASK GENMASK(15, 8) #define ROCKCHIP_PCIE_EP_DUMMY_IRQ_ADDR 0x1 #define ROCKCHIP_PCIE_EP_PCI_LEGACY_IRQ_ADDR 0x3 + +#define ROCKCHIP_PCIE_AT_MIN_NUM_BITS 8 +#define ROCKCHIP_PCIE_AT_MAX_NUM_BITS 20 +#define ROCKCHIP_PCIE_AT_SIZE_ALIGN (1UL << ROCKCHIP_PCIE_AT_MIN_NUM_BITS) + #define ROCKCHIP_PCIE_EP_FUNC_BASE(fn) \ (PCIE_EP_PF_CONFIG_REGS_BASE + (((fn) << 12) & GENMASK(19, 12))) #define ROCKCHIP_PCIE_EP_VIRT_FUNC_BASE(fn) \ -- 2.44.0 _______________________________________________ Linux-rockchip mailing list Linux-rockchip@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-rockchip
next prev parent reply other threads:[~2024-03-29 9:10 UTC|newest] Thread overview: 58+ messages / expand[flat|nested] mbox.gz Atom feed top 2024-03-29 9:09 [PATCH 00/19] Improve PCI memory mapping API Damien Le Moal 2024-03-29 9:09 ` Damien Le Moal 2024-03-29 9:09 ` [PATCH 01/19] PCI: endpoint: Introduce pci_epc_check_func() Damien Le Moal 2024-03-29 9:09 ` Damien Le Moal 2024-03-29 12:33 ` Bjorn Helgaas 2024-03-29 12:33 ` Bjorn Helgaas 2024-03-29 9:09 ` [PATCH 02/19] PCI: endpoint: Improve pci_epc_mem_alloc_addr() Damien Le Moal 2024-03-29 9:09 ` Damien Le Moal 2024-03-29 15:32 ` Frank Li 2024-03-29 15:32 ` Frank Li 2024-03-29 9:09 ` [PATCH 03/19] PCI: endpoint: Introduce pci_epc_map_align() Damien Le Moal 2024-03-29 9:09 ` Damien Le Moal 2024-03-29 9:09 ` [PATCH 04/19] PCI: endpoint: Introduce pci_epc_mem_map()/unmap() Damien Le Moal 2024-03-29 9:09 ` Damien Le Moal 2024-03-29 9:09 ` [PATCH 05/19] PCI: endpoint: test: Use pci_epc_mem_map/unmap() Damien Le Moal 2024-03-29 9:09 ` Damien Le Moal 2024-03-29 9:09 ` [PATCH 06/19] PCI: endpoint: test: Synchronously cancel command handler work Damien Le Moal 2024-03-29 9:09 ` Damien Le Moal 2024-03-29 15:36 ` Frank Li 2024-03-29 15:36 ` Frank Li 2024-03-29 9:09 ` [PATCH 07/19] PCI: endpoint: test: Implement link_down event operation Damien Le Moal 2024-03-29 9:09 ` Damien Le Moal 2024-03-29 15:37 ` Frank Li 2024-03-29 15:37 ` Frank Li 2024-03-29 9:09 ` [PATCH 08/19] PCI: rockchip-ep: Fix address translation unit programming Damien Le Moal 2024-03-29 9:09 ` Damien Le Moal 2024-03-29 9:09 ` [PATCH 09/19] PCI: rockchip-ep: use macro to define EP controller .align feature Damien Le Moal 2024-03-29 9:09 ` Damien Le Moal 2024-03-29 9:09 ` [PATCH 10/19] PCI: rockchip-ep: Improve rockchip_pcie_ep_unmap_addr() Damien Le Moal 2024-03-29 9:09 ` Damien Le Moal 2024-03-29 9:09 ` [PATCH 11/19] PCI: rockchip-ep: Improve rockchip_pcie_ep_map_addr() Damien Le Moal 2024-03-29 9:09 ` Damien Le Moal 2024-03-29 9:09 ` Damien Le Moal [this message] 2024-03-29 9:09 ` [PATCH 12/19] PCI: rockchip-ep: Implement the map_info endpoint controller operation Damien Le Moal 2024-03-29 9:09 ` [PATCH 13/19] PCI: rockchip-ep: Refactor rockchip_pcie_ep_probe() memory allocations Damien Le Moal 2024-03-29 9:09 ` Damien Le Moal 2024-03-29 9:09 ` [PATCH 14/19] PCI: rockchip-ep: Refactor rockchip_pcie_ep_probe() MSIX hiding Damien Le Moal 2024-03-29 9:09 ` Damien Le Moal 2024-03-29 9:09 ` [PATCH 15/19] PCI: rockchip-ep: Refactor endpoint link training enable Damien Le Moal 2024-03-29 9:09 ` Damien Le Moal 2024-03-29 9:09 ` [PATCH 16/19] PCI: rockship-ep: Introduce rockchip_pcie_ep_stop() Damien Le Moal 2024-03-29 9:09 ` Damien Le Moal 2024-03-29 9:09 ` [PATCH 17/19] PCI: rockchip-ep: Improve link training Damien Le Moal 2024-03-29 9:09 ` Damien Le Moal 2024-03-31 2:03 ` kernel test robot 2024-03-31 2:03 ` kernel test robot 2024-03-29 9:09 ` [PATCH 18/19] dt-bindings: pci: rockchip,rk3399-pcie-ep: Add ep-gpios property Damien Le Moal 2024-03-29 9:09 ` Damien Le Moal 2024-03-29 12:28 ` Krzysztof Kozlowski 2024-03-29 12:28 ` Krzysztof Kozlowski 2024-03-29 9:09 ` [PATCH 19/19] PCI: rockchip-ep: Handle PERST signal in endpoint mode Damien Le Moal 2024-03-29 9:09 ` Damien Le Moal 2024-03-30 10:31 ` kernel test robot 2024-03-30 10:31 ` kernel test robot 2024-03-31 5:40 ` kernel test robot 2024-03-31 5:40 ` kernel test robot 2024-03-29 12:41 ` [PATCH 00/19] Improve PCI memory mapping API Bjorn Helgaas 2024-03-29 12:41 ` Bjorn Helgaas
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