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From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: Richard Henderson <richard.henderson@linaro.org>, qemu-devel@nongnu.org
Cc: mark.cave-ayland@ilande.co.uk
Subject: Re: [PATCH v2 7/7] target/sparc: Split out do_ms16b
Date: Fri, 3 May 2024 21:12:40 +0200	[thread overview]
Message-ID: <04d8919d-4fcf-4fc5-839a-6d08947b87f8@linaro.org> (raw)
In-Reply-To: <fc03eef5-ab39-4684-b89a-4d690ad4217e@linaro.org>

On 3/5/24 21:11, Philippe Mathieu-Daudé wrote:
> On 2/5/24 18:55, Richard Henderson wrote:
>> The unit operation for fmul8x16 and friends is described in the
>> manual as "MS16b".  Split that out for clarity.  Improve rounding
>> with an unconditional addition of 0.5 as a fixed-point integer.
>>
>> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
>> ---
>>   target/sparc/vis_helper.c | 78 ++++++++++++---------------------------
>>   1 file changed, 24 insertions(+), 54 deletions(-)
> 
> 
>> @@ -150,23 +138,14 @@ uint64_t helper_fmul8x16a(uint32_t src1, int32_t 
>> src2)
>>   uint64_t helper_fmul8sux16(uint64_t src1, uint64_t src2)
>>   {
>>       VIS64 s, d;
>> -    uint32_t tmp;
>>       s.ll = src1;
>>       d.ll = src2;
>> -#define 
>> PMUL(r)                                                         \
>> -    tmp = (int32_t)d.VIS_SW64(r) * ((int32_t)s.VIS_SW64(r) >> 
>> 8);       \
>> -    if ((tmp & 0xff) > 0x7f) 
>> {                                          \
>> -        tmp += 
>> 0x100;                                                   \
>> -    
>> }                                                                   \
>> -    d.VIS_W64(r) = tmp >> 8;
>> -
>> -    PMUL(0);
>> -    PMUL(1);
>> -    PMUL(2);
>> -    PMUL(3);
>> -#undef PMUL
>> +    d.VIS_W64(0) = do_ms16b(s.VIS_SB64(1), d.VIS_SW64(0));
> 
> s.VIS_SB64(1) = upper bit, OK.

I meant "bits" (plural)!

> 
>> +    d.VIS_W64(1) = do_ms16b(s.VIS_SB64(3), d.VIS_SW64(1));
>> +    d.VIS_W64(2) = do_ms16b(s.VIS_SB64(5), d.VIS_SW64(2));
>> +    d.VIS_W64(3) = do_ms16b(s.VIS_SB64(7), d.VIS_SW64(3));
>>       return d.ll;
>>   }
>> @@ -174,23 +153,14 @@ uint64_t helper_fmul8sux16(uint64_t src1, 
>> uint64_t src2)
>>   uint64_t helper_fmul8ulx16(uint64_t src1, uint64_t src2)
>>   {
>>       VIS64 s, d;
>> -    uint32_t tmp;
>>       s.ll = src1;
>>       d.ll = src2;
>> -#define 
>> PMUL(r)                                                         \
>> -    tmp = (int32_t)d.VIS_SW64(r) * ((uint32_t)s.VIS_B64(r * 
>> 2));        \
>> -    if ((tmp & 0xff) > 0x7f) 
>> {                                          \
>> -        tmp += 
>> 0x100;                                                   \
>> -    
>> }                                                                   \
>> -    d.VIS_W64(r) = tmp >> 8;
>> -
>> -    PMUL(0);
>> -    PMUL(1);
>> -    PMUL(2);
>> -    PMUL(3);
>> -#undef PMUL
>> +    d.VIS_W64(0) = do_ms16b(s.VIS_B64(0), d.VIS_SW64(0));
> 
> s.VIS_B64(0) for lower bit, OK.

Ditto.

> 
>> +    d.VIS_W64(1) = do_ms16b(s.VIS_B64(2), d.VIS_SW64(1));
>> +    d.VIS_W64(2) = do_ms16b(s.VIS_B64(4), d.VIS_SW64(2));
>> +    d.VIS_W64(3) = do_ms16b(s.VIS_B64(6), d.VIS_SW64(3));
>>       return d.ll;
>>   }
> 
> Maybe add a comment for high/low bits in fmul8sux16/fmul8ulx16,
> as it was not obvious at first. Otherwise,
> 
> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> 



  reply	other threads:[~2024-05-03 19:13 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-05-02 16:55 [PATCH v2 0/7] target/sparc: vis fixes Richard Henderson
2024-05-02 16:55 ` [PATCH v2 1/7] linux-user/sparc: Add more hwcap bits for sparc64 Richard Henderson
2024-05-02 16:55 ` [PATCH v2 2/7] target/sparc: Fix FEXPAND Richard Henderson
2024-05-03 18:34   ` Philippe Mathieu-Daudé
2024-05-02 16:55 ` [PATCH v2 3/7] target/sparc: Fix FMUL8x16 Richard Henderson
2024-05-03 18:31   ` Philippe Mathieu-Daudé
2024-05-02 16:55 ` [PATCH v2 4/7] target/sparc: Fix FMUL8x16A{U,L} Richard Henderson
2024-05-03 18:32   ` Philippe Mathieu-Daudé
2024-05-02 16:55 ` [PATCH v2 5/7] target/sparc: Fix FMULD8*X16 Richard Henderson
2024-05-06 14:12   ` Philippe Mathieu-Daudé
2024-05-02 16:55 ` [PATCH v2 6/7] target/sparc: Fix FPMERGE Richard Henderson
2024-05-03 18:27   ` Philippe Mathieu-Daudé
2024-05-02 16:55 ` [PATCH v2 7/7] target/sparc: Split out do_ms16b Richard Henderson
2024-05-03 19:11   ` Philippe Mathieu-Daudé
2024-05-03 19:12     ` Philippe Mathieu-Daudé [this message]
2024-05-03 18:18 ` [PATCH v2 0/7] target/sparc: vis fixes Philippe Mathieu-Daudé
2024-05-05 20:13   ` Mark Cave-Ayland
2024-05-05 20:05 ` Mark Cave-Ayland

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