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From: Jani Nikula <jani.nikula@linux.intel.com>
To: Ville Syrjala <ville.syrjala@linux.intel.com>,
	intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH v2 15/17] drm/i915: Clean up jsl/ehl buf trans functions
Date: Wed, 23 Jun 2021 17:13:53 +0300	[thread overview]
Message-ID: <87tulou0ri.fsf@intel.com> (raw)
In-Reply-To: <20210608073603.2408-16-ville.syrjala@linux.intel.com>

On Tue, 08 Jun 2021, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> The jsl/ehl buf trans functions are needlessly conplicated.
                                                   ^

My only disappointment here is that now some of the
*_get_combo_buf_trans_edp() functions handle low vswing inside, and some
expect to only be called for low vswing.

At least cnl could switch to same style as here, the rest get more
complicated.

Not a big issue, and the code is easy enough to follow for each
individual platform. And I like the reduction in call depth.

Reviewed-by: Jani Nikula <jani.nikula@intel.com>


> Simplify them.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  .../drm/i915/display/intel_ddi_buf_trans.c    | 87 +++++--------------
>  1 file changed, 20 insertions(+), 67 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
> index 9398aa62585b..2bd51ce4aa2c 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
> @@ -1377,42 +1377,16 @@ icl_get_mg_buf_trans(struct intel_encoder *encoder,
>  		return icl_get_mg_buf_trans_dp(encoder, crtc_state, n_entries);
>  }
>  
> -static const struct intel_ddi_buf_trans *
> -ehl_get_combo_buf_trans_hdmi(struct intel_encoder *encoder,
> -			     const struct intel_crtc_state *crtc_state,
> -			     int *n_entries)
> -{
> -	return intel_get_buf_trans(&icl_combo_phy_ddi_translations_hdmi,
> -				   n_entries);
> -}
> -
> -static const struct intel_ddi_buf_trans *
> -ehl_get_combo_buf_trans_dp(struct intel_encoder *encoder,
> -			   const struct intel_crtc_state *crtc_state,
> -			   int *n_entries)
> -{
> -	return intel_get_buf_trans(&ehl_combo_phy_ddi_translations_dp,
> -				   n_entries);
> -}
>  
>  static const struct intel_ddi_buf_trans *
>  ehl_get_combo_buf_trans_edp(struct intel_encoder *encoder,
>  			    const struct intel_crtc_state *crtc_state,
>  			    int *n_entries)
>  {
> -	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> -
> -	if (dev_priv->vbt.edp.low_vswing) {
> -		if (crtc_state->port_clock > 270000) {
> -			return intel_get_buf_trans(&ehl_combo_phy_ddi_translations_edp_hbr2,
> -						   n_entries);
> -		} else {
> -			return intel_get_buf_trans(&icl_combo_phy_ddi_translations_edp_hbr2,
> -						   n_entries);
> -		}
> -	}
> -
> -	return ehl_get_combo_buf_trans_dp(encoder, crtc_state, n_entries);
> +	if (crtc_state->port_clock > 270000)
> +		return intel_get_buf_trans(&ehl_combo_phy_ddi_translations_edp_hbr2, n_entries);
> +	else
> +		return intel_get_buf_trans(&icl_combo_phy_ddi_translations_edp_hbr2, n_entries);
>  }
>  
>  static const struct intel_ddi_buf_trans *
> @@ -1420,30 +1394,15 @@ ehl_get_combo_buf_trans(struct intel_encoder *encoder,
>  			const struct intel_crtc_state *crtc_state,
>  			int *n_entries)
>  {
> +	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> +
>  	if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI))
> -		return ehl_get_combo_buf_trans_hdmi(encoder, crtc_state, n_entries);
> -	else if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_EDP))
> +		return intel_get_buf_trans(&icl_combo_phy_ddi_translations_hdmi, n_entries);
> +	else if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_EDP) &&
> +		 dev_priv->vbt.edp.low_vswing)
>  		return ehl_get_combo_buf_trans_edp(encoder, crtc_state, n_entries);
>  	else
> -		return ehl_get_combo_buf_trans_dp(encoder, crtc_state, n_entries);
> -}
> -
> -static const struct intel_ddi_buf_trans *
> -jsl_get_combo_buf_trans_hdmi(struct intel_encoder *encoder,
> -			     const struct intel_crtc_state *crtc_state,
> -			     int *n_entries)
> -{
> -	return intel_get_buf_trans(&icl_combo_phy_ddi_translations_hdmi,
> -				   n_entries);
> -}
> -
> -static const struct intel_ddi_buf_trans *
> -jsl_get_combo_buf_trans_dp(struct intel_encoder *encoder,
> -			   const struct intel_crtc_state *crtc_state,
> -			   int *n_entries)
> -{
> -	return intel_get_buf_trans(&icl_combo_phy_ddi_translations_dp_hbr2_edp_hbr3,
> -				   n_entries);
> +		return intel_get_buf_trans(&ehl_combo_phy_ddi_translations_dp, n_entries);
>  }
>  
>  static const struct intel_ddi_buf_trans *
> @@ -1451,19 +1410,10 @@ jsl_get_combo_buf_trans_edp(struct intel_encoder *encoder,
>  			    const struct intel_crtc_state *crtc_state,
>  			    int *n_entries)
>  {
> -	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> -
> -	if (dev_priv->vbt.edp.low_vswing) {
> -		if (crtc_state->port_clock > 270000) {
> -			return intel_get_buf_trans(&jsl_combo_phy_ddi_translations_edp_hbr2,
> -						   n_entries);
> -		} else {
> -			return intel_get_buf_trans(&jsl_combo_phy_ddi_translations_edp_hbr,
> -						   n_entries);
> -		}
> -	}
> -
> -	return jsl_get_combo_buf_trans_dp(encoder, crtc_state, n_entries);
> +	if (crtc_state->port_clock > 270000)
> +		return intel_get_buf_trans(&jsl_combo_phy_ddi_translations_edp_hbr2, n_entries);
> +	else
> +		return intel_get_buf_trans(&jsl_combo_phy_ddi_translations_edp_hbr, n_entries);
>  }
>  
>  static const struct intel_ddi_buf_trans *
> @@ -1471,12 +1421,15 @@ jsl_get_combo_buf_trans(struct intel_encoder *encoder,
>  			const struct intel_crtc_state *crtc_state,
>  			int *n_entries)
>  {
> +	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> +
>  	if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI))
> -		return jsl_get_combo_buf_trans_hdmi(encoder, crtc_state, n_entries);
> -	else if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_EDP))
> +		return intel_get_buf_trans(&icl_combo_phy_ddi_translations_hdmi, n_entries);
> +	else if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_EDP) &&
> +		 dev_priv->vbt.edp.low_vswing)
>  		return jsl_get_combo_buf_trans_edp(encoder, crtc_state, n_entries);
>  	else
> -		return jsl_get_combo_buf_trans_dp(encoder, crtc_state, n_entries);
> +		return intel_get_buf_trans(&icl_combo_phy_ddi_translations_dp_hbr2_edp_hbr3, n_entries);
>  }
>  
>  static const struct intel_ddi_buf_trans *

-- 
Jani Nikula, Intel Open Source Graphics Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  reply	other threads:[~2021-06-23 14:14 UTC|newest]

Thread overview: 38+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-06-08  7:35 [Intel-gfx] [PATCH v2 00/17] drm/i915: DDI buf trans cleaup and fixes Ville Syrjala
2021-06-08  7:35 ` [Intel-gfx] [PATCH v2 01/17] drm/i915: s/intel/hsw/ for hsw/bdw/skl buf trans Ville Syrjala
2021-06-08  7:35 ` [Intel-gfx] [PATCH v2 02/17] drm/i915: Introduce hsw_get_buf_trans() Ville Syrjala
2021-06-08  7:35 ` [Intel-gfx] [PATCH v2 03/17] drm/i915: Wrap the platform specific buf trans structs into a union Ville Syrjala
2021-06-18 12:04   ` Jani Nikula
2021-06-08  7:35 ` [Intel-gfx] [PATCH v2 04/17] drm/i915: Rename dkl phy buf trans tables Ville Syrjala
2021-06-18 12:04   ` Jani Nikula
2021-06-08  7:35 ` [Intel-gfx] [PATCH v2 05/17] drm/i915: Wrap the buf trans tables into a struct Ville Syrjala
2021-06-18 12:05   ` Jani Nikula
2021-06-08  7:35 ` [Intel-gfx] [PATCH v2 06/17] drm/i915: Introduce intel_get_buf_trans() Ville Syrjala
2021-06-18 12:08   ` Jani Nikula
2021-06-08  7:35 ` [Intel-gfx] [PATCH v2 07/17] drm/i915; Return the whole buf_trans struct from get_buf_trans() Ville Syrjala
2021-06-18 12:11   ` Jani Nikula
2021-06-08  7:35 ` [Intel-gfx] [PATCH v2 08/17] drm/i915: Store the HDMI default entry in the bug trans struct Ville Syrjala
2021-06-08  7:35 ` [Intel-gfx] [PATCH v2 09/17] drm/i915: Introduce encoder->get_buf_trans() Ville Syrjala
2021-06-18 12:19   ` Jani Nikula
2021-06-08  7:35 ` [Intel-gfx] [PATCH v2 10/17] drm/i915: Clean up hsw/bdw/skl/kbl buf trans funcs Ville Syrjala
2021-06-08  7:35 ` [Intel-gfx] [PATCH v2 11/17] drm/i915: Introduce rkl_get_combo_buf_trans() Ville Syrjala
2021-06-18 12:22   ` Jani Nikula
2021-06-08  7:35 ` [Intel-gfx] [PATCH v2 12/17] drm/i915: Fix dg1 buf trans tables Ville Syrjala
2021-06-18 12:28   ` Jani Nikula
2021-06-08  7:35 ` [Intel-gfx] [PATCH v2 13/17] drm/i915: Deduplicate icl DP HBR2 vs. eDP HBR3 table Ville Syrjala
2021-06-18 12:30   ` Jani Nikula
2021-06-23 12:55     ` Ville Syrjälä
2021-06-08  7:36 ` [Intel-gfx] [PATCH v2 14/17] drm/i915: Fix ehl edp hbr2 vswing table Ville Syrjala
2021-06-23 14:02   ` Jani Nikula
2021-06-08  7:36 ` [Intel-gfx] [PATCH v2 15/17] drm/i915: Clean up jsl/ehl buf trans functions Ville Syrjala
2021-06-23 14:13   ` Jani Nikula [this message]
2021-06-24 17:05     ` Ville Syrjälä
2021-06-08  7:36 ` [Intel-gfx] [PATCH v2 16/17] drm/i915: Nuke buf_trans hdmi functions Ville Syrjala
2021-06-23 14:14   ` Jani Nikula
2021-06-08  7:36 ` [Intel-gfx] [PATCH v2 17/17] drm/i915: Add the missing adls vswing tables Ville Syrjala
2021-06-23 14:36   ` Jani Nikula
2021-06-08  8:46 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: DDI buf trans cleaup and fixes (rev4) Patchwork
2021-06-08  8:47 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-06-08  9:15 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-06-08  9:15 ` [Intel-gfx] ✗ Fi.CI.BUILD: warning " Patchwork
2021-06-08 13:33 ` [Intel-gfx] ✓ Fi.CI.IGT: success " Patchwork

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