From: Jani Nikula <jani.nikula@intel.com>
To: Ville Syrjala <ville.syrjala@linux.intel.com>,
intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH v2 09/17] drm/i915: Introduce encoder->get_buf_trans()
Date: Fri, 18 Jun 2021 15:19:02 +0300 [thread overview]
Message-ID: <877dirwekp.fsf@intel.com> (raw)
In-Reply-To: <20210608073603.2408-10-ville.syrjala@linux.intel.com>
On Tue, 08 Jun 2021, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Convert the get_buf_trans() functions into an encoder vfunc.
> Allows us to get rid of bunch of platform if-ladders.
>
> v2: Handle adl-p
>
> Reviewed-by: Jani Nikula <jani.nikula@intel.com> #v1
Holds for v2.
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_crt.c | 3 +
> drivers/gpu/drm/i915/display/intel_ddi.c | 61 +++------------
> .../drm/i915/display/intel_ddi_buf_trans.c | 75 +++++++++++--------
> .../drm/i915/display/intel_ddi_buf_trans.h | 44 +----------
> .../drm/i915/display/intel_display_types.h | 4 +
> drivers/gpu/drm/i915/display/intel_fdi.c | 3 +-
> 6 files changed, 65 insertions(+), 125 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_crt.c b/drivers/gpu/drm/i915/display/intel_crt.c
> index 648f1c0d3d39..408f82b0dc7d 100644
> --- a/drivers/gpu/drm/i915/display/intel_crt.c
> +++ b/drivers/gpu/drm/i915/display/intel_crt.c
> @@ -38,6 +38,7 @@
> #include "intel_crt.h"
> #include "intel_crtc.h"
> #include "intel_ddi.h"
> +#include "intel_ddi_buf_trans.h"
> #include "intel_de.h"
> #include "intel_display_types.h"
> #include "intel_fdi.h"
> @@ -1081,6 +1082,8 @@ void intel_crt_init(struct drm_i915_private *dev_priv)
> crt->base.enable_clock = hsw_ddi_enable_clock;
> crt->base.disable_clock = hsw_ddi_disable_clock;
> crt->base.is_clock_enabled = hsw_ddi_is_clock_enabled;
> +
> + intel_ddi_buf_trans_init(&crt->base);
> } else {
> if (HAS_PCH_SPLIT(dev_priv)) {
> crt->base.compute_config = pch_crt_compute_config;
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
> index 37445cec0c23..d8b4db602d30 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -104,8 +104,7 @@ void hsw_prepare_dp_ddi_buffers(struct intel_encoder *encoder,
> enum port port = encoder->port;
> const struct intel_ddi_buf_trans *ddi_translations;
>
> - ddi_translations = hsw_get_buf_trans(encoder, crtc_state, &n_entries);
> -
> + ddi_translations = encoder->get_buf_trans(encoder, crtc_state, &n_entries);
> if (drm_WARN_ON_ONCE(&dev_priv->drm, !ddi_translations))
> return;
>
> @@ -137,8 +136,7 @@ static void hsw_prepare_hdmi_ddi_buffers(struct intel_encoder *encoder,
> enum port port = encoder->port;
> const struct intel_ddi_buf_trans *ddi_translations;
>
> - ddi_translations = hsw_get_buf_trans(encoder, crtc_state, &n_entries);
> -
> + ddi_translations = encoder->get_buf_trans(encoder, crtc_state, &n_entries);
> if (drm_WARN_ON_ONCE(&dev_priv->drm, !ddi_translations))
> return;
> if (drm_WARN_ON_ONCE(&dev_priv->drm, level >= n_entries))
> @@ -947,8 +945,7 @@ static void skl_ddi_set_iboost(struct intel_encoder *encoder,
> const struct intel_ddi_buf_trans *ddi_translations;
> int n_entries;
>
> - ddi_translations = hsw_get_buf_trans(encoder, crtc_state, &n_entries);
> -
> + ddi_translations = encoder->get_buf_trans(encoder, crtc_state, &n_entries);
> if (drm_WARN_ON_ONCE(&dev_priv->drm, !ddi_translations))
> return;
> if (drm_WARN_ON_ONCE(&dev_priv->drm, level >= n_entries))
> @@ -978,7 +975,7 @@ static void bxt_ddi_vswing_sequence(struct intel_encoder *encoder,
> enum port port = encoder->port;
> int n_entries;
>
> - ddi_translations = bxt_get_buf_trans(encoder, crtc_state, &n_entries);
> + ddi_translations = encoder->get_buf_trans(encoder, crtc_state, &n_entries);
> if (drm_WARN_ON_ONCE(&dev_priv->drm, !ddi_translations))
> return;
> if (drm_WARN_ON_ONCE(&dev_priv->drm, level >= n_entries))
> @@ -996,33 +993,9 @@ static u8 intel_ddi_dp_voltage_max(struct intel_dp *intel_dp,
> {
> struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
> struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> - enum port port = encoder->port;
> - enum phy phy = intel_port_to_phy(dev_priv, port);
> int n_entries;
>
> - if (DISPLAY_VER(dev_priv) >= 12) {
> - if (intel_phy_is_combo(dev_priv, phy))
> - tgl_get_combo_buf_trans(encoder, crtc_state, &n_entries);
> - else if (IS_ALDERLAKE_P(dev_priv))
> - adlp_get_dkl_buf_trans(encoder, crtc_state, &n_entries);
> - else
> - tgl_get_dkl_buf_trans(encoder, crtc_state, &n_entries);
> - } else if (DISPLAY_VER(dev_priv) == 11) {
> - if (IS_PLATFORM(dev_priv, INTEL_JASPERLAKE))
> - jsl_get_combo_buf_trans(encoder, crtc_state, &n_entries);
> - else if (IS_PLATFORM(dev_priv, INTEL_ELKHARTLAKE))
> - ehl_get_combo_buf_trans(encoder, crtc_state, &n_entries);
> - else if (intel_phy_is_combo(dev_priv, phy))
> - icl_get_combo_buf_trans(encoder, crtc_state, &n_entries);
> - else
> - icl_get_mg_buf_trans(encoder, crtc_state, &n_entries);
> - } else if (IS_CANNONLAKE(dev_priv)) {
> - cnl_get_buf_trans(encoder, crtc_state, &n_entries);
> - } else if (IS_GEMINILAKE(dev_priv) || IS_BROXTON(dev_priv)) {
> - bxt_get_buf_trans(encoder, crtc_state, &n_entries);
> - } else {
> - hsw_get_buf_trans(encoder, crtc_state, &n_entries);
> - }
> + encoder->get_buf_trans(encoder, crtc_state, &n_entries);
>
> if (drm_WARN_ON(&dev_priv->drm, n_entries < 1))
> n_entries = 1;
> @@ -1054,8 +1027,7 @@ static void cnl_ddi_vswing_program(struct intel_encoder *encoder,
> int n_entries, ln;
> u32 val;
>
> - ddi_translations = cnl_get_buf_trans(encoder, crtc_state, &n_entries);
> -
> + ddi_translations = encoder->get_buf_trans(encoder, crtc_state, &n_entries);
> if (drm_WARN_ON_ONCE(&dev_priv->drm, !ddi_translations))
> return;
> if (drm_WARN_ON_ONCE(&dev_priv->drm, level >= n_entries))
> @@ -1175,15 +1147,7 @@ static void icl_ddi_combo_vswing_program(struct intel_encoder *encoder,
> int n_entries, ln;
> u32 val;
>
> - if (DISPLAY_VER(dev_priv) >= 12)
> - ddi_translations = tgl_get_combo_buf_trans(encoder, crtc_state, &n_entries);
> - else if (IS_PLATFORM(dev_priv, INTEL_JASPERLAKE))
> - ddi_translations = jsl_get_combo_buf_trans(encoder, crtc_state, &n_entries);
> - else if (IS_PLATFORM(dev_priv, INTEL_ELKHARTLAKE))
> - ddi_translations = ehl_get_combo_buf_trans(encoder, crtc_state, &n_entries);
> - else
> - ddi_translations = icl_get_combo_buf_trans(encoder, crtc_state, &n_entries);
> -
> + ddi_translations = encoder->get_buf_trans(encoder, crtc_state, &n_entries);
> if (drm_WARN_ON_ONCE(&dev_priv->drm, !ddi_translations))
> return;
> if (drm_WARN_ON_ONCE(&dev_priv->drm, level >= n_entries))
> @@ -1310,8 +1274,7 @@ static void icl_mg_phy_ddi_vswing_sequence(struct intel_encoder *encoder,
> if (enc_to_dig_port(encoder)->tc_mode == TC_PORT_TBT_ALT)
> return;
>
> - ddi_translations = icl_get_mg_buf_trans(encoder, crtc_state, &n_entries);
> -
> + ddi_translations = encoder->get_buf_trans(encoder, crtc_state, &n_entries);
> if (drm_WARN_ON_ONCE(&dev_priv->drm, !ddi_translations))
> return;
> if (drm_WARN_ON_ONCE(&dev_priv->drm, level >= n_entries))
> @@ -1448,11 +1411,7 @@ tgl_dkl_phy_ddi_vswing_sequence(struct intel_encoder *encoder,
> if (enc_to_dig_port(encoder)->tc_mode == TC_PORT_TBT_ALT)
> return;
>
> - if (IS_ALDERLAKE_P(dev_priv))
> - ddi_translations = adlp_get_dkl_buf_trans(encoder, crtc_state, &n_entries);
> - else
> - ddi_translations = tgl_get_dkl_buf_trans(encoder, crtc_state, &n_entries);
> -
> + ddi_translations = encoder->get_buf_trans(encoder, crtc_state, &n_entries);
> if (drm_WARN_ON_ONCE(&dev_priv->drm, !ddi_translations))
> return;
> if (drm_WARN_ON_ONCE(&dev_priv->drm, level >= n_entries))
> @@ -4662,6 +4621,8 @@ void intel_ddi_init(struct drm_i915_private *dev_priv, enum port port)
> encoder->get_config = hsw_ddi_get_config;
> }
>
> + intel_ddi_buf_trans_init(encoder);
> +
> if (DISPLAY_VER(dev_priv) >= 13)
> encoder->hpd_pin = xelpd_hpd_pin(dev_priv, port);
> else if (IS_DG1(dev_priv))
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
> index fd2216dc8c33..f8915a8c78d8 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
> @@ -1246,7 +1246,7 @@ hsw_get_buf_trans_hdmi(struct intel_encoder *encoder,
> return NULL;
> }
>
> -const struct intel_ddi_buf_trans *
> +static const struct intel_ddi_buf_trans *
> hsw_get_buf_trans(struct intel_encoder *encoder,
> const struct intel_crtc_state *crtc_state,
> int *n_entries)
> @@ -1286,7 +1286,7 @@ bxt_get_buf_trans_hdmi(struct intel_encoder *encoder, int *n_entries)
> return intel_get_buf_trans(&bxt_ddi_translations_hdmi, n_entries);
> }
>
> -const struct intel_ddi_buf_trans *
> +static const struct intel_ddi_buf_trans *
> bxt_get_buf_trans(struct intel_encoder *encoder,
> const struct intel_crtc_state *crtc_state,
> int *n_entries)
> @@ -1368,7 +1368,7 @@ cnl_get_buf_trans_edp(struct intel_encoder *encoder, int *n_entries)
> }
> }
>
> -const struct intel_ddi_buf_trans *
> +static const struct intel_ddi_buf_trans *
> cnl_get_buf_trans(struct intel_encoder *encoder,
> const struct intel_crtc_state *crtc_state,
> int *n_entries)
> @@ -1422,7 +1422,7 @@ icl_get_combo_buf_trans_edp(struct intel_encoder *encoder,
> return icl_get_combo_buf_trans_dp(encoder, crtc_state, n_entries);
> }
>
> -const struct intel_ddi_buf_trans *
> +static const struct intel_ddi_buf_trans *
> icl_get_combo_buf_trans(struct intel_encoder *encoder,
> const struct intel_crtc_state *crtc_state,
> int *n_entries)
> @@ -1458,7 +1458,7 @@ icl_get_mg_buf_trans_dp(struct intel_encoder *encoder,
> }
> }
>
> -const struct intel_ddi_buf_trans *
> +static const struct intel_ddi_buf_trans *
> icl_get_mg_buf_trans(struct intel_encoder *encoder,
> const struct intel_crtc_state *crtc_state,
> int *n_entries)
> @@ -1502,7 +1502,7 @@ ehl_get_combo_buf_trans_edp(struct intel_encoder *encoder,
> return ehl_get_combo_buf_trans_dp(encoder, crtc_state, n_entries);
> }
>
> -const struct intel_ddi_buf_trans *
> +static const struct intel_ddi_buf_trans *
> ehl_get_combo_buf_trans(struct intel_encoder *encoder,
> const struct intel_crtc_state *crtc_state,
> int *n_entries)
> @@ -1553,7 +1553,7 @@ jsl_get_combo_buf_trans_edp(struct intel_encoder *encoder,
> return jsl_get_combo_buf_trans_dp(encoder, crtc_state, n_entries);
> }
>
> -const struct intel_ddi_buf_trans *
> +static const struct intel_ddi_buf_trans *
> jsl_get_combo_buf_trans(struct intel_encoder *encoder,
> const struct intel_crtc_state *crtc_state,
> int *n_entries)
> @@ -1626,7 +1626,7 @@ tgl_get_combo_buf_trans_edp(struct intel_encoder *encoder,
> return tgl_get_combo_buf_trans_dp(encoder, crtc_state, n_entries);
> }
>
> -const struct intel_ddi_buf_trans *
> +static const struct intel_ddi_buf_trans *
> tgl_get_combo_buf_trans(struct intel_encoder *encoder,
> const struct intel_crtc_state *crtc_state,
> int *n_entries)
> @@ -1662,7 +1662,7 @@ tgl_get_dkl_buf_trans_dp(struct intel_encoder *encoder,
> }
> }
>
> -const struct intel_ddi_buf_trans *
> +static const struct intel_ddi_buf_trans *
> tgl_get_dkl_buf_trans(struct intel_encoder *encoder,
> const struct intel_crtc_state *crtc_state,
> int *n_entries)
> @@ -1687,7 +1687,7 @@ adlp_get_dkl_buf_trans_dp(struct intel_encoder *encoder,
> }
> }
>
> -const struct intel_ddi_buf_trans *
> +static const struct intel_ddi_buf_trans *
> adlp_get_dkl_buf_trans(struct intel_encoder *encoder,
> const struct intel_crtc_state *crtc_state,
> int *n_entries)
> @@ -1703,28 +1703,10 @@ int intel_ddi_hdmi_num_entries(struct intel_encoder *encoder,
> int *default_entry)
> {
> struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> - enum phy phy = intel_port_to_phy(dev_priv, encoder->port);
> - const struct intel_ddi_buf_trans *ddi_translations = NULL;
> + const struct intel_ddi_buf_trans *ddi_translations;
> int n_entries;
>
> - if (DISPLAY_VER(dev_priv) >= 12) {
> - if (intel_phy_is_combo(dev_priv, phy))
> - ddi_translations = tgl_get_combo_buf_trans_hdmi(encoder, crtc_state, &n_entries);
> - else
> - ddi_translations = tgl_get_dkl_buf_trans_hdmi(encoder, crtc_state, &n_entries);
> - } else if (DISPLAY_VER(dev_priv) == 11) {
> - if (intel_phy_is_combo(dev_priv, phy))
> - ddi_translations = icl_get_combo_buf_trans_hdmi(encoder, crtc_state, &n_entries);
> - else
> - ddi_translations = icl_get_mg_buf_trans_hdmi(encoder, crtc_state, &n_entries);
> - } else if (IS_CANNONLAKE(dev_priv)) {
> - ddi_translations = cnl_get_buf_trans_hdmi(encoder, &n_entries);
> - } else if (IS_GEMINILAKE(dev_priv) || IS_BROXTON(dev_priv)) {
> - ddi_translations = bxt_get_buf_trans_hdmi(encoder, &n_entries);
> - } else if (DISPLAY_VER(dev_priv) == 9 ||
> - IS_BROADWELL(dev_priv) || IS_HASWELL(dev_priv)) {
> - ddi_translations = hsw_get_buf_trans_hdmi(encoder, &n_entries);
> - }
> + ddi_translations = encoder->get_buf_trans(encoder, crtc_state, &n_entries);
>
> if (drm_WARN_ON(&dev_priv->drm, !ddi_translations)) {
> *default_entry = 0;
> @@ -1735,3 +1717,36 @@ int intel_ddi_hdmi_num_entries(struct intel_encoder *encoder,
>
> return n_entries;
> }
> +
> +void intel_ddi_buf_trans_init(struct intel_encoder *encoder)
> +{
> + struct drm_i915_private *i915 = to_i915(encoder->base.dev);
> + enum phy phy = intel_port_to_phy(i915, encoder->port);
> +
> + if (IS_ALDERLAKE_P(i915)) {
> + if (intel_phy_is_combo(i915, phy))
> + encoder->get_buf_trans = tgl_get_combo_buf_trans;
> + else
> + encoder->get_buf_trans = adlp_get_dkl_buf_trans;
> + } else if (DISPLAY_VER(i915) >= 12) {
> + if (intel_phy_is_combo(i915, phy))
> + encoder->get_buf_trans = tgl_get_combo_buf_trans;
> + else
> + encoder->get_buf_trans = tgl_get_dkl_buf_trans;
> + } else if (DISPLAY_VER(i915) == 11) {
> + if (IS_PLATFORM(i915, INTEL_JASPERLAKE))
> + encoder->get_buf_trans = jsl_get_combo_buf_trans;
> + else if (IS_PLATFORM(i915, INTEL_ELKHARTLAKE))
> + encoder->get_buf_trans = ehl_get_combo_buf_trans;
> + else if (intel_phy_is_combo(i915, phy))
> + encoder->get_buf_trans = icl_get_combo_buf_trans;
> + else
> + encoder->get_buf_trans = icl_get_mg_buf_trans;
> + } else if (IS_CANNONLAKE(i915)) {
> + encoder->get_buf_trans = cnl_get_buf_trans;
> + } else if (IS_GEMINILAKE(i915) || IS_BROXTON(i915)) {
> + encoder->get_buf_trans = bxt_get_buf_trans;
> + } else {
> + encoder->get_buf_trans = hsw_get_buf_trans;
> + }
> +}
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h
> index 879f1deec3c8..05226eb46cd6 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h
> +++ b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h
> @@ -65,48 +65,6 @@ int intel_ddi_hdmi_num_entries(struct intel_encoder *encoder,
> const struct intel_crtc_state *crtc_state,
> int *default_entry);
>
> -const struct intel_ddi_buf_trans *
> -hsw_get_buf_trans(struct intel_encoder *encoder,
> - const struct intel_crtc_state *crtc_state,
> - int *n_entries);
> -
> -const struct intel_ddi_buf_trans *
> -bxt_get_buf_trans(struct intel_encoder *encoder,
> - const struct intel_crtc_state *crtc_state,
> - int *n_entries);
> -
> -const struct intel_ddi_buf_trans *
> -adlp_get_dkl_buf_trans(struct intel_encoder *encoder,
> - const struct intel_crtc_state *crtc_state,
> - int *n_entries);
> -const struct intel_ddi_buf_trans *
> -tgl_get_combo_buf_trans(struct intel_encoder *encoder,
> - const struct intel_crtc_state *crtc_state,
> - int *n_entries);
> -const struct intel_ddi_buf_trans *
> -tgl_get_dkl_buf_trans(struct intel_encoder *encoder,
> - const struct intel_crtc_state *crtc_state,
> - int *n_entries);
> -const struct intel_ddi_buf_trans *
> -jsl_get_combo_buf_trans(struct intel_encoder *encoder,
> - const struct intel_crtc_state *crtc_state,
> - int *n_entries);
> -const struct intel_ddi_buf_trans *
> -ehl_get_combo_buf_trans(struct intel_encoder *encoder,
> - const struct intel_crtc_state *crtc_state,
> - int *n_entries);
> -const struct intel_ddi_buf_trans *
> -icl_get_combo_buf_trans(struct intel_encoder *encoder,
> - const struct intel_crtc_state *crtc_state,
> - int *n_entries);
> -const struct intel_ddi_buf_trans *
> -icl_get_mg_buf_trans(struct intel_encoder *encoder,
> - const struct intel_crtc_state *crtc_state,
> - int *n_entries);
> -
> -const struct intel_ddi_buf_trans *
> -cnl_get_buf_trans(struct intel_encoder *encoder,
> - const struct intel_crtc_state *crtc_state,
> - int *n_entries);
> +void intel_ddi_buf_trans_init(struct intel_encoder *encoder);
>
> #endif
> diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
> index b8d1f702d808..d4a0994f8619 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> @@ -48,6 +48,7 @@
>
> struct drm_printer;
> struct __intel_global_objs_state;
> +struct intel_ddi_buf_trans;
>
> /*
> * Display related stuff
> @@ -263,6 +264,9 @@ struct intel_encoder {
> * Returns whether the port clock is enabled or not.
> */
> bool (*is_clock_enabled)(struct intel_encoder *encoder);
> + const struct intel_ddi_buf_trans *(*get_buf_trans)(struct intel_encoder *encoder,
> + const struct intel_crtc_state *crtc_state,
> + int *n_entries);
> enum hpd_pin hpd_pin;
> enum intel_display_power_domain power_domain;
> /* for communication with audio component; protected by av_mutex */
> diff --git a/drivers/gpu/drm/i915/display/intel_fdi.c b/drivers/gpu/drm/i915/display/intel_fdi.c
> index c602ed17c4fb..15ea28726e7a 100644
> --- a/drivers/gpu/drm/i915/display/intel_fdi.c
> +++ b/drivers/gpu/drm/i915/display/intel_fdi.c
> @@ -4,7 +4,6 @@
> */
> #include "intel_atomic.h"
> #include "intel_ddi.h"
> -#include "intel_ddi_buf_trans.h"
> #include "intel_de.h"
> #include "intel_display_types.h"
> #include "intel_fdi.h"
> @@ -569,7 +568,7 @@ void hsw_fdi_link_train(struct intel_encoder *encoder,
> u32 temp, i, rx_ctl_val;
> int n_entries;
>
> - hsw_get_buf_trans(encoder, crtc_state, &n_entries);
> + encoder->get_buf_trans(encoder, crtc_state, &n_entries);
>
> hsw_prepare_dp_ddi_buffers(encoder, crtc_state);
--
Jani Nikula, Intel Open Source Graphics Center
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next prev parent reply other threads:[~2021-06-18 12:19 UTC|newest]
Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-06-08 7:35 [Intel-gfx] [PATCH v2 00/17] drm/i915: DDI buf trans cleaup and fixes Ville Syrjala
2021-06-08 7:35 ` [Intel-gfx] [PATCH v2 01/17] drm/i915: s/intel/hsw/ for hsw/bdw/skl buf trans Ville Syrjala
2021-06-08 7:35 ` [Intel-gfx] [PATCH v2 02/17] drm/i915: Introduce hsw_get_buf_trans() Ville Syrjala
2021-06-08 7:35 ` [Intel-gfx] [PATCH v2 03/17] drm/i915: Wrap the platform specific buf trans structs into a union Ville Syrjala
2021-06-18 12:04 ` Jani Nikula
2021-06-08 7:35 ` [Intel-gfx] [PATCH v2 04/17] drm/i915: Rename dkl phy buf trans tables Ville Syrjala
2021-06-18 12:04 ` Jani Nikula
2021-06-08 7:35 ` [Intel-gfx] [PATCH v2 05/17] drm/i915: Wrap the buf trans tables into a struct Ville Syrjala
2021-06-18 12:05 ` Jani Nikula
2021-06-08 7:35 ` [Intel-gfx] [PATCH v2 06/17] drm/i915: Introduce intel_get_buf_trans() Ville Syrjala
2021-06-18 12:08 ` Jani Nikula
2021-06-08 7:35 ` [Intel-gfx] [PATCH v2 07/17] drm/i915; Return the whole buf_trans struct from get_buf_trans() Ville Syrjala
2021-06-18 12:11 ` Jani Nikula
2021-06-08 7:35 ` [Intel-gfx] [PATCH v2 08/17] drm/i915: Store the HDMI default entry in the bug trans struct Ville Syrjala
2021-06-08 7:35 ` [Intel-gfx] [PATCH v2 09/17] drm/i915: Introduce encoder->get_buf_trans() Ville Syrjala
2021-06-18 12:19 ` Jani Nikula [this message]
2021-06-08 7:35 ` [Intel-gfx] [PATCH v2 10/17] drm/i915: Clean up hsw/bdw/skl/kbl buf trans funcs Ville Syrjala
2021-06-08 7:35 ` [Intel-gfx] [PATCH v2 11/17] drm/i915: Introduce rkl_get_combo_buf_trans() Ville Syrjala
2021-06-18 12:22 ` Jani Nikula
2021-06-08 7:35 ` [Intel-gfx] [PATCH v2 12/17] drm/i915: Fix dg1 buf trans tables Ville Syrjala
2021-06-18 12:28 ` Jani Nikula
2021-06-08 7:35 ` [Intel-gfx] [PATCH v2 13/17] drm/i915: Deduplicate icl DP HBR2 vs. eDP HBR3 table Ville Syrjala
2021-06-18 12:30 ` Jani Nikula
2021-06-23 12:55 ` Ville Syrjälä
2021-06-08 7:36 ` [Intel-gfx] [PATCH v2 14/17] drm/i915: Fix ehl edp hbr2 vswing table Ville Syrjala
2021-06-23 14:02 ` Jani Nikula
2021-06-08 7:36 ` [Intel-gfx] [PATCH v2 15/17] drm/i915: Clean up jsl/ehl buf trans functions Ville Syrjala
2021-06-23 14:13 ` Jani Nikula
2021-06-24 17:05 ` Ville Syrjälä
2021-06-08 7:36 ` [Intel-gfx] [PATCH v2 16/17] drm/i915: Nuke buf_trans hdmi functions Ville Syrjala
2021-06-23 14:14 ` Jani Nikula
2021-06-08 7:36 ` [Intel-gfx] [PATCH v2 17/17] drm/i915: Add the missing adls vswing tables Ville Syrjala
2021-06-23 14:36 ` Jani Nikula
2021-06-08 8:46 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: DDI buf trans cleaup and fixes (rev4) Patchwork
2021-06-08 8:47 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-06-08 9:15 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-06-08 9:15 ` [Intel-gfx] ✗ Fi.CI.BUILD: warning " Patchwork
2021-06-08 13:33 ` [Intel-gfx] ✓ Fi.CI.IGT: success " Patchwork
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