From: Cristian Ciocaltea <cristian.ciocaltea@gmail.com> To: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Cc: "Stephen Boyd" <sboyd@kernel.org>, "Rob Herring" <robh+dt@kernel.org>, "Andreas Färber" <afaerber@suse.de>, "Michael Turquette" <mturquette@baylibre.com>, "Edgar Bernardi Righi" <edgar.righi@lsitec.org.br>, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-actions@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Subject: Re: [PATCH v2 4/6] clk: actions: Fix AHPPREDIV-H-AHB clock chain on Owl S500 SoC Date: Thu, 10 Jun 2021 23:10:25 +0300 [thread overview] Message-ID: <20210610201025.GA1497285@BV030612LT> (raw) In-Reply-To: <20210610143413.GC315240@thinkpad> On Thu, Jun 10, 2021 at 08:04:13PM +0530, Manivannan Sadhasivam wrote: > On Thu, May 27, 2021 at 04:16:42PM +0300, Cristian Ciocaltea wrote: > > There are a few issues with the setup of the Actions Semi Owl S500 SoC's > > clock chain involving AHPPREDIV, H and AHB clocks: > > > > * AHBPREDIV clock is defined as a muxer only, although it also acts as > > a divider. > > * H clock is using a wrong divider register offset > > * AHB is defined as a multi-rate factor clock, but it is actually just > > a fixed pass clock. > > > > Let's provide the following fixes: > > > > * Change AHBPREDIV clock to an ungated OWL_COMP_DIV definition. > > * Use the correct register shift value in the OWL_DIVIDER definition > > for H clock > > * Drop the unneeded 'ahb_factor_table[]' and change AHB clock to an > > ungated OWL_COMP_FIXED_FACTOR definition. [...] > > /* composite clocks */ > > +static OWL_COMP_DIV(ahbprediv_clk, "ahbprediv_clk", ahbprediv_clk_mux_p, > > + OWL_MUX_HW(CMU_BUSCLK1, 8, 3), > > + { 0 }, > > + OWL_DIVIDER_HW(CMU_BUSCLK1, 12, 2, 0, NULL), > > + 0); > > + > > +static OWL_COMP_FIXED_FACTOR(ahb_clk, "ahb_clk", "h_clk", > > + { 0 }, > > + 1, 1, CLK_SET_RATE_PARENT); > > I think you swapped the flags between "ahbprediv_clk" and "ahb_clk"... Thanks for noticing this, I fixed it in v3: https://lore.kernel.org/lkml/cover.1623354574.git.cristian.ciocaltea@gmail.com/ > > + > > static OWL_COMP_FACTOR(vce_clk, "vce_clk", hde_clk_mux_p, > > OWL_MUX_HW(CMU_VCECLK, 4, 2), > > OWL_GATE_HW(CMU_DEVCLKEN0, 26, 0), > > -- > > 2.31.1 > >
WARNING: multiple messages have this Message-ID (diff)
From: Cristian Ciocaltea <cristian.ciocaltea@gmail.com> To: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Cc: "Stephen Boyd" <sboyd@kernel.org>, "Rob Herring" <robh+dt@kernel.org>, "Andreas Färber" <afaerber@suse.de>, "Michael Turquette" <mturquette@baylibre.com>, "Edgar Bernardi Righi" <edgar.righi@lsitec.org.br>, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-actions@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Subject: Re: [PATCH v2 4/6] clk: actions: Fix AHPPREDIV-H-AHB clock chain on Owl S500 SoC Date: Thu, 10 Jun 2021 23:10:25 +0300 [thread overview] Message-ID: <20210610201025.GA1497285@BV030612LT> (raw) In-Reply-To: <20210610143413.GC315240@thinkpad> On Thu, Jun 10, 2021 at 08:04:13PM +0530, Manivannan Sadhasivam wrote: > On Thu, May 27, 2021 at 04:16:42PM +0300, Cristian Ciocaltea wrote: > > There are a few issues with the setup of the Actions Semi Owl S500 SoC's > > clock chain involving AHPPREDIV, H and AHB clocks: > > > > * AHBPREDIV clock is defined as a muxer only, although it also acts as > > a divider. > > * H clock is using a wrong divider register offset > > * AHB is defined as a multi-rate factor clock, but it is actually just > > a fixed pass clock. > > > > Let's provide the following fixes: > > > > * Change AHBPREDIV clock to an ungated OWL_COMP_DIV definition. > > * Use the correct register shift value in the OWL_DIVIDER definition > > for H clock > > * Drop the unneeded 'ahb_factor_table[]' and change AHB clock to an > > ungated OWL_COMP_FIXED_FACTOR definition. [...] > > /* composite clocks */ > > +static OWL_COMP_DIV(ahbprediv_clk, "ahbprediv_clk", ahbprediv_clk_mux_p, > > + OWL_MUX_HW(CMU_BUSCLK1, 8, 3), > > + { 0 }, > > + OWL_DIVIDER_HW(CMU_BUSCLK1, 12, 2, 0, NULL), > > + 0); > > + > > +static OWL_COMP_FIXED_FACTOR(ahb_clk, "ahb_clk", "h_clk", > > + { 0 }, > > + 1, 1, CLK_SET_RATE_PARENT); > > I think you swapped the flags between "ahbprediv_clk" and "ahb_clk"... Thanks for noticing this, I fixed it in v3: https://lore.kernel.org/lkml/cover.1623354574.git.cristian.ciocaltea@gmail.com/ > > + > > static OWL_COMP_FACTOR(vce_clk, "vce_clk", hde_clk_mux_p, > > OWL_MUX_HW(CMU_VCECLK, 4, 2), > > OWL_GATE_HW(CMU_DEVCLKEN0, 26, 0), > > -- > > 2.31.1 > > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2021-06-10 20:10 UTC|newest] Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-05-27 13:16 [PATCH v2 0/6] Improve clock support for Actions S500 SoC Cristian Ciocaltea 2021-05-27 13:16 ` Cristian Ciocaltea 2021-05-27 13:16 ` [PATCH v2 1/6] clk: actions: Fix UART clock dividers on Owl " Cristian Ciocaltea 2021-05-27 13:16 ` Cristian Ciocaltea 2021-05-27 13:16 ` [PATCH v2 2/6] clk: actions: Fix SD clocks factor table " Cristian Ciocaltea 2021-05-27 13:16 ` Cristian Ciocaltea 2021-06-10 14:29 ` Manivannan Sadhasivam 2021-06-10 14:29 ` Manivannan Sadhasivam 2021-05-27 13:16 ` [PATCH v2 3/6] clk: actions: Fix bisp_factor_table based clocks " Cristian Ciocaltea 2021-05-27 13:16 ` Cristian Ciocaltea 2021-06-10 14:32 ` Manivannan Sadhasivam 2021-06-10 14:32 ` Manivannan Sadhasivam 2021-05-27 13:16 ` [PATCH v2 4/6] clk: actions: Fix AHPPREDIV-H-AHB clock chain " Cristian Ciocaltea 2021-05-27 13:16 ` Cristian Ciocaltea 2021-06-10 14:34 ` Manivannan Sadhasivam 2021-06-10 14:34 ` Manivannan Sadhasivam 2021-06-10 20:10 ` Cristian Ciocaltea [this message] 2021-06-10 20:10 ` Cristian Ciocaltea 2021-05-27 13:16 ` [PATCH v2 5/6] dt-bindings: clock: Add NIC and ETHERNET bindings for Actions " Cristian Ciocaltea 2021-05-27 13:16 ` Cristian Ciocaltea 2021-06-10 14:34 ` Manivannan Sadhasivam 2021-06-10 14:34 ` Manivannan Sadhasivam 2021-05-27 13:16 ` [PATCH v2 6/6] clk: actions: Add NIC and ETHERNET clock support " Cristian Ciocaltea 2021-05-27 13:16 ` Cristian Ciocaltea 2021-06-10 14:35 ` Manivannan Sadhasivam 2021-06-10 14:35 ` Manivannan Sadhasivam
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