From: Jonas Karlman <jonas@kwiboo.se>
To: Anand Moon <anand@edgeble.ai>
Cc: Tom Rini <trini@konsulko.com>, Simon Glass <sjg@chromium.org>,
Philipp Tomsich <philipp.tomsich@vrull.eu>,
Kever Yang <kever.yang@rock-chips.com>,
Jagan Teki <jagan@edgeble.ai>,
u-boot@lists.denx.de
Subject: Re: [PATCH v1 6/9] rockchip: RK3568: Read the reset cause from clock reset unit for RK356x SoC
Date: Thu, 16 May 2024 16:17:31 +0200 [thread overview]
Message-ID: <d7230a5d-e74a-4b12-9e97-b19e8024afab@kwiboo.se> (raw)
In-Reply-To: <20240516090031.2373-7-anand@edgeble.ai>
Hi Anand,
On 2024-05-16 10:59, Anand Moon wrote:
> Read the reset cause from clock reset unit for RK356x SoC.
>
> Cc: Jagan Teki <jagan@edgeble.ai>
> Signed-off-by: Anand Moon <anand@edgeble.ai>
> ---
> arch/arm/mach-rockchip/cpu-info.c | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/arch/arm/mach-rockchip/cpu-info.c b/arch/arm/mach-rockchip/cpu-info.c
> index 77833c8fce..114608b506 100644
> --- a/arch/arm/mach-rockchip/cpu-info.c
> +++ b/arch/arm/mach-rockchip/cpu-info.c
> @@ -12,6 +12,8 @@
> #include <asm/arch-rockchip/cru_rk3328.h>
> #elif IS_ENABLED(CONFIG_ROCKCHIP_RK3399)
> #include <asm/arch-rockchip/cru_rk3399.h>
> +#elif IS_ENABLED(CONFIG_ROCKCHIP_RK33568)
> +#include <asm/arch-rockchip/cru_rk3568.h>
> #endif
> #include <asm/arch-rockchip/hardware.h>
> #include <linux/err.h>
> @@ -22,6 +24,8 @@ char *get_reset_cause(void)
> struct rk3328_cru *cru = rockchip_get_cru();
> #elif IS_ENABLED(CONFIG_ROCKCHIP_RK3399)
> struct rockchip_cru *cru = rockchip_get_cru();
> +#elif IS_ENABLED(CONFIG_ROCKCHIP_RK3568)
> + struct rk3568_cru *cru = rockchip_get_cru();
This is strictly not needed for RK3568 after the commit 6e710897aa31
("rockchip: cru: Enable cpu info support for rk3568").
Suggest you use same/similar workaround or cleanup the include/define
statement in arch/arm/include/asm/arch-rockchip/cru.h for all SoCs.
Also at least one RK SoC have other bits set in the glb_rst_st reg.
Suggest you add following:
GLB_RST_MASK = GENMASK(5, 0),
and use something like:
switch (cru->glb_rst_st & GLB_RST_MASK) {
or "unknown reset" is reported on affected SoCs.
I have also seen POR always being reported even after a reboot so please
confirm that reset reason works on the SoCs/boards you enable this on.
Regards,
Jonas
> #endif
> char *cause = NULL;
>
next prev parent reply other threads:[~2024-05-16 14:17 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <20240516090031.2373-1-anand@edgeble.ai>
2024-05-16 8:59 ` [PATCH v1 1/9] rockchip: RK3328: Read the reset cause from clock reset unit for RK3328 SoC Anand Moon
2024-05-16 13:39 ` Quentin Schulz
2024-05-16 8:59 ` [PATCH v1 2/9] rockchip: RK3328: Enable display cpuinfo support on all boards Anand Moon
2024-05-16 8:59 ` [PATCH v1 3/9] rockchip: RK3399: Read the reset cause from clock reset unit for RK3399 SoC Anand Moon
2024-05-16 8:59 ` [PATCH v1 4/9] rockchip: RK3399: Enable display cpuinfo support on all boards Anand Moon
2024-05-16 8:59 ` [PATCH v1 5/9] arm: rockchip: Enable display cpuinfo to be build with SPL_BUILD Anand Moon
2024-05-16 13:45 ` Quentin Schulz
2024-05-16 14:03 ` Jonas Karlman
2024-05-16 8:59 ` [PATCH v1 6/9] rockchip: RK3568: Read the reset cause from clock reset unit for RK356x SoC Anand Moon
2024-05-16 14:17 ` Jonas Karlman [this message]
2024-05-17 7:45 ` Anand Moon
2024-05-24 8:48 ` Anand Moon
2024-05-16 8:59 ` [PATCH v1 7/9] rockchip: RK356x: Enable display cpuinfo support on all boards Anand Moon
2024-05-16 8:59 ` [PATCH v1 8/9] rockchip: RK3588: Read the reset cause from clock reset unit for RK3588 SoC Anand Moon
2024-05-16 8:59 ` [PATCH v1 9/9] rockchip: RK3588: Enable display cpuinfo support on all boards Anand Moon
2024-05-16 9:21 ` Quentin Schulz
2024-05-16 10:12 ` Anand Moon
2024-05-16 10:43 ` Quentin Schulz
2024-05-16 11:51 ` Anand Moon
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