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From: Chinmay Rath <rathc@linux.vnet.ibm.com>
To: Nicholas Piggin <npiggin@gmail.com>, qemu-ppc@nongnu.org
Cc: qemu-devel@nongnu.org,
	Daniel Henrique Barboza <danielhb413@gmail.com>,
	Chinmay Rath <rathc@linux.ibm.com>
Subject: Re: [PATCH 2/3] target/ppc: Fix embedded memory barriers
Date: Tue, 7 May 2024 12:54:00 +0530	[thread overview]
Message-ID: <f9c27a7a-4898-457c-ab3d-6da7c87126d4@linux.vnet.ibm.com> (raw)
In-Reply-To: <20240501130435.941189-3-npiggin@gmail.com>



On 5/1/24 18:34, Nicholas Piggin wrote:
> Memory barriers are supposed to do something on BookE systems, these
> were probably just missed during MTTCG enablement, maybe no targets
> support SMP. Either way, add proper BookE implementations.
>
> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Reviewed-by: Chinmay Rath <rathc@linux.ibm.com>
> ---
>   target/ppc/translate/misc-impl.c.inc | 4 ++--
>   1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/target/ppc/translate/misc-impl.c.inc b/target/ppc/translate/misc-impl.c.inc
> index f58bf8b848..9226467f81 100644
> --- a/target/ppc/translate/misc-impl.c.inc
> +++ b/target/ppc/translate/misc-impl.c.inc
> @@ -34,8 +34,7 @@ static bool trans_SYNC(DisasContext *ctx, arg_X_sync *a)
>        */
>       if (!(ctx->insns_flags & PPC_MEM_SYNC)) {
>           if (ctx->insns_flags & PPC_BOOKE) {
> -            /* msync replaces sync on 440, interpreted as nop */
> -            /* XXX: this also catches e200 */
> +            tcg_gen_mb(bar | TCG_BAR_SC);
>               return true;
>           }
>   
> @@ -80,6 +79,7 @@ static bool trans_EIEIO(DisasContext *ctx, arg_EIEIO *a)
>       if (!(ctx->insns_flags & PPC_MEM_EIEIO)) {
>           if ((ctx->insns_flags & PPC_BOOKE) ||
>               (ctx->insns_flags2 & PPC2_BOOKE206)) {
> +            tcg_gen_mb(bar | TCG_BAR_SC);
>               return true;
>           }
>           return false;



  reply	other threads:[~2024-05-07  7:24 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-05-01 13:04 [PATCH 0/3] target/ppc: Fixes and updates for sync instructions Nicholas Piggin
2024-05-01 13:04 ` [PATCH 1/3] target/ppc: Move sync instructions to decodetree Nicholas Piggin
2024-05-07  6:41   ` Chinmay Rath
2024-05-01 13:04 ` [PATCH 2/3] target/ppc: Fix embedded memory barriers Nicholas Piggin
2024-05-07  7:24   ` Chinmay Rath [this message]
2024-05-01 13:04 ` [PATCH 3/3] target/ppc: Add ISA v3.1 variants of sync instruction Nicholas Piggin
2024-05-07  7:09   ` Chinmay Rath

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