From: Nicholas Piggin <npiggin@gmail.com>
To: qemu-ppc@nongnu.org
Cc: Nicholas Piggin <npiggin@gmail.com>,
qemu-devel@nongnu.org,
Daniel Henrique Barboza <danielhb413@gmail.com>,
"Chinmay Rath" <rathc@linux.ibm.com>
Subject: [PATCH 0/3] target/ppc: Fixes and updates for sync instructions
Date: Wed, 1 May 2024 23:04:31 +1000 [thread overview]
Message-ID: <20240501130435.941189-1-npiggin@gmail.com> (raw)
I forgot I needed to do this, I tried adding new POWER10 sync
instructions to the kernel and patch got nacked because it crashed
with TCG.
Unfortuantely I don't think our old decoder does a great job with
handling reserved bits like this, but decodetree makes this kind
of thing much easier.
I'll probably add at least patch 1 to -stable, so the Linux changes
can be upstreamed a bit sooner.
Thanks,
Nick
Nicholas Piggin (3):
target/ppc: Move sync instructions to decodetree
target/ppc: Fix embedded memory barriers
target/ppc: Add ISA v3.1 variants of sync instruction
target/ppc/insn32.decode | 7 ++
target/ppc/translate.c | 102 +-----------------
target/ppc/translate/misc-impl.c.inc | 152 +++++++++++++++++++++++++++
3 files changed, 161 insertions(+), 100 deletions(-)
create mode 100644 target/ppc/translate/misc-impl.c.inc
--
2.43.0
next reply other threads:[~2024-05-01 13:05 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-05-01 13:04 Nicholas Piggin [this message]
2024-05-01 13:04 ` [PATCH 1/3] target/ppc: Move sync instructions to decodetree Nicholas Piggin
2024-05-07 6:41 ` Chinmay Rath
2024-05-01 13:04 ` [PATCH 2/3] target/ppc: Fix embedded memory barriers Nicholas Piggin
2024-05-07 7:24 ` Chinmay Rath
2024-05-01 13:04 ` [PATCH 3/3] target/ppc: Add ISA v3.1 variants of sync instruction Nicholas Piggin
2024-05-07 7:09 ` Chinmay Rath
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