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From: Peter Maydell <peter.maydell@linaro.org>
To: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Cc: qemu-devel@nongnu.org, qemu-riscv@nongnu.org,
	alistair.francis@wdc.com,  bmeng@tinylab.org,
	liwei1518@gmail.com, zhiwei_liu@linux.alibaba.com,
	 palmer@rivosinc.com, ajones@ventanamicro.com, kraxel@redhat.com
Subject: Re: [RFC PATCH 0/1] pci: allocate a PCI ID for RISC-V IOMMU
Date: Tue, 7 May 2024 16:44:13 +0100	[thread overview]
Message-ID: <CAFEAcA_gu40QoTXUPP2f=8vGvEOTbGWKtqR3b-e7YYhbFG0aiw@mail.gmail.com> (raw)
In-Reply-To: <20240503124244.8804-1-dbarboza@ventanamicro.com>

On Fri, 3 May 2024 at 13:43, Daniel Henrique Barboza
<dbarboza@ventanamicro.com> wrote:
>
> Hi,
>
> In this RFC I want to check with Gerd and others if it's ok to add a PCI
> id for the RISC-V IOMMU device. It's currently under review in [1]. The
> idea is to fold this patch into the RISC-V IOMMU series if we're all ok
> with this change.

My question here would be "why is this risc-v specific?" (and more
generally "what is this for?" -- the cover letter and patch and
documentation page provide almost no information about what this
device is and why it needs to exist rather than using either
virtio-iommu or else a model of a real hardware IOMMU.)

thanks
-- PMM


  parent reply	other threads:[~2024-05-07 15:45 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-05-03 12:42 [RFC PATCH 0/1] pci: allocate a PCI ID for RISC-V IOMMU Daniel Henrique Barboza
2024-05-03 12:42 ` [RFC PATCH 1/1] pci-ids.rst: add Red Hat pci-id for generic IOMMU device Daniel Henrique Barboza
2024-05-07 15:35   ` Frank Chang
2024-05-07 15:37 ` [RFC PATCH 0/1] pci: allocate a PCI ID for RISC-V IOMMU Frank Chang
2024-05-07 15:53   ` Gerd Hoffmann
2024-05-08 11:19     ` Daniel Henrique Barboza
2024-05-08 11:17   ` Daniel Henrique Barboza
2024-05-07 15:44 ` Peter Maydell [this message]
2024-05-08 12:41   ` Daniel Henrique Barboza
2024-05-10 10:47     ` Frank Chang
2024-05-20 17:40       ` Daniel Henrique Barboza

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