From: Sebastian Huber <sebastian.huber@embedded-brains.de>
To: qemu-arm@nongnu.org, qemu-devel@nongnu.org
Cc: Luc Michel <luc@lmichel.fr>, Peter Maydell <peter.maydell@linaro.org>
Subject: [PATCH 2/2] hw/intc/arm_gic: Fix writes to GICD_ITARGETSRn
Date: Tue, 7 May 2024 15:00:38 +0200 [thread overview]
Message-ID: <20240507130038.86787-2-sebastian.huber@embedded-brains.de> (raw)
In-Reply-To: <CAFEAcA8DAt+o-XZepg8xtj4i3xLW_yChwPnDZVM0O=rW8+9qJQ@mail.gmail.com>
According to the GICv2 specification section 4.3.12, "Interrupt Processor
Targets Registers, GICD_ITARGETSRn":
"Any change to a CPU targets field value:
[...]
* Has an effect on any pending interrupts. This means:
- adding a CPU interface to the target list of a pending interrupt makes that
interrupt pending on that CPU interface
- removing a CPU interface from the target list of a pending interrupt
removes the pending state of that interrupt on that CPU interface."
Signed-off-by: Sebastian Huber <sebastian.huber@embedded-brains.de>
---
hw/intc/arm_gic.c | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/hw/intc/arm_gic.c b/hw/intc/arm_gic.c
index 20b3f701e0..79aee56053 100644
--- a/hw/intc/arm_gic.c
+++ b/hw/intc/arm_gic.c
@@ -1397,6 +1397,13 @@ static void gic_dist_writeb(void *opaque, hwaddr offset,
value = ALL_CPU_MASK;
}
s->irq_target[irq] = value & ALL_CPU_MASK;
+ if (irq >= GIC_INTERNAL && s->irq_state[irq].pending) {
+ /*
+ * Changing the target of an interrupt that is currently
+ * pending updates the set of CPUs it is pending on.
+ */
+ GIC_DIST_SET_PENDING(irq, value);
+ }
}
} else if (offset < 0xf00) {
/* Interrupt Configuration. */
--
2.35.3
prev parent reply other threads:[~2024-05-07 13:01 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-07-09 9:49 [PATCH] hw/intc/arm_gic: Fix set/clear pending of PPI/SPI Sebastian Huber
2021-07-23 14:04 ` Sebastian Huber
2021-07-23 14:12 ` Philippe Mathieu-Daudé
2021-07-25 8:08 ` Luc Michel
2021-07-26 8:04 ` Sebastian Huber
2021-07-26 13:02 ` Peter Maydell
2024-05-07 12:56 ` [PATCH 1/2] hw/intc/arm_gic: Fix set pending of PPIs Sebastian Huber
2024-05-07 12:56 ` [PATCH 2/2] hw/intc/arm_gic: Fix writes to GICD_ITARGETSRn Sebastian Huber
2024-05-07 13:00 ` [PATCH 1/2] hw/intc/arm_gic: Fix set pending of PPIs Sebastian Huber
2024-05-07 13:00 ` Sebastian Huber [this message]
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