From: Brian Cain <bcain@quicinc.com>
To: <qemu-devel@nongnu.org>
Cc: <bcain@quicinc.com>, <armbru@redhat.com>,
<richard.henderson@linaro.org>, <philmd@linaro.org>,
<peter.maydell@linaro.org>, <quic_mathbern@quicinc.com>,
<stefanha@redhat.com>, <ale@rev.ng>, <anjo@rev.ng>,
<quic_mliebel@quicinc.com>, <ltaylorsimpson@gmail.com>
Subject: [PULL 11/15] Hexagon (tests/tcg/hexagon) Test HVX .new read from high half of pair
Date: Sun, 5 May 2024 19:42:23 -0700 [thread overview]
Message-ID: <20240506024227.3345791-12-bcain@quicinc.com> (raw)
In-Reply-To: <20240506024227.3345791-1-bcain@quicinc.com>
From: Taylor Simpson <ltaylorsimpson@gmail.com>
Make sure the decoding of HVX .new is correctly handling this case
Signed-off-by: Taylor Simpson <ltaylorsimpson@gmail.com>
Reviewed-by: Brian Cain <bcain@quicinc.com>
Message-Id: <20240307032327.4799-6-ltaylorsimpson@gmail.com>
Signed-off-by: Brian Cain <bcain@quicinc.com>
---
tests/tcg/hexagon/hvx_misc.c | 16 +++++++++++++++-
1 file changed, 15 insertions(+), 1 deletion(-)
diff --git a/tests/tcg/hexagon/hvx_misc.c b/tests/tcg/hexagon/hvx_misc.c
index b45170acd1..1fe14b5158 100644
--- a/tests/tcg/hexagon/hvx_misc.c
+++ b/tests/tcg/hexagon/hvx_misc.c
@@ -1,5 +1,5 @@
/*
- * Copyright(c) 2021-2023 Qualcomm Innovation Center, Inc. All Rights Reserved.
+ * Copyright(c) 2021-2024 Qualcomm Innovation Center, Inc. All Rights Reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -231,6 +231,7 @@ static void test_masked_store(bool invert)
static void test_new_value_store(void)
{
void *p0 = buffer0;
+ void *p1 = buffer1;
void *pout = output;
asm("{\n\t"
@@ -242,6 +243,19 @@ static void test_new_value_store(void)
expect[0] = buffer0[0];
check_output_w(__LINE__, 1);
+
+ /* Test the .new read from the high half of a pair */
+ asm("v7 = vmem(%0 + #0)\n\t"
+ "v12 = vmem(%1 + #0)\n\t"
+ "{\n\t"
+ " v5:4 = vcombine(v12, v7)\n\t"
+ " vmem(%2 + #0) = v5.new\n\t"
+ "}\n\t"
+ : : "r"(p0), "r"(p1), "r"(pout) : "v4", "v5", "v7", "v12", "memory");
+
+ expect[0] = buffer1[0];
+
+ check_output_w(__LINE__, 1);
}
static void test_max_temps()
--
2.25.1
next prev parent reply other threads:[~2024-05-06 2:44 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-05-06 2:42 [PULL 00/15] Hexagon: simplify gen for packets w/o read-after-write Brian Cain
2024-05-06 2:42 ` [PULL 01/15] Hexagon (target/hexagon) Analyze reads before writes Brian Cain
2024-05-06 2:42 ` [PULL 02/15] Hexagon (target/hexagon) Enable more short-circuit packets (scalar core) Brian Cain
2024-05-06 2:42 ` [PULL 03/15] Hexagon (target/hexagon) Enable more short-circuit packets (HVX) Brian Cain
2024-05-06 2:42 ` [PULL 04/15] Hexagon (target/hexagon) Pass P0 explicitly to helpers that need it Brian Cain
2024-05-06 2:42 ` [PULL 05/15] Hexagon (target/hexagon) Pass SP " Brian Cain
2024-05-06 2:42 ` [PULL 06/15] Hexagon (target/hexagon) Only pass env to generated helper when needed Brian Cain
2024-05-06 2:42 ` [PULL 07/15] Hexagon (target/hexagon) Add is_old/is_new to Register class Brian Cain
2024-05-06 2:42 ` [PULL 08/15] Hexagon (target/hexagon) Mark new_read_idx in trans functions Brian Cain
2024-05-06 2:42 ` [PULL 09/15] Hexagon (target/hexagon) Mark dest_idx " Brian Cain
2024-05-06 2:42 ` [PULL 10/15] Hexagon (target/hexagon) Mark has_pred_dest " Brian Cain
2024-05-06 2:42 ` Brian Cain [this message]
2024-05-06 2:42 ` [PULL 12/15] Hexagon (target/hexagon) Remove uses of op_regs_generated.h.inc Brian Cain
2024-05-06 2:42 ` [PULL 13/15] Hexagon (target/hexagon) Remove gen_op_regs.py Brian Cain
2024-05-06 2:42 ` [PULL 14/15] Hexagon (target/hexagon) Remove gen_shortcode.py Brian Cain
2024-05-06 2:42 ` [PULL 15/15] Hexagon (target/hexagon) Remove hex_common.read_attribs_file Brian Cain
2024-05-06 17:17 ` [PULL 00/15] Hexagon: simplify gen for packets w/o read-after-write Richard Henderson
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