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From: Brian Cain <bcain@quicinc.com>
To: <qemu-devel@nongnu.org>
Cc: <bcain@quicinc.com>, <armbru@redhat.com>,
	<richard.henderson@linaro.org>,  <philmd@linaro.org>,
	<peter.maydell@linaro.org>, <quic_mathbern@quicinc.com>,
	<stefanha@redhat.com>, <ale@rev.ng>, <anjo@rev.ng>,
	<quic_mliebel@quicinc.com>, <ltaylorsimpson@gmail.com>
Subject: [PULL 09/15] Hexagon (target/hexagon) Mark dest_idx in trans functions
Date: Sun, 5 May 2024 19:42:21 -0700	[thread overview]
Message-ID: <20240506024227.3345791-10-bcain@quicinc.com> (raw)
In-Reply-To: <20240506024227.3345791-1-bcain@quicinc.com>

From: Taylor Simpson <ltaylorsimpson@gmail.com>

Check that the value matches opcode_reginfo/opcode_wregs

Signed-off-by: Taylor Simpson <ltaylorsimpson@gmail.com>
Reviewed-by: Brian Cain <bcain@quicinc.com>
Message-Id: <20240307032327.4799-4-ltaylorsimpson@gmail.com>
Signed-off-by: Brian Cain <bcain@quicinc.com>
---
 target/hexagon/decode.c                 | 2 ++
 target/hexagon/gen_trans_funcs.py       | 6 ++++++
 target/hexagon/insn.h                   | 1 +
 target/hexagon/mmvec/decode_ext_mmvec.c | 2 ++
 4 files changed, 11 insertions(+)

diff --git a/target/hexagon/decode.c b/target/hexagon/decode.c
index 4595e30384..a4d8500fea 100644
--- a/target/hexagon/decode.c
+++ b/target/hexagon/decode.c
@@ -184,6 +184,8 @@ decode_fill_newvalue_regno(Packet *packet)
 
             /* Now patch up the consumer with the register number */
             dst_idx = dststr - opcode_reginfo[def_opcode];
+            g_assert(packet->insn[def_idx].dest_idx != -1 &&
+                     packet->insn[def_idx].dest_idx == dst_idx);
             packet->insn[i].regno[use_regidx] =
                 packet->insn[def_idx].regno[dst_idx];
             /*
diff --git a/target/hexagon/gen_trans_funcs.py b/target/hexagon/gen_trans_funcs.py
index 8acecdb993..1201172dda 100755
--- a/target/hexagon/gen_trans_funcs.py
+++ b/target/hexagon/gen_trans_funcs.py
@@ -69,6 +69,7 @@ def mark_which_imm_extended(f, tag):
 ##         insn->regno[1] = args->Rs;
 ##         insn->regno[2] = args->Rt;
 ##         insn->new_read_idx = -1;
+##         insn->dest_idx = 0;
 ##         return true;
 ##     }
 ##
@@ -86,6 +87,7 @@ def gen_trans_funcs(f):
         """))
 
         new_read_idx = -1
+        dest_idx = -1
         for regno, (reg_type, reg_id, *_) in enumerate(regs):
             reg = hex_common.get_register(tag, reg_type, reg_id)
             f.write(code_fmt(f"""\
@@ -93,6 +95,9 @@ def gen_trans_funcs(f):
             """))
             if reg.is_read() and reg.is_new():
                 new_read_idx = regno
+            # dest_idx should be the first destination, so check for -1
+            if reg.is_written() and dest_idx == -1:
+                dest_idx = regno
 
         if len(imms) != 0:
             mark_which_imm_extended(f, tag)
@@ -115,6 +120,7 @@ def gen_trans_funcs(f):
 
         f.write(code_fmt(f"""\
             insn->new_read_idx = {new_read_idx};
+            insn->dest_idx = {dest_idx};
         """))
         f.write(textwrap.dedent(f"""\
                 return true;
diff --git a/target/hexagon/insn.h b/target/hexagon/insn.h
index 36502bf056..a770379958 100644
--- a/target/hexagon/insn.h
+++ b/target/hexagon/insn.h
@@ -40,6 +40,7 @@ struct Instruction {
     uint32_t which_extended:1;    /* If has an extender, which immediate */
     uint32_t new_value_producer_slot:4;
     int32_t new_read_idx;
+    int32_t dest_idx;
 
     bool part1;              /*
                               * cmp-jumps are split into two insns.
diff --git a/target/hexagon/mmvec/decode_ext_mmvec.c b/target/hexagon/mmvec/decode_ext_mmvec.c
index e9007f5d71..c1320406df 100644
--- a/target/hexagon/mmvec/decode_ext_mmvec.c
+++ b/target/hexagon/mmvec/decode_ext_mmvec.c
@@ -86,6 +86,8 @@ check_new_value(Packet *pkt)
                     /* still not there, we have a bad packet */
                     g_assert_not_reached();
                 }
+                g_assert(pkt->insn[def_idx].dest_idx != -1 &&
+                         pkt->insn[def_idx].dest_idx == dststr - reginfo);
                 int def_regnum = pkt->insn[def_idx].regno[dststr - reginfo];
                 /* Now patch up the consumer with the register number */
                 pkt->insn[i].regno[use_regidx] = def_regnum ^ def_oreg;
-- 
2.25.1


  parent reply	other threads:[~2024-05-06  2:43 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-05-06  2:42 [PULL 00/15] Hexagon: simplify gen for packets w/o read-after-write Brian Cain
2024-05-06  2:42 ` [PULL 01/15] Hexagon (target/hexagon) Analyze reads before writes Brian Cain
2024-05-06  2:42 ` [PULL 02/15] Hexagon (target/hexagon) Enable more short-circuit packets (scalar core) Brian Cain
2024-05-06  2:42 ` [PULL 03/15] Hexagon (target/hexagon) Enable more short-circuit packets (HVX) Brian Cain
2024-05-06  2:42 ` [PULL 04/15] Hexagon (target/hexagon) Pass P0 explicitly to helpers that need it Brian Cain
2024-05-06  2:42 ` [PULL 05/15] Hexagon (target/hexagon) Pass SP " Brian Cain
2024-05-06  2:42 ` [PULL 06/15] Hexagon (target/hexagon) Only pass env to generated helper when needed Brian Cain
2024-05-06  2:42 ` [PULL 07/15] Hexagon (target/hexagon) Add is_old/is_new to Register class Brian Cain
2024-05-06  2:42 ` [PULL 08/15] Hexagon (target/hexagon) Mark new_read_idx in trans functions Brian Cain
2024-05-06  2:42 ` Brian Cain [this message]
2024-05-06  2:42 ` [PULL 10/15] Hexagon (target/hexagon) Mark has_pred_dest " Brian Cain
2024-05-06  2:42 ` [PULL 11/15] Hexagon (tests/tcg/hexagon) Test HVX .new read from high half of pair Brian Cain
2024-05-06  2:42 ` [PULL 12/15] Hexagon (target/hexagon) Remove uses of op_regs_generated.h.inc Brian Cain
2024-05-06  2:42 ` [PULL 13/15] Hexagon (target/hexagon) Remove gen_op_regs.py Brian Cain
2024-05-06  2:42 ` [PULL 14/15] Hexagon (target/hexagon) Remove gen_shortcode.py Brian Cain
2024-05-06  2:42 ` [PULL 15/15] Hexagon (target/hexagon) Remove hex_common.read_attribs_file Brian Cain
2024-05-06 17:17 ` [PULL 00/15] Hexagon: simplify gen for packets w/o read-after-write Richard Henderson

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