From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-arm@nongnu.org, qemu-devel@nongnu.org
Cc: Richard Henderson <richard.henderson@linaro.org>
Subject: [PATCH 19/55] target/arm: Implement MVE VNEG
Date: Mon, 7 Jun 2021 17:57:45 +0100 [thread overview]
Message-ID: <20210607165821.9892-20-peter.maydell@linaro.org> (raw)
In-Reply-To: <20210607165821.9892-1-peter.maydell@linaro.org>
Implement the MVE VNEG insn (both integer and floating point forms).
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target/arm/helper-mve.h | 6 ++++++
target/arm/mve.decode | 2 ++
target/arm/mve_helper.c | 10 ++++++++++
target/arm/translate-mve.c | 15 +++++++++++++++
4 files changed, 33 insertions(+)
diff --git a/target/arm/helper-mve.h b/target/arm/helper-mve.h
index 76508d5dd71..733a54d2e3c 100644
--- a/target/arm/helper-mve.h
+++ b/target/arm/helper-mve.h
@@ -55,3 +55,9 @@ DEF_HELPER_FLAGS_3(mve_vabsh, TCG_CALL_NO_WG, void, env, ptr, ptr)
DEF_HELPER_FLAGS_3(mve_vabsw, TCG_CALL_NO_WG, void, env, ptr, ptr)
DEF_HELPER_FLAGS_3(mve_vfabsh, TCG_CALL_NO_WG, void, env, ptr, ptr)
DEF_HELPER_FLAGS_3(mve_vfabss, TCG_CALL_NO_WG, void, env, ptr, ptr)
+
+DEF_HELPER_FLAGS_3(mve_vnegb, TCG_CALL_NO_WG, void, env, ptr, ptr)
+DEF_HELPER_FLAGS_3(mve_vnegh, TCG_CALL_NO_WG, void, env, ptr, ptr)
+DEF_HELPER_FLAGS_3(mve_vnegw, TCG_CALL_NO_WG, void, env, ptr, ptr)
+DEF_HELPER_FLAGS_3(mve_vfnegh, TCG_CALL_NO_WG, void, env, ptr, ptr)
+DEF_HELPER_FLAGS_3(mve_vfnegs, TCG_CALL_NO_WG, void, env, ptr, ptr)
diff --git a/target/arm/mve.decode b/target/arm/mve.decode
index 66963dc1847..82cc0abcb82 100644
--- a/target/arm/mve.decode
+++ b/target/arm/mve.decode
@@ -80,3 +80,5 @@ VMVN 1111 1111 1 . 11 00 00 ... 0 0101 11 . 0 ... 0 @1op_nosz
VABS 1111 1111 1 . 11 .. 01 ... 0 0011 01 . 0 ... 0 @1op
VABS_fp 1111 1111 1 . 11 .. 01 ... 0 0111 01 . 0 ... 0 @1op
+VNEG 1111 1111 1 . 11 .. 01 ... 0 0011 11 . 0 ... 0 @1op
+VNEG_fp 1111 1111 1 . 11 .. 01 ... 0 0111 11 . 0 ... 0 @1op
diff --git a/target/arm/mve_helper.c b/target/arm/mve_helper.c
index 2ab05e66dfc..b14826c05a7 100644
--- a/target/arm/mve_helper.c
+++ b/target/arm/mve_helper.c
@@ -278,3 +278,13 @@ DO_1OP(vabsw, 4, int32_t, H4, DO_ABS)
DO_1OP(vfabsh, 2, uint16_t, H2, DO_FABS)
DO_1OP(vfabss, 4, uint32_t, H4, DO_FABS)
+
+#define DO_NEG(N) (-(N))
+#define DO_FNEG(N) ((N) ^ ~((__typeof(N))-1 >> 1))
+
+DO_1OP(vnegb, 1, int8_t, H1, DO_NEG)
+DO_1OP(vnegh, 2, int16_t, H2, DO_NEG)
+DO_1OP(vnegw, 4, int32_t, H4, DO_NEG)
+
+DO_1OP(vfnegh, 2, uint16_t, H2, DO_FNEG)
+DO_1OP(vfnegs, 4, uint32_t, H4, DO_FNEG)
diff --git a/target/arm/translate-mve.c b/target/arm/translate-mve.c
index badd4da2cbf..086cac9f0cd 100644
--- a/target/arm/translate-mve.c
+++ b/target/arm/translate-mve.c
@@ -212,6 +212,7 @@ static bool do_1op(DisasContext *s, arg_1op *a, MVEGenOneOpFn fn)
DO_1OP(VCLZ, vclz)
DO_1OP(VCLS, vcls)
DO_1OP(VABS, vabs)
+DO_1OP(VNEG, vneg)
static bool trans_VREV16(DisasContext *s, arg_1op *a)
{
@@ -264,3 +265,17 @@ static bool trans_VABS_fp(DisasContext *s, arg_1op *a)
}
return do_1op(s, a, fns[a->size]);
}
+
+static bool trans_VNEG_fp(DisasContext *s, arg_1op *a)
+{
+ MVEGenOneOpFn *fns[] = {
+ NULL,
+ gen_helper_mve_vfnegh,
+ gen_helper_mve_vfnegs,
+ NULL,
+ };
+ if (!dc_isar_feature(aa32_mve_fp, s)) {
+ return false;
+ }
+ return do_1op(s, a, fns[a->size]);
+}
--
2.20.1
next prev parent reply other threads:[~2021-06-07 17:17 UTC|newest]
Thread overview: 130+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-06-07 16:57 [PATCH 00/55] target/arm: First slice of MVE implementation Peter Maydell
2021-06-07 16:57 ` [PATCH 01/55] tcg: Introduce tcg_remove_ops_after Peter Maydell
2021-06-07 16:57 ` [PATCH 02/55] target/arm: Enable FPSCR.QC bit for MVE Peter Maydell
2021-06-07 19:02 ` Richard Henderson
2021-06-07 16:57 ` [PATCH 03/55] target/arm: Handle VPR semantics in existing code Peter Maydell
2021-06-07 21:19 ` Richard Henderson
2021-06-10 9:28 ` Peter Maydell
2021-06-07 16:57 ` [PATCH 04/55] target/arm: Add handling for PSR.ECI/ICI Peter Maydell
2021-06-07 23:33 ` Richard Henderson
2021-06-10 10:17 ` Peter Maydell
2021-06-10 13:39 ` Richard Henderson
2021-06-07 16:57 ` [PATCH 05/55] target/arm: Let vfp_access_check() handle late NOCP checks Peter Maydell
2021-06-07 23:50 ` Richard Henderson
2021-06-07 16:57 ` [PATCH 06/55] target/arm: Implement MVE LCTP Peter Maydell
2021-06-08 0:05 ` Richard Henderson
2021-06-07 16:57 ` [PATCH 07/55] target/arm: Implement MVE WLSTP insn Peter Maydell
2021-06-08 1:42 ` Richard Henderson
2021-06-07 16:57 ` [PATCH 08/55] target/arm: Implement MVE DLSTP Peter Maydell
2021-06-08 2:56 ` Richard Henderson
2021-06-07 16:57 ` [PATCH 09/55] target/arm: Implement MVE LETP insn Peter Maydell
2021-06-08 3:40 ` Richard Henderson
2021-06-07 16:57 ` [PATCH 10/55] target/arm: Add framework for MVE decode Peter Maydell
2021-06-08 3:59 ` Richard Henderson
2021-06-07 16:57 ` [PATCH 11/55] target/arm: Implement MVE VLDR/VSTR (non-widening forms) Peter Maydell
2021-06-08 21:33 ` Richard Henderson
2021-06-08 21:43 ` Richard Henderson
2021-06-09 10:01 ` Peter Maydell
2021-06-09 17:09 ` Richard Henderson
2021-06-10 14:01 ` Peter Maydell
2021-06-07 16:57 ` [PATCH 12/55] target/arm: Implement widening/narrowing MVE VLDR/VSTR insns Peter Maydell
2021-06-08 21:46 ` Richard Henderson
2021-06-07 16:57 ` [PATCH 13/55] target/arm: Implement MVE VCLZ Peter Maydell
2021-06-08 22:10 ` Richard Henderson
2021-06-10 12:40 ` Peter Maydell
2021-06-10 14:03 ` Richard Henderson
2021-06-07 16:57 ` [PATCH 14/55] target/arm: Implement MVE VCLS Peter Maydell
2021-06-08 22:12 ` Richard Henderson
2021-06-07 16:57 ` [PATCH 15/55] bitops.h: Provide hswap32(), hswap64(), wswap64() swapping operations Peter Maydell
2021-06-08 6:53 ` Philippe Mathieu-Daudé
2021-06-08 22:14 ` Richard Henderson
2021-06-07 16:57 ` [PATCH 16/55] target/arm: Implement MVE VREV16, VREV32, VREV64 Peter Maydell
2021-06-08 22:23 ` Richard Henderson
2021-06-07 16:57 ` [PATCH 17/55] target/arm: Implement MVE VMVN (register) Peter Maydell
2021-06-08 22:27 ` Richard Henderson
2021-06-07 16:57 ` [PATCH 18/55] target/arm: Implement MVE VABS Peter Maydell
2021-06-08 22:34 ` Richard Henderson
2021-06-07 16:57 ` Peter Maydell [this message]
2021-06-08 22:40 ` [PATCH 19/55] target/arm: Implement MVE VNEG Richard Henderson
2021-06-07 16:57 ` [PATCH 20/55] target/arm: Implement MVE VDUP Peter Maydell
2021-06-08 23:17 ` Richard Henderson
2021-06-09 10:06 ` Peter Maydell
2021-06-09 17:16 ` Richard Henderson
2021-06-07 16:57 ` [PATCH 21/55] target/arm: Implement MVE VAND, VBIC, VORR, VORN, VEOR Peter Maydell
2021-06-08 23:23 ` Richard Henderson
2021-06-07 16:57 ` [PATCH 22/55] target/arm: Implement MVE VADD, VSUB, VMUL Peter Maydell
2021-06-08 23:25 ` Richard Henderson
2021-06-07 16:57 ` [PATCH 23/55] target/arm: Implement MVE VMULH Peter Maydell
2021-06-08 23:29 ` Richard Henderson
2021-06-07 16:57 ` [PATCH 24/55] target/arm: Implement MVE VRMULH Peter Maydell
2021-06-08 23:33 ` Richard Henderson
2021-06-07 16:57 ` [PATCH 25/55] target/arm: Implement MVE VMAX, VMIN Peter Maydell
2021-06-08 23:35 ` Richard Henderson
2021-06-07 16:57 ` [PATCH 26/55] target/arm: Implement MVE VABD Peter Maydell
2021-06-08 23:39 ` Richard Henderson
2021-06-07 16:57 ` [PATCH 27/55] target/arm: Implement MVE VHADD, VHSUB Peter Maydell
2021-06-08 23:43 ` Richard Henderson
2021-06-07 16:57 ` [PATCH 28/55] target/arm: Implement MVE VMULL Peter Maydell
2021-06-08 23:52 ` Richard Henderson
2021-06-07 16:57 ` [PATCH 29/55] target/arm: Implement MVE VMLALDAV Peter Maydell
2021-06-09 0:46 ` Richard Henderson
2021-06-09 0:46 ` Richard Henderson
2021-06-07 16:57 ` [PATCH 30/55] target/arm: Implement MVE VMLSLDAV Peter Maydell
2021-06-09 0:47 ` Richard Henderson
2021-06-07 16:57 ` [PATCH 31/55] include/qemu/int128.h: Add function to create Int128 from int64_t Peter Maydell
2021-06-08 6:45 ` Philippe Mathieu-Daudé
2021-06-09 0:51 ` Richard Henderson
2021-06-07 16:57 ` [PATCH 32/55] target/arm: Implement MVE VRMLALDAVH, VRMLSLDAVH Peter Maydell
2021-06-09 1:05 ` Richard Henderson
2021-06-14 10:19 ` Peter Maydell
2021-06-07 16:57 ` [PATCH 33/55] target/arm: Implement MVE VADD (scalar) Peter Maydell
2021-06-09 17:58 ` Richard Henderson
2021-06-07 16:58 ` [PATCH 34/55] target/arm: Implement MVE VSUB, VMUL (scalar) Peter Maydell
2021-06-09 18:00 ` Richard Henderson
2021-06-07 16:58 ` [PATCH 35/55] target/arm: Implement MVE VHADD, VHSUB (scalar) Peter Maydell
2021-06-09 18:02 ` Richard Henderson
2021-06-07 16:58 ` [PATCH 36/55] target/arm: Implement MVE VBRSR Peter Maydell
2021-06-09 18:08 ` Richard Henderson
2021-06-07 16:58 ` [PATCH 37/55] target/arm: Implement MVE VPST Peter Maydell
2021-06-09 18:23 ` Richard Henderson
2021-06-07 16:58 ` [PATCH 38/55] target/arm: Implement MVE VQADD and VQSUB Peter Maydell
2021-06-09 18:46 ` Richard Henderson
2021-06-07 16:58 ` [PATCH 39/55] target/arm: Implement MVE VQDMULH and VQRDMULH (scalar) Peter Maydell
2021-06-09 18:58 ` Richard Henderson
2021-06-07 16:58 ` [PATCH 40/55] target/arm: Implement MVE VQDMULL scalar Peter Maydell
2021-06-09 19:11 ` Richard Henderson
2021-06-07 16:58 ` [PATCH 41/55] target/arm: Implement MVE VQDMULH, VQRDMULH (vector) Peter Maydell
2021-06-09 19:13 ` Richard Henderson
2021-06-07 16:58 ` [PATCH 42/55] target/arm: Implement MVE VQADD, VQSUB (vector) Peter Maydell
2021-06-09 19:15 ` Richard Henderson
2021-06-07 16:58 ` [PATCH 43/55] target/arm: Implement MVE VQSHL (vector) Peter Maydell
2021-06-09 19:26 ` Richard Henderson
2021-06-14 11:04 ` Peter Maydell
2021-06-07 16:58 ` [PATCH 44/55] target/arm: Implement MVE VQRSHL Peter Maydell
2021-06-09 19:29 ` Richard Henderson
2021-06-07 16:58 ` [PATCH 45/55] target/arm: Implement MVE VSHL insn Peter Maydell
2021-06-09 19:40 ` Richard Henderson
2021-06-07 16:58 ` [PATCH 46/55] target/arm: Implement MVE VRSHL Peter Maydell
2021-06-09 19:43 ` Richard Henderson
2021-06-07 16:58 ` [PATCH 47/55] target/arm: Implement MVE VQDMLADH and VQRDMLADH Peter Maydell
2021-06-09 20:05 ` Richard Henderson
2021-06-07 16:58 ` [PATCH 48/55] target/arm: Implement MVE VQDMLSDH and VQRDMLSDH Peter Maydell
2021-06-09 20:08 ` Richard Henderson
2021-06-07 16:58 ` [PATCH 49/55] target/arm: Implement MVE VQDMULL (vector) Peter Maydell
2021-06-09 20:20 ` Richard Henderson
2021-06-10 19:08 ` Peter Maydell
2021-06-10 19:34 ` Richard Henderson
2021-06-07 16:58 ` [PATCH 50/55] target/arm: Implement MVE VRHADD Peter Maydell
2021-06-09 20:24 ` Richard Henderson
2021-06-07 16:58 ` [PATCH 51/55] target/arm: Implement MVE VADC, VSBC Peter Maydell
2021-06-09 21:06 ` Richard Henderson
2021-06-07 16:58 ` [PATCH 52/55] target/arm: Implement MVE VCADD Peter Maydell
2021-06-09 21:16 ` Richard Henderson
2021-06-10 19:16 ` Peter Maydell
2021-06-07 16:58 ` [PATCH 53/55] target/arm: Implement MVE VHCADD Peter Maydell
2021-06-10 3:50 ` Richard Henderson
2021-06-07 16:58 ` [PATCH 54/55] target/arm: Implement MVE VADDV Peter Maydell
2021-06-10 14:06 ` Richard Henderson
2021-06-07 16:58 ` [PATCH 55/55] target/arm: Make VMOV scalar <-> gpreg beatwise for MVE Peter Maydell
2021-06-10 14:14 ` Richard Henderson
2021-06-09 14:33 ` [PATCH 00/55] target/arm: First slice of MVE implementation no-reply
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