From: Andrew Lunn <andrew@lunn.ch>
To: Supreeth Venkatesh <supreeth.venkatesh@amd.com>
Cc: devicetree@vger.kernel.org, linux-aspeed@lists.ozlabs.org,
andrew@aj.id.au, openbmc@lists.ozlabs.org,
linux-kernel@vger.kernel.org, robh+dt@kernel.org, joel@jms.id.au,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v2 1/1] ARM:dts:aspeed: Initial device tree for AMD Onyx Platform
Date: Fri, 1 Mar 2024 23:36:41 +0100 [thread overview]
Message-ID: <c8686f40-e6e9-4652-b450-217de604b216@lunn.ch> (raw)
In-Reply-To: <20240301222257.3309541-1-supreeth.venkatesh@amd.com>
> +&mdio0 {
> + status = "okay";
> + ethphy0: ethernet-phy@0 {
> + compatible = "ethernet-phy-ieee802.3-c22";
> + reg = <0>;
> + };
> +};
> +
> +&mac3 {
> + status = "okay";
> + phy-mode = "rgmii";
> + phy-handle = <ðphy0>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_rgmii4_default>;
> +};
That looks odd. Where are the RGMII delays coming from? Normally its
"rgmii-id", which asks the PHY to insert the delays.
Andrew
prev parent reply other threads:[~2024-03-01 23:12 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-03-01 22:22 [PATCH v2 1/1] ARM:dts:aspeed: Initial device tree for AMD Onyx Platform Supreeth Venkatesh
2024-03-01 22:36 ` Andrew Lunn [this message]
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