From: Sean Christopherson <seanjc@google.com>
To: Xiaoyao Li <xiaoyao.li@intel.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>,
linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
Kai Huang <kai.huang@intel.com>,
Binbin Wu <binbin.wu@linux.intel.com>
Subject: Re: [PATCH 04/17] KVM: x86: Move synthetic PFERR_* sanity checks to SVM's #NPF handler
Date: Tue, 14 May 2024 08:32:27 -0700 [thread overview]
Message-ID: <ZkOEC3PbSmutUdsq@google.com> (raw)
In-Reply-To: <55d00dc8-bfa3-4cf2-9c6a-1d81e5cfd7b3@intel.com>
On Tue, May 14, 2024, Xiaoyao Li wrote:
> On 5/14/2024 1:31 AM, Sean Christopherson wrote:
> > On Mon, May 13, 2024, Xiaoyao Li wrote:
> > > On 5/7/2024 11:58 PM, Paolo Bonzini wrote:
> > > > +#define PFERR_SYNTHETIC_MASK (PFERR_IMPLICIT_ACCESS)
> > > > #define PFERR_NESTED_GUEST_PAGE (PFERR_GUEST_PAGE_MASK | \
> > > > PFERR_WRITE_MASK | \
> > > > diff --git a/arch/x86/kvm/mmu/mmu.c b/arch/x86/kvm/mmu/mmu.c
> > > > index c72a2033ca96..5562d693880a 100644
> > > > --- a/arch/x86/kvm/mmu/mmu.c
> > > > +++ b/arch/x86/kvm/mmu/mmu.c
> > > > @@ -4502,6 +4502,9 @@ int kvm_handle_page_fault(struct kvm_vcpu *vcpu, u64 error_code,
> > > > return -EFAULT;
> > > > #endif
> > > > + /* Ensure the above sanity check also covers KVM-defined flags. */
> > >
> > > 1. There is no sanity check above related to KVM-defined flags yet. It has
> > > to be after Patch 6.
> >
> > Ya, it's not just the comment, the entire changelog expects this patch to land
> > after patch 6.
> > >
> > > 2. I somehow cannot parse the comment properly, though I know it's to ensure
> > > KVM-defined PFERR_SYNTHETIC_MASK not contain any bit below 32-bits.
> >
> > Hmm, how about this?
> >
> > /*
> > * Ensure that the above sanity check on hardware error code bits 63:32
> > * also prevents false positives on KVM-defined flags.
> > */
> >
>
> Maybe it's just myself inability, I still cannot interpret it well.
>
> Can't we put it above the sanity check of error code, and just with a
> comment like
>
> /*
> * Ensure KVM-defined flags not occupied any bits below 32-bits,
> * that are used by hardware.
This is somewhat misleading, as hardware does use bits 63:32 (for #NPF), just not
for #PF error codes. And the reason I'm using rather indirect wording is that
KVM _could_ define synthetic flags in bits 31:0, there's simply a higher probability
of needing to reshuffle bit numbers due to a conflict with a future feature.
Is this better? I think it captures what you're looking for, while hopefully also
capturing that staying out of bits 31:0 isn't a hard requirement.
/*
* Restrict KVM-defined flags to bits 63:32 so that it's impossible for
* them to conflict with #PF error codes, which are limited to 32 bits.
*/
next prev parent reply other threads:[~2024-05-14 15:32 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-05-07 15:58 [PATCH v2 00/17] KVM: x86/mmu: Page fault and MMIO cleanups Paolo Bonzini
2024-05-07 15:58 ` [PATCH 01/17] KVM: x86/mmu: Exit to userspace with -EFAULT if private fault hits emulation Paolo Bonzini
2024-05-13 5:25 ` Xiaoyao Li
2024-05-07 15:58 ` [PATCH 02/17] KVM: x86: Remove separate "bit" defines for page fault error code masks Paolo Bonzini
2024-05-13 5:29 ` Xiaoyao Li
2024-05-07 15:58 ` [PATCH 03/17] KVM: x86: Define more SEV+ page fault error bits/flags for #NPF Paolo Bonzini
2024-05-07 15:58 ` [PATCH 04/17] KVM: x86: Move synthetic PFERR_* sanity checks to SVM's #NPF handler Paolo Bonzini
2024-05-13 5:50 ` Xiaoyao Li
2024-05-13 17:31 ` Sean Christopherson
2024-05-14 4:25 ` Xiaoyao Li
2024-05-14 15:32 ` Sean Christopherson [this message]
2024-05-15 1:03 ` Xiaoyao Li
2024-05-07 15:58 ` [PATCH 05/17] KVM: x86/mmu: Pass full 64-bit error code when handling page faults Paolo Bonzini
2024-05-07 15:58 ` [PATCH 06/17] KVM: x86/mmu: WARN if upper 32 bits of legacy #PF error code are non-zero Paolo Bonzini
2024-05-07 15:58 ` [PATCH 07/17] KVM: x86/mmu: Use synthetic page fault error code to indicate private faults Paolo Bonzini
2024-05-13 5:56 ` Xiaoyao Li
2024-05-07 15:58 ` [PATCH 08/17] KVM: x86/mmu: check for invalid async page faults involving private memory Paolo Bonzini
2024-05-07 15:58 ` [PATCH 09/17] KVM: x86/mmu: WARN and skip MMIO cache on private, reserved page faults Paolo Bonzini
2024-05-13 6:15 ` Xiaoyao Li
2024-05-07 15:58 ` [PATCH 10/17] KVM: x86/mmu: Move private vs. shared check above slot validity checks Paolo Bonzini
2024-05-13 6:22 ` Xiaoyao Li
2024-05-07 15:58 ` [PATCH 11/17] KVM: x86/mmu: Don't force emulation of L2 accesses to non-APIC internal slots Paolo Bonzini
2024-05-07 15:58 ` [PATCH 12/17] KVM: x86/mmu: Explicitly disallow private accesses to emulated MMIO Paolo Bonzini
2024-05-13 6:26 ` Xiaoyao Li
2024-05-07 15:58 ` [PATCH 13/17] KVM: x86/mmu: Move slot checks from __kvm_faultin_pfn() to kvm_faultin_pfn() Paolo Bonzini
2024-05-13 6:27 ` Xiaoyao Li
2024-05-07 15:58 ` [PATCH 14/17] KVM: x86/mmu: Handle no-slot faults at the beginning of kvm_faultin_pfn() Paolo Bonzini
2024-05-13 6:28 ` Xiaoyao Li
2024-05-07 15:58 ` [PATCH 15/17] KVM: x86/mmu: Set kvm_page_fault.hva to KVM_HVA_ERR_BAD for "no slot" faults Paolo Bonzini
2024-05-13 6:28 ` Xiaoyao Li
2024-05-07 15:58 ` [PATCH 16/17] KVM: x86/mmu: Initialize kvm_page_fault's pfn and hva to error values Paolo Bonzini
2024-05-13 6:29 ` Xiaoyao Li
2024-05-07 15:58 ` [PATCH 17/17] KVM: x86/mmu: Sanity check that __kvm_faultin_pfn() doesn't create noslot pfns Paolo Bonzini
2024-05-13 6:40 ` Xiaoyao Li
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