From: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: intel-xe@lists.freedesktop.org,
Clint Taylor <clinton.a.taylor@intel.com>,
Lucas De Marchi <lucas.demarchi@intel.com>,
Balasubramani Vivekanandan <balasubramani.vivekanandan@intel.com>,
Matt Roper <matthew.d.roper@intel.com>,
Radhakrishna Sripada <radhakrishna.sripada@intel.com>
Subject: [PATCH v3 03/19] drm/i915/xe2hpd: Initial cdclk table
Date: Tue, 30 Apr 2024 10:28:34 -0700 [thread overview]
Message-ID: <20240430172850.1881525-4-radhakrishna.sripada@intel.com> (raw)
In-Reply-To: <20240430172850.1881525-1-radhakrishna.sripada@intel.com>
From: Clint Taylor <clinton.a.taylor@intel.com>
Add Xe2_HPD specific CDCLK table and use MTL Funcs.
Bspec: 65243
CC: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Clint Taylor <clinton.a.taylor@intel.com>
Signed-off-by: Balasubramani Vivekanandan <balasubramani.vivekanandan@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
---
drivers/gpu/drm/i915/display/intel_cdclk.c | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c
index 7a833b5f2de2..b78154c82a71 100644
--- a/drivers/gpu/drm/i915/display/intel_cdclk.c
+++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
@@ -1443,6 +1443,14 @@ static const struct intel_cdclk_vals xe2lpd_cdclk_table[] = {
{}
};
+/*
+ * Xe2_HPD always uses the minimal cdclk table from Wa_15015413771
+ */
+static const struct intel_cdclk_vals xe2hpd_cdclk_table[] = {
+ { .refclk = 38400, .cdclk = 652800, .ratio = 34, .waveform = 0xffff },
+ {}
+};
+
static const int cdclk_squash_len = 16;
static int cdclk_squash_divider(u16 waveform)
@@ -3778,6 +3786,9 @@ void intel_init_cdclk_hooks(struct drm_i915_private *dev_priv)
if (DISPLAY_VER(dev_priv) >= 20) {
dev_priv->display.funcs.cdclk = &rplu_cdclk_funcs;
dev_priv->display.cdclk.table = xe2lpd_cdclk_table;
+ } else if (DISPLAY_VER_FULL(dev_priv) >= IP_VER(14, 1)) {
+ dev_priv->display.funcs.cdclk = &rplu_cdclk_funcs;
+ dev_priv->display.cdclk.table = xe2hpd_cdclk_table;
} else if (DISPLAY_VER(dev_priv) >= 14) {
dev_priv->display.funcs.cdclk = &rplu_cdclk_funcs;
dev_priv->display.cdclk.table = mtl_cdclk_table;
--
2.34.1
next prev parent reply other threads:[~2024-04-30 17:30 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-04-30 17:28 [PATCH v3 00/19] Enable display support for Battlemage Radhakrishna Sripada
2024-04-30 17:28 ` [PATCH v3 01/19] drm/i915/bmg: Lane reversal requires writes to both context lanes Radhakrishna Sripada
2024-04-30 17:28 ` [PATCH v3 02/19] drm/i915/bmg: Define IS_BATTLEMAGE macro Radhakrishna Sripada
2024-04-30 17:28 ` Radhakrishna Sripada [this message]
2024-04-30 17:28 ` [PATCH v3 04/19] drm/i915/bmg: Extend DG2 tc check to future Radhakrishna Sripada
2024-04-30 17:28 ` [PATCH v3 05/19] drm/i915/xe2hpd: Properly disable power in port A Radhakrishna Sripada
2024-04-30 17:28 ` [PATCH v3 06/19] drm/i915/xe2hpd: Add new C20 PHY SRAM address Radhakrishna Sripada
2024-05-03 3:24 ` Sripada, Radhakrishna
2024-04-30 17:28 ` [PATCH v3 07/19] drm/i915/xe2hpd: Add support for eDP PLL configuration Radhakrishna Sripada
2024-04-30 17:28 ` [PATCH v3 08/19] drm/i915/xe2hpd: update pll values in sync with Bspec Radhakrishna Sripada
2024-04-30 17:28 ` [PATCH v3 09/19] drm/i915/xe2hpd: Add display info Radhakrishna Sripada
2024-04-30 17:28 ` [PATCH v3 10/19] drm/i915/xe2hpd: Configure CHICKEN_MISC_2 before enabling planes Radhakrishna Sripada
2024-04-30 17:28 ` [PATCH v3 11/19] drm/i915/xe2hpd: Add max memory bandwidth algorithm Radhakrishna Sripada
2024-04-30 17:28 ` [PATCH v3 12/19] drm/i915/xe2hpd: Do not program MBUS_DBOX BW credits Radhakrishna Sripada
2024-04-30 17:28 ` [PATCH v3 13/19] drm/i915/bmg: BMG should re-use MTL's south display logic Radhakrishna Sripada
2024-04-30 17:28 ` [PATCH v3 14/19] Revert "drm/i915/dgfx: DGFX uses direct VBT pin mapping" Radhakrishna Sripada
2024-04-30 17:28 ` [PATCH v3 15/19] drm/i915/xe2hpd: Set maximum DP rate to UHBR13.5 Radhakrishna Sripada
2024-04-30 17:28 ` [PATCH v3 16/19] drm/xe/gt_print: add xe_gt_err_once() Radhakrishna Sripada
2024-05-03 18:34 ` Lucas De Marchi
2024-04-30 17:28 ` [PATCH v3 17/19] drm/xe/device: implement transient flush Radhakrishna Sripada
2024-05-03 18:40 ` Lucas De Marchi
2024-04-30 17:28 ` [PATCH v3 18/19] drm/i915/display: perform " Radhakrishna Sripada
2024-04-30 17:57 ` Lucas De Marchi
2024-04-30 17:28 ` [PATCH v3 19/19] drm/xe/bmg: Enable the display support Radhakrishna Sripada
2024-04-30 17:49 ` Lucas De Marchi
2024-04-30 18:42 ` ✗ Fi.CI.CHECKPATCH: warning for Enable display support for Battlemage (rev3) Patchwork
2024-04-30 18:42 ` ✗ Fi.CI.SPARSE: " Patchwork
2024-04-30 18:48 ` ✓ Fi.CI.BAT: success " Patchwork
2024-05-01 2:00 ` ✓ Fi.CI.IGT: " Patchwork
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