From: Alex Bee <knaerzche@gmail.com>
To: "Sandy Huang" <hjc@rock-chips.com>,
"Heiko Stübner" <heiko@sntech.de>,
"Andy Yan" <andy.yan@rock-chips.com>,
"Maarten Lankhorst" <maarten.lankhorst@linux.intel.com>,
"Maxime Ripard" <mripard@kernel.org>,
"Thomas Zimmermann" <tzimmermann@suse.de>,
"David Airlie" <airlied@gmail.com>,
"Daniel Vetter" <daniel@ffwll.ch>,
"Rob Herring" <robh@kernel.org>,
"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
"Conor Dooley" <conor+dt@kernel.org>,
"Michael Turquette" <mturquette@baylibre.com>,
"Stephen Boyd" <sboyd@kernel.org>
Cc: dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org,
linux-clk@vger.kernel.org, Alex Bee <knaerzche@gmail.com>
Subject: [PATCH v3 3/7] clk: rockchip: rk3128: Export PCLK_MIPIPHY
Date: Thu, 9 May 2024 16:06:49 +0200 [thread overview]
Message-ID: <20240509140653.168591-4-knaerzche@gmail.com> (raw)
In-Reply-To: <20240509140653.168591-1-knaerzche@gmail.com>
Export the D-DHY's APB clock for usage in the DT. Also drop the
CLK_IGNORE_UNUSED-flag, as the clock will be enabled on demand.
Signed-off-by: Alex Bee <knaerzche@gmail.com>
---
changes since v1:
- reword commit message
drivers/clk/rockchip/clk-rk3128.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/rockchip/clk-rk3128.c b/drivers/clk/rockchip/clk-rk3128.c
index 75071e0cd321..a20d1fd25e2a 100644
--- a/drivers/clk/rockchip/clk-rk3128.c
+++ b/drivers/clk/rockchip/clk-rk3128.c
@@ -526,7 +526,7 @@ static struct rockchip_clk_branch common_clk_branches[] __initdata = {
GATE(PCLK_ACODEC, "pclk_acodec", "pclk_cpu", 0, RK2928_CLKGATE_CON(5), 14, GFLAGS),
GATE(0, "pclk_ddrupctl", "pclk_cpu", CLK_IGNORE_UNUSED, RK2928_CLKGATE_CON(5), 7, GFLAGS),
GATE(0, "pclk_grf", "pclk_cpu", CLK_IGNORE_UNUSED, RK2928_CLKGATE_CON(5), 4, GFLAGS),
- GATE(0, "pclk_mipiphy", "pclk_cpu", CLK_IGNORE_UNUSED, RK2928_CLKGATE_CON(5), 0, GFLAGS),
+ GATE(PCLK_MIPIPHY, "pclk_mipiphy", "pclk_cpu", 0, RK2928_CLKGATE_CON(5), 0, GFLAGS),
GATE(0, "pclk_pmu", "pclk_pmu_pre", 0, RK2928_CLKGATE_CON(9), 2, GFLAGS),
GATE(0, "pclk_pmu_niu", "pclk_pmu_pre", CLK_IGNORE_UNUSED, RK2928_CLKGATE_CON(9), 3, GFLAGS),
--
2.43.2
next prev parent reply other threads:[~2024-05-09 14:07 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-05-09 14:06 [PATCH v3 0/7] Add DSI support for RK3128 Alex Bee
2024-05-09 14:06 ` [PATCH v3 1/7] dt-bindings: display: rockchip, dw-mipi-dsi: Document RK3128 DSI Alex Bee
2024-05-09 14:06 ` [PATCH v3 2/7] dt-bindings: clock: rk3128: Add PCLK_MIPIPHY Alex Bee
2024-05-09 14:06 ` Alex Bee [this message]
2024-05-09 14:06 ` [PATCH v3 4/7] clk: rockchip: rk3128: Add hclk_vio_h2p to critical clocks Alex Bee
2024-05-09 14:06 ` [PATCH v3 5/7] drm/rockchip: dsi: Add support for RK3128 Alex Bee
2024-05-09 14:06 ` [PATCH v3 6/7] ARM: dts: rockchip: Add D-PHY " Alex Bee
2024-05-09 14:06 ` [PATCH v3 7/7] ARM: dts: rockchip: Add DSI " Alex Bee
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