[GIT PULL] RISC-V Fixes for 5.13-rc6

From: Palmer Dabbelt <palmer@dabbelt.com>
To: Linus Torvalds <torvalds@linux-foundation.org>
Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: [GIT PULL] RISC-V Fixes for 5.13-rc6
Date: Sat, 12 Jun 2021 08:58:05 -0700 (PDT)	[thread overview]
Message-ID: <mhng-eafb1de7-d58e-417f-9a42-76e32e2a04d5@palmerdabbelt-glaptop> (raw)

The following changes since commit 160ce364167fabf8df5bebfff1b38fd5d8c146c9:

  Merge remote-tracking branch 'riscv/riscv-wx-mappings' into fixes (2021-06-01 21:17:08 -0700)

are available in the Git repository at:

  git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux.git tags/riscv-for-linus-5.13-rc6

for you to fetch changes up to 0ddd7eaffa644baa78e247bbd220ab7195b1eed6:

  riscv: Fix BUILTIN_DTB for sifive and microchip soc (2021-06-11 21:07:09 -0700)

----------------------------------------------------------------
RISC-V Fixes for 5.13-rc6

* A pair of XIP fixes: one to fix alternatives, and one to turn off the
  rest of the features that require code modification.
* A fix to a type that was causing some alternatives to break.
* A build fix for BUILTIN_DTB.

----------------------------------------------------------------
Alexandre Ghiti (1):
      riscv: Fix BUILTIN_DTB for sifive and microchip soc

Jisheng Zhang (1):
      riscv: code patching only works on !XIP_KERNEL

Vitaly Wool (2):
      riscv: xip: support runtime trap patching
      riscv: alternative: fix typo in macro name

 arch/riscv/Kconfig                          | 18 +++++++++---------
 arch/riscv/boot/dts/microchip/Makefile      |  1 +
 arch/riscv/boot/dts/sifive/Makefile         |  1 +
 arch/riscv/include/asm/alternative-macros.h |  4 ++--
 arch/riscv/kernel/traps.c                   | 13 +++++++++----
 arch/riscv/kernel/vmlinux-xip.lds.S         | 15 ++++++++++++++-
 6 files changed, 36 insertions(+), 16 deletions(-)