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From: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
To: Linux Doc Mailing List <linux-doc@vger.kernel.org>
Cc: "Mauro Carvalho Chehab" <mchehab+huawei@kernel.org>,
	"Jonathan Corbet" <corbet@lwn.net>,
	"Bjorn Helgaas" <bhelgaas@google.com>,
	linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org,
	"Krzysztof Wilczyński" <kw@linux.com>
Subject: [PATCH v2 31/40] docs: PCI: acpi-info.rst: Use ASCII subset instead of UTF-8 alternate symbols
Date: Wed, 12 May 2021 14:50:35 +0200	[thread overview]
Message-ID: <7fd9d4360a3d0f761b169b95d9997f4f5d06319c.1620823573.git.mchehab+huawei@kernel.org> (raw)
In-Reply-To: <cover.1620823573.git.mchehab+huawei@kernel.org>

The conversion tools used during DocBook/LaTeX/Markdown->ReST conversion
and some automatic rules which exists on certain text editors like
LibreOffice turned ASCII characters into some UTF-8 alternatives that
are better displayed on html and PDF.

While it is OK to use UTF-8 characters in Linux, it is better to
use the ASCII subset instead of using an UTF-8 equivalent character
as it makes life easier for tools like grep, and are easier to edit
with the some commonly used text/source code editors.

Also, Sphinx already do such conversion automatically outside literal blocks:
   https://docutils.sourceforge.io/docs/user/smartquotes.html

So, replace the occurences of the following UTF-8 characters:

	- U+00a0 (' '): NO-BREAK SPACE
	- U+2019 ('’'): RIGHT SINGLE QUOTATION MARK

Reviewed-by: Krzysztof Wilczyński <kw@linux.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
---
 Documentation/PCI/acpi-info.rst | 22 +++++++++++-----------
 1 file changed, 11 insertions(+), 11 deletions(-)

diff --git a/Documentation/PCI/acpi-info.rst b/Documentation/PCI/acpi-info.rst
index 060217081c79..30d0fc85dd8e 100644
--- a/Documentation/PCI/acpi-info.rst
+++ b/Documentation/PCI/acpi-info.rst
@@ -22,9 +22,9 @@ or if the device has INTx interrupts connected by platform interrupt
 controllers and a _PRT is needed to describe those connections.
 
 ACPI resource description is done via _CRS objects of devices in the ACPI
-namespace [2].   The _CRS is like a generalized PCI BAR: the OS can read
+namespace [2].   The _CRS is like a generalized PCI BAR: the OS can read
 _CRS and figure out what resource is being consumed even if it doesn't have
-a driver for the device [3].  That's important because it means an old OS
+a driver for the device [3].  That's important because it means an old OS
 can work correctly even on a system with new devices unknown to the OS.
 The new devices might not do anything, but the OS can at least make sure no
 resources conflict with them.
@@ -41,15 +41,15 @@ ACPI, that device will have a specific _HID/_CID that tells the OS what
 driver to bind to it, and the _CRS tells the OS and the driver where the
 device's registers are.
 
-PCI host bridges are PNP0A03 or PNP0A08 devices.  Their _CRS should
-describe all the address space they consume.  This includes all the windows
+PCI host bridges are PNP0A03 or PNP0A08 devices.  Their _CRS should
+describe all the address space they consume.  This includes all the windows
 they forward down to the PCI bus, as well as registers of the host bridge
-itself that are not forwarded to PCI.  The host bridge registers include
+itself that are not forwarded to PCI.  The host bridge registers include
 things like secondary/subordinate bus registers that determine the bus
 range below the bridge, window registers that describe the apertures, etc.
 These are all device-specific, non-architected things, so the only way a
 PNP0A03/PNP0A08 driver can manage them is via _PRS/_CRS/_SRS, which contain
-the device-specific details.  The host bridge registers also include ECAM
+the device-specific details.  The host bridge registers also include ECAM
 space, since it is consumed by the host bridge.
 
 ACPI defines a Consumer/Producer bit to distinguish the bridge registers
@@ -66,7 +66,7 @@ the PNP0A03/PNP0A08 device itself.  The workaround was to describe the
 bridge registers (including ECAM space) in PNP0C02 catch-all devices [6].
 With the exception of ECAM, the bridge register space is device-specific
 anyway, so the generic PNP0A03/PNP0A08 driver (pci_root.c) has no need to
-know about it.  
+know about it.  
 
 New architectures should be able to use "Consumer" Extended Address Space
 descriptors in the PNP0A03 device for bridge registers, including ECAM,
@@ -75,9 +75,9 @@ ia64 kernels assume all address space descriptors, including "Consumer"
 Extended Address Space ones, are windows, so it would not be safe to
 describe bridge registers this way on those architectures.
 
-PNP0C02 "motherboard" devices are basically a catch-all.  There's no
+PNP0C02 "motherboard" devices are basically a catch-all.  There's no
 programming model for them other than "don't use these resources for
-anything else."  So a PNP0C02 _CRS should claim any address space that is
+anything else."  So a PNP0C02 _CRS should claim any address space that is
 (1) not claimed by _CRS under any other device object in the ACPI namespace
 and (2) should not be assigned by the OS to something else.
 
@@ -125,7 +125,7 @@ address always corresponds to bus 0, even if the bus range below the bridge
     requirements of the device.  It may also call _CRS to find the current
     resource settings for the device.  Using this information, the Plug and
     Play system determines what resources the device should consume and
-    sets those resources by calling the device’s _SRS control method.
+    sets those resources by calling the device's _SRS control method.
 
     In ACPI, devices can consume resources (for example, legacy keyboards),
     provide resources (for example, a proprietary PCI bridge), or do both.
@@ -156,7 +156,7 @@ address always corresponds to bus 0, even if the bus range below the bridge
     4.1.3) must be reserved by declaring a motherboard resource.  For most
     systems, the motherboard resource would appear at the root of the ACPI
     namespace (under \_SB) in a node with a _HID of EISAID (PNP0C02), and
-    the resources in this case should not be claimed in the root PCI bus’s
+    the resources in this case should not be claimed in the root PCI bus's
     _CRS.  The resources can optionally be returned in Int15 E820 or
     EFIGetMemoryMap as reserved memory but must always be reported through
     ACPI as a motherboard resource.
-- 
2.30.2


  parent reply	other threads:[~2021-05-12 12:54 UTC|newest]

Thread overview: 128+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-05-12 12:50 [PATCH v2 00/40] Use ASCII subset instead of UTF-8 alternate symbols Mauro Carvalho Chehab
2021-05-12 12:50 ` [Intel-wired-lan] " Mauro Carvalho Chehab
2021-05-12 12:50 ` [Intel-gfx] " Mauro Carvalho Chehab
2021-05-12 12:50 ` Mauro Carvalho Chehab
2021-05-12 12:50 ` [f2fs-dev] " Mauro Carvalho Chehab
2021-05-12 12:50 ` Mauro Carvalho Chehab
2021-05-12 12:50 ` [PATCH v2 01/40] docs: hwmon: " Mauro Carvalho Chehab
2021-05-12 12:50 ` [PATCH v2 02/40] docs: admin-guide: " Mauro Carvalho Chehab
2021-05-12 12:50 ` [PATCH v2 03/40] docs: admin-guide: media: ipu3.rst: " Mauro Carvalho Chehab
2021-05-12 12:50 ` [PATCH v2 04/40] docs: admin-guide: perf: imx-ddr.rst: " Mauro Carvalho Chehab
2021-05-12 12:50   ` Mauro Carvalho Chehab
2021-05-12 12:50 ` [PATCH v2 05/40] docs: admin-guide: pm: " Mauro Carvalho Chehab
2021-05-12 13:53   ` Rafael J. Wysocki
2021-05-12 12:50 ` [PATCH v2 06/40] docs: trace: coresight: coresight-etm4x-reference.rst: " Mauro Carvalho Chehab
2021-05-12 12:50   ` Mauro Carvalho Chehab
2021-05-12 12:50 ` [PATCH v2 07/40] docs: driver-api: ioctl.rst: " Mauro Carvalho Chehab
2021-05-12 12:50 ` [PATCH v2 08/40] docs: driver-api: thermal: " Mauro Carvalho Chehab
2021-06-12 19:08   ` Daniel Lezcano
2021-05-12 12:50 ` [PATCH v2 09/40] docs: driver-api: media: drivers: " Mauro Carvalho Chehab
2021-05-12 12:50 ` [PATCH v2 10/40] docs: driver-api: firmware: other_interfaces.rst: " Mauro Carvalho Chehab
2021-05-12 12:50 ` [PATCH v2 11/40] docs: fault-injection: nvme-fault-injection.rst: " Mauro Carvalho Chehab
2021-05-12 12:50 ` [PATCH v2 12/40] docs: usb: " Mauro Carvalho Chehab
2021-05-12 12:50 ` [PATCH v2 13/40] docs: process: code-of-conduct.rst: " Mauro Carvalho Chehab
2021-05-12 12:50 ` [PATCH v2 14/40] docs: userspace-api: media: fdl-appendix.rst: " Mauro Carvalho Chehab
2021-05-12 12:50 ` [PATCH v2 15/40] docs: userspace-api: media: v4l: " Mauro Carvalho Chehab
2021-05-12 12:50 ` [PATCH v2 16/40] docs: userspace-api: media: dvb: " Mauro Carvalho Chehab
2021-05-12 12:50 ` [PATCH v2 17/40] docs: vm: zswap.rst: " Mauro Carvalho Chehab
2021-05-12 12:50 ` [PATCH v2 18/40] docs: filesystems: f2fs.rst: " Mauro Carvalho Chehab
2021-05-12 12:50   ` [f2fs-dev] " Mauro Carvalho Chehab
2021-05-12 12:50 ` [PATCH v2 19/40] docs: filesystems: ext4: " Mauro Carvalho Chehab
2021-05-12 12:50 ` [PATCH v2 20/40] docs: kernel-hacking: " Mauro Carvalho Chehab
2021-05-12 12:50 ` [PATCH v2 21/40] docs: hid: " Mauro Carvalho Chehab
2021-05-12 12:50 ` [PATCH v2 22/40] docs: security: tpm: tpm_event_log.rst: " Mauro Carvalho Chehab
2021-05-12 12:50 ` [PATCH v2 23/40] docs: security: keys: trusted-encrypted.rst: " Mauro Carvalho Chehab
2021-05-12 12:50 ` [PATCH v2 24/40] docs: networking: scaling.rst: " Mauro Carvalho Chehab
2021-05-12 12:50 ` [PATCH v2 25/40] docs: networking: devlink: devlink-dpipe.rst: " Mauro Carvalho Chehab
2021-05-12 12:50 ` [PATCH v2 26/40] docs: networking: device_drivers: " Mauro Carvalho Chehab
2021-05-12 12:50   ` [Intel-wired-lan] " Mauro Carvalho Chehab
2021-05-12 12:50 ` [PATCH v2 27/40] docs: x86: " Mauro Carvalho Chehab
2021-05-12 12:50 ` [PATCH v2 28/40] docs: scheduler: sched-deadline.rst: " Mauro Carvalho Chehab
2021-05-12 12:50 ` [PATCH v2 29/40] docs: power: powercap: powercap.rst: " Mauro Carvalho Chehab
2021-05-12 13:54   ` Rafael J. Wysocki
2021-05-12 12:50 ` [PATCH v2 30/40] docs: ABI: " Mauro Carvalho Chehab
2021-05-12 13:49   ` Sudeep Holla
2021-05-12 12:50 ` Mauro Carvalho Chehab [this message]
2021-05-12 21:29   ` [PATCH v2 31/40] docs: PCI: acpi-info.rst: " Bjorn Helgaas
2021-05-12 12:50 ` [PATCH v2 32/40] docs: gpu: " Mauro Carvalho Chehab
2021-05-12 12:50   ` [Intel-gfx] " Mauro Carvalho Chehab
2021-05-12 12:50   ` Mauro Carvalho Chehab
2021-05-12 12:50 ` [PATCH v2 33/40] docs: sound: kernel-api: writing-an-alsa-driver.rst: " Mauro Carvalho Chehab
2021-05-12 12:50   ` Mauro Carvalho Chehab
2021-05-12 12:50 ` [PATCH v2 34/40] docs: arm64: arm-acpi.rst: " Mauro Carvalho Chehab
2021-05-12 12:50   ` Mauro Carvalho Chehab
2021-05-12 12:50 ` [PATCH v2 35/40] docs: infiniband: tag_matching.rst: " Mauro Carvalho Chehab
2021-05-12 12:50 ` [PATCH v2 36/40] docs: misc-devices: ibmvmc.rst: " Mauro Carvalho Chehab
2021-05-12 12:50 ` [PATCH v2 37/40] docs: firmware-guide: acpi: lpit.rst: " Mauro Carvalho Chehab
2021-05-12 13:46   ` Rafael J. Wysocki
2021-05-12 12:50 ` [PATCH v2 38/40] docs: firmware-guide: acpi: dsd: graph.rst: " Mauro Carvalho Chehab
2021-05-12 13:46   ` Rafael J. Wysocki
2021-05-12 12:50 ` [PATCH v2 39/40] docs: virt: kvm: api.rst: " Mauro Carvalho Chehab
2021-05-12 12:50 ` [PATCH v2 40/40] docs: RCU: " Mauro Carvalho Chehab
2021-05-12 14:14 ` [Intel-gfx] [PATCH v2 00/40] " Theodore Ts'o
2021-05-12 14:14   ` [Intel-wired-lan] " Theodore Ts'o
2021-05-12 14:14   ` Theodore Ts'o
2021-05-12 14:14   ` Theodore Ts'o
2021-05-12 14:14   ` Theodore Ts'o
2021-05-12 14:14   ` [f2fs-dev] " Theodore Ts'o
2021-05-12 15:17   ` Mauro Carvalho Chehab
2021-05-12 15:17     ` [Intel-wired-lan] " Mauro Carvalho Chehab
2021-05-12 15:17     ` Mauro Carvalho Chehab
2021-05-12 15:17     ` [Intel-gfx] " Mauro Carvalho Chehab
2021-05-12 15:17     ` Mauro Carvalho Chehab
2021-05-12 15:17     ` Mauro Carvalho Chehab
2021-05-12 17:12     ` [Intel-gfx] " David Woodhouse
2021-05-12 17:12       ` [Intel-wired-lan] " David Woodhouse
2021-05-12 17:12       ` David Woodhouse
2021-05-12 17:12       ` David Woodhouse
2021-05-12 17:12       ` David Woodhouse
2021-05-12 17:07 ` [Intel-gfx] " David Woodhouse
2021-05-12 17:07   ` [Intel-wired-lan] " David Woodhouse
2021-05-12 17:07   ` David Woodhouse
2021-05-12 17:07   ` David Woodhouse
2021-05-12 17:07   ` David Woodhouse
2021-05-14  8:21   ` Mauro Carvalho Chehab
2021-05-14  8:21     ` [Intel-wired-lan] " Mauro Carvalho Chehab
2021-05-14  8:21     ` [Intel-gfx] " Mauro Carvalho Chehab
2021-05-14  8:21     ` Mauro Carvalho Chehab
2021-05-14  8:21     ` Mauro Carvalho Chehab
2021-05-14  8:21     ` [f2fs-dev] " Mauro Carvalho Chehab
2021-05-14  9:06     ` [Intel-gfx] " David Woodhouse
2021-05-14  9:06       ` [Intel-wired-lan] " David Woodhouse
2021-05-14  9:06       ` David Woodhouse
2021-05-14  9:06       ` David Woodhouse
2021-05-14  9:06       ` David Woodhouse
2021-05-14 11:08       ` [f2fs-dev] " Edward Cree
2021-05-14 11:08         ` [Intel-wired-lan] " Edward Cree
2021-05-14 11:08         ` [Intel-gfx] " Edward Cree
2021-05-14 11:08         ` Edward Cree
2021-05-14 11:08         ` Edward Cree
2021-05-14 11:08         ` Edward Cree
2021-05-14 14:18         ` [f2fs-dev] " Mauro Carvalho Chehab
2021-05-14 14:18           ` [Intel-wired-lan] " Mauro Carvalho Chehab
2021-05-14 14:18           ` [Intel-gfx] " Mauro Carvalho Chehab
2021-05-14 14:18           ` Mauro Carvalho Chehab
2021-05-14 14:18           ` Mauro Carvalho Chehab
2021-05-14 14:18           ` Mauro Carvalho Chehab
2021-05-15  8:22       ` Mauro Carvalho Chehab
2021-05-15  8:22         ` [Intel-wired-lan] " Mauro Carvalho Chehab
2021-05-15  8:22         ` [Intel-gfx] " Mauro Carvalho Chehab
2021-05-15  8:22         ` Mauro Carvalho Chehab
2021-05-15  8:22         ` [f2fs-dev] " Mauro Carvalho Chehab
2021-05-15  8:22         ` Mauro Carvalho Chehab
2021-05-15  9:24         ` [Intel-gfx] " David Woodhouse
2021-05-15  9:24           ` [Intel-wired-lan] " David Woodhouse
2021-05-15  9:24           ` David Woodhouse
2021-05-15  9:24           ` David Woodhouse
2021-05-15  9:24           ` David Woodhouse
2021-05-15 11:23           ` [f2fs-dev] " Mauro Carvalho Chehab
2021-05-15 11:23             ` [Intel-wired-lan] " Mauro Carvalho Chehab
2021-05-15 11:23             ` [Intel-gfx] " Mauro Carvalho Chehab
2021-05-15 11:23             ` Mauro Carvalho Chehab
2021-05-15 11:23             ` Mauro Carvalho Chehab
2021-05-15 11:23             ` Mauro Carvalho Chehab
2021-05-15 12:02             ` [Intel-gfx] " David Woodhouse
2021-05-15 12:02               ` [Intel-wired-lan] " David Woodhouse
2021-05-15 12:02               ` David Woodhouse
2021-05-15 12:02               ` David Woodhouse
2021-05-15 12:02               ` David Woodhouse

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