From: Tony Luck <tony.luck@intel.com>
To: Borislav Petkov <bp@alien8.de>,
Thomas Gleixner <tglx@linutronix.de>,
Dave Hansen <dave.hansen@linux.intel.com>,
x86@kernel.org
Cc: Peter Zijlstra <peterz@infradead.org>,
Ingo Molnar <mingo@redhat.com>,
Arnaldo Carvalho de Melo <acme@kernel.org>,
Namhyung Kim <namhyung@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
Alexander Shishkin <alexander.shishkin@linux.intel.com>,
Jiri Olsa <jolsa@kernel.org>, Ian Rogers <irogers@google.com>,
Adrian Hunter <adrian.hunter@intel.com>,
"H. Peter Anvin" <hpa@zytor.com>,
linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org,
patches@lists.linux.dev, Tony Luck <tony.luck@intel.com>
Subject: [PATCH v4 44/71] perf/x86/intel: Switch to new Intel CPU model defines
Date: Wed, 24 Apr 2024 11:15:22 -0700 [thread overview]
Message-ID: <20240424181522.42003-1-tony.luck@intel.com> (raw)
In-Reply-To: <20240424181245.41141-1-tony.luck@intel.com>
New CPU #defines encode vendor and family as well as model.
Signed-off-by: Tony Luck <tony.luck@intel.com>
---
arch/x86/events/intel/core.c | 148 +++++++++++++++++------------------
1 file changed, 74 insertions(+), 74 deletions(-)
diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c
index 768d1414897f..94206f8cd371 100644
--- a/arch/x86/events/intel/core.c
+++ b/arch/x86/events/intel/core.c
@@ -4698,8 +4698,8 @@ static void intel_pmu_check_extra_regs(struct extra_reg *extra_regs);
static inline bool intel_pmu_broken_perf_cap(void)
{
/* The Perf Metric (Bit 15) is always cleared */
- if ((boot_cpu_data.x86_model == INTEL_FAM6_METEORLAKE) ||
- (boot_cpu_data.x86_model == INTEL_FAM6_METEORLAKE_L))
+ if (boot_cpu_data.x86_vfm == INTEL_METEORLAKE ||
+ boot_cpu_data.x86_vfm == INTEL_METEORLAKE_L)
return true;
return false;
@@ -6245,19 +6245,19 @@ __init int intel_pmu_init(void)
/*
* Install the hw-cache-events table:
*/
- switch (boot_cpu_data.x86_model) {
- case INTEL_FAM6_CORE_YONAH:
+ switch (boot_cpu_data.x86_vfm) {
+ case INTEL_CORE_YONAH:
pr_cont("Core events, ");
name = "core";
break;
- case INTEL_FAM6_CORE2_MEROM:
+ case INTEL_CORE2_MEROM:
x86_add_quirk(intel_clovertown_quirk);
fallthrough;
- case INTEL_FAM6_CORE2_MEROM_L:
- case INTEL_FAM6_CORE2_PENRYN:
- case INTEL_FAM6_CORE2_DUNNINGTON:
+ case INTEL_CORE2_MEROM_L:
+ case INTEL_CORE2_PENRYN:
+ case INTEL_CORE2_DUNNINGTON:
memcpy(hw_cache_event_ids, core2_hw_cache_event_ids,
sizeof(hw_cache_event_ids));
@@ -6269,9 +6269,9 @@ __init int intel_pmu_init(void)
name = "core2";
break;
- case INTEL_FAM6_NEHALEM:
- case INTEL_FAM6_NEHALEM_EP:
- case INTEL_FAM6_NEHALEM_EX:
+ case INTEL_NEHALEM:
+ case INTEL_NEHALEM_EP:
+ case INTEL_NEHALEM_EX:
memcpy(hw_cache_event_ids, nehalem_hw_cache_event_ids,
sizeof(hw_cache_event_ids));
memcpy(hw_cache_extra_regs, nehalem_hw_cache_extra_regs,
@@ -6303,11 +6303,11 @@ __init int intel_pmu_init(void)
name = "nehalem";
break;
- case INTEL_FAM6_ATOM_BONNELL:
- case INTEL_FAM6_ATOM_BONNELL_MID:
- case INTEL_FAM6_ATOM_SALTWELL:
- case INTEL_FAM6_ATOM_SALTWELL_MID:
- case INTEL_FAM6_ATOM_SALTWELL_TABLET:
+ case INTEL_ATOM_BONNELL:
+ case INTEL_ATOM_BONNELL_MID:
+ case INTEL_ATOM_SALTWELL:
+ case INTEL_ATOM_SALTWELL_MID:
+ case INTEL_ATOM_SALTWELL_TABLET:
memcpy(hw_cache_event_ids, atom_hw_cache_event_ids,
sizeof(hw_cache_event_ids));
@@ -6320,11 +6320,11 @@ __init int intel_pmu_init(void)
name = "bonnell";
break;
- case INTEL_FAM6_ATOM_SILVERMONT:
- case INTEL_FAM6_ATOM_SILVERMONT_D:
- case INTEL_FAM6_ATOM_SILVERMONT_MID:
- case INTEL_FAM6_ATOM_AIRMONT:
- case INTEL_FAM6_ATOM_AIRMONT_MID:
+ case INTEL_ATOM_SILVERMONT:
+ case INTEL_ATOM_SILVERMONT_D:
+ case INTEL_ATOM_SILVERMONT_MID:
+ case INTEL_ATOM_AIRMONT:
+ case INTEL_ATOM_AIRMONT_MID:
memcpy(hw_cache_event_ids, slm_hw_cache_event_ids,
sizeof(hw_cache_event_ids));
memcpy(hw_cache_extra_regs, slm_hw_cache_extra_regs,
@@ -6342,8 +6342,8 @@ __init int intel_pmu_init(void)
name = "silvermont";
break;
- case INTEL_FAM6_ATOM_GOLDMONT:
- case INTEL_FAM6_ATOM_GOLDMONT_D:
+ case INTEL_ATOM_GOLDMONT:
+ case INTEL_ATOM_GOLDMONT_D:
memcpy(hw_cache_event_ids, glm_hw_cache_event_ids,
sizeof(hw_cache_event_ids));
memcpy(hw_cache_extra_regs, glm_hw_cache_extra_regs,
@@ -6369,7 +6369,7 @@ __init int intel_pmu_init(void)
name = "goldmont";
break;
- case INTEL_FAM6_ATOM_GOLDMONT_PLUS:
+ case INTEL_ATOM_GOLDMONT_PLUS:
memcpy(hw_cache_event_ids, glp_hw_cache_event_ids,
sizeof(hw_cache_event_ids));
memcpy(hw_cache_extra_regs, glp_hw_cache_extra_regs,
@@ -6398,9 +6398,9 @@ __init int intel_pmu_init(void)
name = "goldmont_plus";
break;
- case INTEL_FAM6_ATOM_TREMONT_D:
- case INTEL_FAM6_ATOM_TREMONT:
- case INTEL_FAM6_ATOM_TREMONT_L:
+ case INTEL_ATOM_TREMONT_D:
+ case INTEL_ATOM_TREMONT:
+ case INTEL_ATOM_TREMONT_L:
x86_pmu.late_ack = true;
memcpy(hw_cache_event_ids, glp_hw_cache_event_ids,
sizeof(hw_cache_event_ids));
@@ -6427,7 +6427,7 @@ __init int intel_pmu_init(void)
name = "Tremont";
break;
- case INTEL_FAM6_ATOM_GRACEMONT:
+ case INTEL_ATOM_GRACEMONT:
intel_pmu_init_grt(NULL);
intel_pmu_pebs_data_source_grt();
x86_pmu.pebs_latency_data = adl_latency_data_small;
@@ -6439,8 +6439,8 @@ __init int intel_pmu_init(void)
name = "gracemont";
break;
- case INTEL_FAM6_ATOM_CRESTMONT:
- case INTEL_FAM6_ATOM_CRESTMONT_X:
+ case INTEL_ATOM_CRESTMONT:
+ case INTEL_ATOM_CRESTMONT_X:
intel_pmu_init_grt(NULL);
x86_pmu.extra_regs = intel_cmt_extra_regs;
intel_pmu_pebs_data_source_cmt();
@@ -6453,9 +6453,9 @@ __init int intel_pmu_init(void)
name = "crestmont";
break;
- case INTEL_FAM6_WESTMERE:
- case INTEL_FAM6_WESTMERE_EP:
- case INTEL_FAM6_WESTMERE_EX:
+ case INTEL_WESTMERE:
+ case INTEL_WESTMERE_EP:
+ case INTEL_WESTMERE_EX:
memcpy(hw_cache_event_ids, westmere_hw_cache_event_ids,
sizeof(hw_cache_event_ids));
memcpy(hw_cache_extra_regs, nehalem_hw_cache_extra_regs,
@@ -6484,8 +6484,8 @@ __init int intel_pmu_init(void)
name = "westmere";
break;
- case INTEL_FAM6_SANDYBRIDGE:
- case INTEL_FAM6_SANDYBRIDGE_X:
+ case INTEL_SANDYBRIDGE:
+ case INTEL_SANDYBRIDGE_X:
x86_add_quirk(intel_sandybridge_quirk);
x86_add_quirk(intel_ht_bug);
memcpy(hw_cache_event_ids, snb_hw_cache_event_ids,
@@ -6498,7 +6498,7 @@ __init int intel_pmu_init(void)
x86_pmu.event_constraints = intel_snb_event_constraints;
x86_pmu.pebs_constraints = intel_snb_pebs_event_constraints;
x86_pmu.pebs_aliases = intel_pebs_aliases_snb;
- if (boot_cpu_data.x86_model == INTEL_FAM6_SANDYBRIDGE_X)
+ if (boot_cpu_data.x86_vfm == INTEL_SANDYBRIDGE_X)
x86_pmu.extra_regs = intel_snbep_extra_regs;
else
x86_pmu.extra_regs = intel_snb_extra_regs;
@@ -6524,8 +6524,8 @@ __init int intel_pmu_init(void)
name = "sandybridge";
break;
- case INTEL_FAM6_IVYBRIDGE:
- case INTEL_FAM6_IVYBRIDGE_X:
+ case INTEL_IVYBRIDGE:
+ case INTEL_IVYBRIDGE_X:
x86_add_quirk(intel_ht_bug);
memcpy(hw_cache_event_ids, snb_hw_cache_event_ids,
sizeof(hw_cache_event_ids));
@@ -6541,7 +6541,7 @@ __init int intel_pmu_init(void)
x86_pmu.pebs_constraints = intel_ivb_pebs_event_constraints;
x86_pmu.pebs_aliases = intel_pebs_aliases_ivb;
x86_pmu.pebs_prec_dist = true;
- if (boot_cpu_data.x86_model == INTEL_FAM6_IVYBRIDGE_X)
+ if (boot_cpu_data.x86_vfm == INTEL_IVYBRIDGE_X)
x86_pmu.extra_regs = intel_snbep_extra_regs;
else
x86_pmu.extra_regs = intel_snb_extra_regs;
@@ -6563,10 +6563,10 @@ __init int intel_pmu_init(void)
break;
- case INTEL_FAM6_HASWELL:
- case INTEL_FAM6_HASWELL_X:
- case INTEL_FAM6_HASWELL_L:
- case INTEL_FAM6_HASWELL_G:
+ case INTEL_HASWELL:
+ case INTEL_HASWELL_X:
+ case INTEL_HASWELL_L:
+ case INTEL_HASWELL_G:
x86_add_quirk(intel_ht_bug);
x86_add_quirk(intel_pebs_isolation_quirk);
x86_pmu.late_ack = true;
@@ -6596,10 +6596,10 @@ __init int intel_pmu_init(void)
name = "haswell";
break;
- case INTEL_FAM6_BROADWELL:
- case INTEL_FAM6_BROADWELL_D:
- case INTEL_FAM6_BROADWELL_G:
- case INTEL_FAM6_BROADWELL_X:
+ case INTEL_BROADWELL:
+ case INTEL_BROADWELL_D:
+ case INTEL_BROADWELL_G:
+ case INTEL_BROADWELL_X:
x86_add_quirk(intel_pebs_isolation_quirk);
x86_pmu.late_ack = true;
memcpy(hw_cache_event_ids, hsw_hw_cache_event_ids, sizeof(hw_cache_event_ids));
@@ -6638,8 +6638,8 @@ __init int intel_pmu_init(void)
name = "broadwell";
break;
- case INTEL_FAM6_XEON_PHI_KNL:
- case INTEL_FAM6_XEON_PHI_KNM:
+ case INTEL_XEON_PHI_KNL:
+ case INTEL_XEON_PHI_KNM:
memcpy(hw_cache_event_ids,
slm_hw_cache_event_ids, sizeof(hw_cache_event_ids));
memcpy(hw_cache_extra_regs,
@@ -6658,15 +6658,15 @@ __init int intel_pmu_init(void)
name = "knights-landing";
break;
- case INTEL_FAM6_SKYLAKE_X:
+ case INTEL_SKYLAKE_X:
pmem = true;
fallthrough;
- case INTEL_FAM6_SKYLAKE_L:
- case INTEL_FAM6_SKYLAKE:
- case INTEL_FAM6_KABYLAKE_L:
- case INTEL_FAM6_KABYLAKE:
- case INTEL_FAM6_COMETLAKE_L:
- case INTEL_FAM6_COMETLAKE:
+ case INTEL_SKYLAKE_L:
+ case INTEL_SKYLAKE:
+ case INTEL_KABYLAKE_L:
+ case INTEL_KABYLAKE:
+ case INTEL_COMETLAKE_L:
+ case INTEL_COMETLAKE:
x86_add_quirk(intel_pebs_isolation_quirk);
x86_pmu.late_ack = true;
memcpy(hw_cache_event_ids, skl_hw_cache_event_ids, sizeof(hw_cache_event_ids));
@@ -6715,16 +6715,16 @@ __init int intel_pmu_init(void)
name = "skylake";
break;
- case INTEL_FAM6_ICELAKE_X:
- case INTEL_FAM6_ICELAKE_D:
+ case INTEL_ICELAKE_X:
+ case INTEL_ICELAKE_D:
x86_pmu.pebs_ept = 1;
pmem = true;
fallthrough;
- case INTEL_FAM6_ICELAKE_L:
- case INTEL_FAM6_ICELAKE:
- case INTEL_FAM6_TIGERLAKE_L:
- case INTEL_FAM6_TIGERLAKE:
- case INTEL_FAM6_ROCKETLAKE:
+ case INTEL_ICELAKE_L:
+ case INTEL_ICELAKE:
+ case INTEL_TIGERLAKE_L:
+ case INTEL_TIGERLAKE:
+ case INTEL_ROCKETLAKE:
x86_pmu.late_ack = true;
memcpy(hw_cache_event_ids, skl_hw_cache_event_ids, sizeof(hw_cache_event_ids));
memcpy(hw_cache_extra_regs, skl_hw_cache_extra_regs, sizeof(hw_cache_extra_regs));
@@ -6759,13 +6759,13 @@ __init int intel_pmu_init(void)
name = "icelake";
break;
- case INTEL_FAM6_SAPPHIRERAPIDS_X:
- case INTEL_FAM6_EMERALDRAPIDS_X:
+ case INTEL_SAPPHIRERAPIDS_X:
+ case INTEL_EMERALDRAPIDS_X:
x86_pmu.flags |= PMU_FL_MEM_LOADS_AUX;
x86_pmu.extra_regs = intel_glc_extra_regs;
fallthrough;
- case INTEL_FAM6_GRANITERAPIDS_X:
- case INTEL_FAM6_GRANITERAPIDS_D:
+ case INTEL_GRANITERAPIDS_X:
+ case INTEL_GRANITERAPIDS_D:
intel_pmu_init_glc(NULL);
if (!x86_pmu.extra_regs)
x86_pmu.extra_regs = intel_rwc_extra_regs;
@@ -6783,11 +6783,11 @@ __init int intel_pmu_init(void)
name = "sapphire_rapids";
break;
- case INTEL_FAM6_ALDERLAKE:
- case INTEL_FAM6_ALDERLAKE_L:
- case INTEL_FAM6_RAPTORLAKE:
- case INTEL_FAM6_RAPTORLAKE_P:
- case INTEL_FAM6_RAPTORLAKE_S:
+ case INTEL_ALDERLAKE:
+ case INTEL_ALDERLAKE_L:
+ case INTEL_RAPTORLAKE:
+ case INTEL_RAPTORLAKE_P:
+ case INTEL_RAPTORLAKE_S:
/*
* Alder Lake has 2 types of CPU, core and atom.
*
@@ -6845,8 +6845,8 @@ __init int intel_pmu_init(void)
name = "alderlake_hybrid";
break;
- case INTEL_FAM6_METEORLAKE:
- case INTEL_FAM6_METEORLAKE_L:
+ case INTEL_METEORLAKE:
+ case INTEL_METEORLAKE_L:
intel_pmu_init_hybrid(hybrid_big_small);
x86_pmu.pebs_latency_data = mtl_latency_data_small;
--
2.44.0
next prev parent reply other threads:[~2024-04-24 18:15 UTC|newest]
Thread overview: 109+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-04-24 18:12 [PATCH v4 00/71] New Intel CPUID families Tony Luck
2024-04-24 18:14 ` [PATCH v4 01/71] tpm: Switch to new Intel CPU model defines Tony Luck
2024-04-25 4:48 ` Jarkko Sakkinen
2024-04-25 4:50 ` Jarkko Sakkinen
2024-04-24 18:14 ` [PATCH v4 02/71] platform/x86/intel/ifs: " Tony Luck
2024-04-29 3:19 ` Kuppuswamy Sathyanarayanan
2024-04-24 18:14 ` [PATCH v4 03/71] KVM: x86/pmu: " Tony Luck
2024-04-24 18:14 ` [PATCH v4 04/71] KVM: VMX: " Tony Luck
2024-04-24 18:14 ` [PATCH v4 05/71] ACPI: LPSS: " Tony Luck
2024-04-24 18:14 ` [PATCH v4 06/71] ACPI: x86: " Tony Luck
2024-04-24 18:14 ` [PATCH v4 07/71] cpufreq: intel_pstate: " Tony Luck
2024-04-24 18:14 ` [PATCH v4 09/71] intel_idle: " Tony Luck
2024-04-24 18:14 ` [PATCH v4 08/71] cpufreq: " Tony Luck
2024-04-24 18:14 ` [PATCH v4 10/71] PCI: PM: " Tony Luck
2024-04-24 18:14 ` [PATCH v4 12/71] powercap: intel_rapl: " Tony Luck
2024-04-24 18:14 ` [PATCH v4 11/71] " Tony Luck
2024-04-24 18:14 ` [PATCH v4 13/71] ASoC: Intel: " Tony Luck
2024-04-24 18:14 ` [PATCH v4 14/71] thermal: intel: intel_tcc_cooling: " Tony Luck
2024-04-24 18:14 ` [PATCH v4 15/71] tools/power/turbostat: " Tony Luck
2024-04-24 18:14 ` [PATCH v4 17/71] crypto: x86/twofish - " Tony Luck
2024-04-24 18:14 ` [PATCH v4 16/71] crypto: x86/poly1305 " Tony Luck
2024-05-31 9:37 ` Herbert Xu
2024-04-24 18:14 ` [PATCH v4 18/71] perf/x86/intel/cstate: " Tony Luck
2024-04-24 18:15 ` [PATCH v4 19/71] perf/x86/lbr: " Tony Luck
2024-04-24 18:15 ` [PATCH v4 20/71] perf/x86/intel/pt: " Tony Luck
2024-04-25 15:58 ` Dave Hansen
2024-04-24 18:15 ` [PATCH v4 21/71] perf/x86/intel/uncore: " Tony Luck
2024-04-24 18:15 ` [PATCH v4 22/71] " Tony Luck
2024-04-24 18:15 ` [PATCH v4 24/71] perf/x86/msr: " Tony Luck
2024-04-25 15:49 ` Dave Hansen
2024-04-25 16:43 ` Luck, Tony
2024-04-25 16:47 ` Dave Hansen
2024-04-25 16:54 ` Luck, Tony
2024-04-24 18:15 ` [PATCH v4 23/71] perf/x86/intel/uncore: " Tony Luck
2024-04-24 18:15 ` [PATCH v4 25/71] x86/apic: " Tony Luck
2024-04-24 18:15 ` [PATCH v4 26/71] x86/aperfmperf: " Tony Luck
2024-04-24 18:15 ` [PATCH v4 27/71] x86/bugs: " Tony Luck
2024-04-24 20:55 ` Josh Poimboeuf
2024-04-25 10:52 ` [tip: x86/cpu] " tip-bot2 for Tony Luck
2024-04-24 18:15 ` [PATCH v4 28/71] " Tony Luck
2024-04-24 21:09 ` Josh Poimboeuf
2024-04-25 10:52 ` [tip: x86/cpu] " tip-bot2 for Tony Luck
2024-04-24 18:15 ` [PATCH v4 29/71] x86/cpu/intel: " Tony Luck
2024-04-25 10:46 ` Borislav Petkov
2024-04-25 16:29 ` Luck, Tony
2024-04-28 18:27 ` Borislav Petkov
2024-04-24 18:15 ` [PATCH v4 30/71] x86/cpu/intel_epb: " Tony Luck
2024-04-24 18:15 ` [PATCH v4 32/71] x86/mce: " Tony Luck
2024-04-24 18:15 ` [PATCH v4 31/71] x86/cpu: " Tony Luck
2024-04-24 18:15 ` [PATCH v4 33/71] x86/mce: " Tony Luck
2024-04-24 18:15 ` [PATCH v4 34/71] " Tony Luck
2024-04-24 18:15 ` [PATCH v4 35/71] x86/microcode/intel: " Tony Luck
2024-04-24 18:15 ` [PATCH v4 36/71] x86/resctrl: " Tony Luck
2024-04-24 18:15 ` [PATCH v4 37/71] " Tony Luck
2024-04-24 18:15 ` [PATCH v4 38/71] x86/cpu/: " Tony Luck
2024-04-24 18:15 ` [PATCH v4 39/71] x86/tsc: " Tony Luck
2024-04-24 18:15 ` [PATCH v4 41/71] x86/mm: " Tony Luck
2024-04-24 18:15 ` [PATCH v4 40/71] x86/tsc_msr: " Tony Luck
2024-04-24 18:15 ` [PATCH v4 42/71] x86/PCI: " Tony Luck
2024-04-24 18:15 ` [PATCH v4 43/71] x86/virt/tdx: " Tony Luck
2024-04-24 18:15 ` Tony Luck [this message]
2024-04-24 18:15 ` [PATCH v4 45/71] x86/platform/intel-mid: " Tony Luck
2024-04-24 19:28 ` Andy Shevchenko
2024-04-24 18:15 ` [PATCH v4 46/71] x86/platform/atom: " Tony Luck
2024-04-24 18:15 ` [PATCH v4 47/71] x86/cpu: " Tony Luck
2024-04-24 18:15 ` [PATCH v4 48/71] x86/boot: " Tony Luck
2024-04-24 18:15 ` [PATCH v4 49/71] EDAC/i10nm: " Tony Luck
2024-04-24 18:15 ` [PATCH v4 50/71] EDAC, pnd2: " Tony Luck
2024-04-24 18:15 ` [PATCH v4 51/71] EDAC/sb_edac: " Tony Luck
2024-04-24 18:15 ` [PATCH v4 52/71] EDAC/skx: " Tony Luck
2024-04-24 18:15 ` [PATCH v4 53/71] extcon: axp288: " Tony Luck
2024-05-08 15:21 ` Chanwoo Choi
2024-04-24 18:15 ` [PATCH v4 54/71] peci: cpu: " Tony Luck
2024-04-24 18:15 ` Tony Luck
2024-04-24 18:15 ` [PATCH v4 55/71] hwmon: (peci/cputemp) " Tony Luck
2024-04-24 20:00 ` Guenter Roeck
2024-04-24 20:25 ` Luck, Tony
2024-04-25 19:58 ` Tony Luck
2024-04-26 1:07 ` Winiarska, Iwona
2024-04-26 15:56 ` Luck, Tony
2024-04-24 18:15 ` [PATCH v4 56/71] platform/x86: intel_ips: " Tony Luck
2024-04-24 18:15 ` [PATCH v4 57/71] platform/x86/intel/pmc: " Tony Luck
2024-04-24 18:15 ` [PATCH v4 58/71] platform/x86/intel: pmc: " Tony Luck
2024-04-24 18:15 ` [PATCH v4 59/71] platform/x86: intel_scu_wdt: " Tony Luck
2024-04-29 3:19 ` Kuppuswamy Sathyanarayanan
2024-04-24 18:15 ` [PATCH v4 60/71] platform/x86: ISST: " Tony Luck
2024-04-25 12:32 ` srinivas pandruvada
2024-04-25 16:34 ` Luck, Tony
2024-04-24 18:15 ` [PATCH v4 61/71] platform/x86: intel_speed_select_if: " Tony Luck
2024-04-25 12:33 ` srinivas pandruvada
2024-04-24 18:15 ` [PATCH v4 62/71] platform/x86: intel_telemetry: " Tony Luck
2024-04-24 18:15 ` [PATCH v4 63/71] platform/x86: intel: telemetry: " Tony Luck
2024-04-24 18:15 ` [PATCH v4 64/71] platform/x86: intel_turbo_max_3: " Tony Luck
2024-04-24 18:15 ` [PATCH v4 65/71] platform/x86: intel-uncore-freq: " Tony Luck
2024-04-25 12:34 ` srinivas pandruvada
2024-04-24 18:15 ` [PATCH v4 66/71] platform/x86: p2sb: " Tony Luck
2024-04-24 18:15 ` [PATCH v4 67/71] media: atomisp: " Tony Luck
2024-04-24 19:31 ` Andy Shevchenko
2024-04-24 18:15 ` [PATCH v4 68/71] ASoC: Intel: avs: es8336: " Tony Luck
2024-04-24 23:58 ` Mark Brown
2024-04-25 0:12 ` Luck, Tony
2024-04-25 0:58 ` Mark Brown
2024-04-25 7:39 ` Amadeusz Sławiński
2024-04-24 18:15 ` [PATCH v4 69/71] perf/x86/rapl: " Tony Luck
2024-04-24 18:15 ` [PATCH v4 70/71] x86/cpu/vfm: Delete X86_MATCH_INTEL_FAM6_MODEL[_STEPPING]() macros Tony Luck
2024-04-24 18:15 ` [PATCH v4 71/71] x86/cpu/vfm: Delete all the *_FAM6_ CPU #defines Tony Luck
2024-04-24 18:39 ` [PATCH v4 00/71] New Intel CPUID families Dave Hansen
2024-04-24 18:57 ` Luck, Tony
2024-04-29 8:08 ` Hans de Goede
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