From: Sam Protsenko <semen.protsenko@linaro.org>
To: Sean Anderson <seanga2@gmail.com>
Cc: Lukasz Majewski <lukma@denx.de>, Tom Rini <trini@konsulko.com>,
Nathan Barrett-Morrison <nathan.morrison@timesys.com>,
Michal Simek <michal.simek@amd.com>,
Ashok Reddy Soma <ashok.reddy.soma@amd.com>,
Eugen Hristev <eugen.hristev@collabora.com>,
Yang Xiwen <forbidden405@outlook.com>,
Julien Masson <jmasson@baylibre.com>,
u-boot@lists.denx.de
Subject: Re: [PATCH] clk: Propagate clk_set_rate() if CLK_SET_PARENT_RATE present
Date: Tue, 14 May 2024 15:26:29 -0500 [thread overview]
Message-ID: <CAPLW+4kBMcO8xOyHYeOqi+npCT651990Efyuanzq8jDgnaqX5Q@mail.gmail.com> (raw)
In-Reply-To: <CAPLW+4=f1AcZRde8e+rWWpCm9BtFAACqdWCfMryRBcSFn4OinA@mail.gmail.com>
On Wed, May 1, 2024 at 4:12 PM Sam Protsenko <semen.protsenko@linaro.org> wrote:
>
> On Wed, Apr 10, 2024 at 9:53 PM Sean Anderson <seanga2@gmail.com> wrote:
> >
> > On 3/7/24 19:04, Sam Protsenko wrote:
> > > Sometimes clocks provided to a consumer might not have .set_rate
> > > operation (like gate or mux clocks), but have CLK_SET_PARENT_RATE flag
> > > set. In that case it's usually possible to find a parent up the tree
> > > which is capable of setting the rate (div, pll, etc). Implement a simple
> > > lookup procedure for such cases, to traverse the clock tree until
> > > .set_rate capable parent is found, and use that parent to actually
> > > change the rate. The search will stop once the first .set_rate capable
> > > clock is found, which is usually enough to handle most cases.
> > >
> > > Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
> > > ---
>
> [snip]
>
> >
> > Can you give an example of where this is needed?
> >
>
> Sure. In my case it's needed for eMMC enablement on E850-96 board.
> eMMC node in the device tree [1] is a gate clock
> (CLK_GOUT_MMC_EMBD_SDCLKIN), so the MMC driver won't be able to change
> its rate. But that clock actually has CLK_SET_RATE_PARENT flag set in
> the clock driver [2]. So the right thing to do in this case (and
> that's basically how it's done in Linux kernel too) is to traverse the
> clock tree upwards, and try to find the parent capable to do .set_rate
> (which is usually a divider clock), and use it to change the clock
> rate. I'm working on exynos_dw_mmc driver [3] right now, making it use
> CCF clocks, but I can't do that before this patch is applied.
>
> Grepping the U-Boot tree I can see the CLK_SET_RATE_PARENT flag is
> also used in various IMX clock drivers and STM32MP13 clock driver. I
> guess without this change those flags will be basically ignored.
>
> Thanks!
>
Hi Sean,
Just wanted to check if you think my explanation above is ok and the
patch can be applied? I'm finishing my new patch series for enabling
MMC on E850-96, but this patch has to be applied first.
Thanks!
> [1] https://source.denx.de/u-boot/u-boot/-/blob/master/arch/arm/dts/exynos850.dtsi#L408
> [2] https://source.denx.de/u-boot/u-boot/-/blob/master/drivers/clk/exynos/clk-exynos850.c#L353
> [3] https://source.denx.de/u-boot/u-boot/-/blob/master/drivers/mmc/exynos_dw_mmc.c#L117
>
> > --Sean
prev parent reply other threads:[~2024-05-14 20:26 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-03-08 0:04 [PATCH] clk: Propagate clk_set_rate() if CLK_SET_PARENT_RATE present Sam Protsenko
2024-03-19 18:42 ` Sam Protsenko
2024-03-20 14:02 ` Yang Xiwen
2024-03-20 14:41 ` Sean Anderson
2024-04-11 2:53 ` Sean Anderson
2024-05-01 21:12 ` Sam Protsenko
2024-05-14 20:26 ` Sam Protsenko [this message]
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