From: Eugen Hristev <eugen.hristev@collabora.com>
To: kever.yang@rock-chips.com, jonas@kwiboo.se,
eugen.hristev@collabora.com, u-boot@lists.denx.de
Cc: u-boot-amlogic@groups.io, xdrudis@tinet.cat, jagan@edgeble.ai,
neil.armstrong@linaro.org, anarsoul@gmail.com,
William Wu <william.wu@rock-chips.com>
Subject: [PATCH v5 1/6] ARM: dts: rockchip: rk3588-rock-5b-u-boot: add USB 2.0 host
Date: Wed, 19 Apr 2023 16:40:09 +0300 [thread overview]
Message-ID: <20230419134014.128461-1-eugen.hristev@collabora.com> (raw)
Add USB 2.0 host nodes and PHYs.
Co-developed-by: William Wu <william.wu@rock-chips.com>
Signed-off-by: William Wu <william.wu@rock-chips.com>
Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
---
Changes in v5:
- none
Changes in v4:
- removed u-boot,dm-spl on regulator which was useless
- moved usb nodes to rk3588s-u-boot-dtsi
Changes in v2,v3:
- none
arch/arm/dts/rk3588-rock-5b-u-boot.dtsi | 82 +++++++++++++++++++++++
arch/arm/dts/rk3588s-u-boot.dtsi | 86 +++++++++++++++++++++++++
2 files changed, 168 insertions(+)
diff --git a/arch/arm/dts/rk3588-rock-5b-u-boot.dtsi b/arch/arm/dts/rk3588-rock-5b-u-boot.dtsi
index bee4c32e8965..93942b105c3d 100644
--- a/arch/arm/dts/rk3588-rock-5b-u-boot.dtsi
+++ b/arch/arm/dts/rk3588-rock-5b-u-boot.dtsi
@@ -4,6 +4,9 @@
*/
#include "rk3588-u-boot.dtsi"
+#include <dt-bindings/pinctrl/rockchip.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/gpio/gpio.h>
/ {
aliases {
@@ -13,6 +16,18 @@
chosen {
u-boot,spl-boot-order = &sdmmc;
};
+
+ vcc5v0_host: vcc5v0-host-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc5v0_host";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ enable-active-high;
+ gpio = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&vcc5v0_host_en>;
+ vin-supply = <&vcc5v0_sys>;
+ };
};
&sdmmc {
@@ -20,3 +35,70 @@
bootph-pre-ram;
status = "okay";
};
+
+&pinctrl {
+ usb {
+ vcc5v0_host_en: vcc5v0-host-en {
+ rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+};
+
+&usb_host0_ehci {
+ companion = <&usb_host0_ohci>;
+ phys = <&u2phy2_host>;
+ phy-names = "usb2-phy";
+ status = "okay";
+};
+
+&usb_host0_ohci {
+ phys = <&u2phy2_host>;
+ phy-names = "usb2-phy";
+ status = "okay";
+};
+
+&usb2phy2_grf {
+ status = "okay";
+};
+
+&u2phy2 {
+ resets = <&cru SRST_OTGPHY_U2_0>, <&cru SRST_P_USB2PHY_U2_0_GRF0>;
+ reset-names = "phy", "apb";
+ clock-output-names = "usb480m_phy2";
+ status = "okay";
+};
+
+&u2phy2_host {
+ phy-supply = <&vcc5v0_host>;
+ status = "okay";
+};
+
+&usb_host1_ehci {
+ companion = <&usb_host1_ohci>;
+ phys = <&u2phy3_host>;
+ phy-names = "usb2-phy";
+ status = "okay";
+};
+
+&usb_host1_ohci {
+ phys = <&u2phy3_host>;
+ phy-names = "usb2-phy";
+ status = "okay";
+};
+
+&usb2phy3_grf {
+ status = "okay";
+};
+
+&u2phy3 {
+ resets = <&cru SRST_OTGPHY_U2_1>, <&cru SRST_P_USB2PHY_U2_1_GRF0>;
+ reset-names = "phy", "apb";
+ clock-output-names = "usb480m_phy3";
+ status = "okay";
+};
+
+&u2phy3_host {
+ phy-supply = <&vcc5v0_host>;
+ status = "okay";
+};
+
diff --git a/arch/arm/dts/rk3588s-u-boot.dtsi b/arch/arm/dts/rk3588s-u-boot.dtsi
index 1e225d71efc2..fb1b802fd273 100644
--- a/arch/arm/dts/rk3588s-u-boot.dtsi
+++ b/arch/arm/dts/rk3588s-u-boot.dtsi
@@ -12,12 +12,98 @@
status = "okay";
};
+ usb_host0_ehci: usb@fc800000 {
+ compatible = "generic-ehci";
+ reg = <0x0 0xfc800000 0x0 0x40000>;
+ interrupts = <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH 0>;
+ clocks = <&cru HCLK_HOST0>, <&cru HCLK_HOST_ARB0>;
+ clock-names = "usbhost", "arbiter";
+ power-domains = <&power RK3588_PD_USB>;
+ status = "disabled";
+ };
+
+ usb_host0_ohci: usb@fc840000 {
+ compatible = "generic-ohci";
+ reg = <0x0 0xfc840000 0x0 0x40000>;
+ interrupts = <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH 0>;
+ clocks = <&cru HCLK_HOST0>, <&cru HCLK_HOST_ARB0>;
+ clock-names = "usbhost", "arbiter";
+ power-domains = <&power RK3588_PD_USB>;
+ status = "disabled";
+ };
+
+ usb_host1_ehci: usb@fc880000 {
+ compatible = "generic-ehci";
+ reg = <0x0 0xfc880000 0x0 0x40000>;
+ interrupts = <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH 0>;
+ clocks = <&cru HCLK_HOST1>, <&cru HCLK_HOST_ARB1>;
+ clock-names = "usbhost", "arbiter";
+ power-domains = <&power RK3588_PD_USB>;
+ status = "disabled";
+ };
+
+ usb_host1_ohci: usb@fc8c0000 {
+ compatible = "generic-ohci";
+ reg = <0x0 0xfc8c0000 0x0 0x40000>;
+ interrupts = <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH 0>;
+ clocks = <&cru HCLK_HOST1>, <&cru HCLK_HOST_ARB1>;
+ clock-names = "usbhost", "arbiter";
+ power-domains = <&power RK3588_PD_USB>;
+ status = "disabled";
+ };
+
pmu1_grf: syscon@fd58a000 {
bootph-all;
compatible = "rockchip,rk3588-pmu1-grf", "syscon";
reg = <0x0 0xfd58a000 0x0 0x2000>;
};
+ usb2phy2_grf: syscon@fd5d8000 {
+ compatible = "rockchip,rk3588-usb2phy-grf", "syscon",
+ "simple-mfd";
+ reg = <0x0 0xfd5d8000 0x0 0x4000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ u2phy2: usb2-phy@8000 {
+ compatible = "rockchip,rk3588-usb2phy";
+ reg = <0x8000 0x10>;
+ interrupts = <GIC_SPI 391 IRQ_TYPE_LEVEL_HIGH 0>;
+ clocks = <&cru CLK_USB2PHY_HDPTXRXPHY_REF>;
+ clock-names = "phyclk";
+ #clock-cells = <0>;
+ status = "disabled";
+
+ u2phy2_host: host-port {
+ #phy-cells = <0>;
+ status = "disabled";
+ };
+ };
+ };
+
+ usb2phy3_grf: syscon@fd5dc000 {
+ compatible = "rockchip,rk3588-usb2phy-grf", "syscon",
+ "simple-mfd";
+ reg = <0x0 0xfd5dc000 0x0 0x4000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ u2phy3: usb2-phy@c000 {
+ compatible = "rockchip,rk3588-usb2phy";
+ reg = <0xc000 0x10>;
+ interrupts = <GIC_SPI 392 IRQ_TYPE_LEVEL_HIGH 0>;
+ clocks = <&cru CLK_USB2PHY_HDPTXRXPHY_REF>;
+ clock-names = "phyclk";
+ #clock-cells = <0>;
+ status = "disabled";
+
+ u2phy3_host: host-port {
+ #phy-cells = <0>;
+ status = "disabled";
+ };
+ };
+ };
+
sdmmc: mmc@fe2c0000 {
compatible = "rockchip,rk3588-dw-mshc", "rockchip,rk3288-dw-mshc";
reg = <0x0 0xfe2c0000 0x0 0x4000>;
--
2.34.1
next reply other threads:[~2023-04-19 13:40 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-04-19 13:40 Eugen Hristev [this message]
2023-04-19 13:40 ` [PATCH v5 2/6] configs: rockchip: rock5b-rk3588: enable USB and regulators Eugen Hristev
2023-04-19 13:40 ` [PATCH v5 3/6] phy: add support for phy-supply Eugen Hristev
2023-04-19 13:40 ` [PATCH v5 4/6] phy: remove phy-supply related code Eugen Hristev
2023-05-09 7:53 ` Neil Armstrong
2023-04-19 13:40 ` [PATCH v5 5/6] phy: rockchip-inno-usb2: add initial support for rk3588 PHY Eugen Hristev
2023-04-19 13:40 ` [PATCH v5 6/6] phy: Keep balance of counts when ops is missing Eugen Hristev
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20230419134014.128461-1-eugen.hristev@collabora.com \
--to=eugen.hristev@collabora.com \
--cc=anarsoul@gmail.com \
--cc=jagan@edgeble.ai \
--cc=jonas@kwiboo.se \
--cc=kever.yang@rock-chips.com \
--cc=neil.armstrong@linaro.org \
--cc=u-boot-amlogic@groups.io \
--cc=u-boot@lists.denx.de \
--cc=william.wu@rock-chips.com \
--cc=xdrudis@tinet.cat \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for read-only IMAP folder(s) and NNTP newsgroup(s).