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From: Zhao Liu <zhao1.liu@linux.intel.com>
To: JeeHeng Sia <jeeheng.sia@starfivetech.com>
Cc: "Daniel P . Berrang�" <berrange@redhat.com>,
	"Eduardo Habkost" <eduardo@habkost.net>,
	"Marcel Apfelbaum" <marcel.apfelbaum@gmail.com>,
	"Philippe Mathieu-Daud�" <philmd@linaro.org>,
	"Yanan Wang" <wangyanan55@huawei.com>,
	"Michael S . Tsirkin" <mst@redhat.com>,
	"Paolo Bonzini" <pbonzini@redhat.com>,
	"Richard Henderson" <richard.henderson@linaro.org>,
	"Eric Blake" <eblake@redhat.com>,
	"Markus Armbruster" <armbru@redhat.com>,
	"Marcelo Tosatti" <mtosatti@redhat.com>,
	"Alex Benn�e" <alex.bennee@linaro.org>,
	"Peter Maydell" <peter.maydell@linaro.org>,
	"Jonathan Cameron" <Jonathan.Cameron@huawei.com>,
	"qemu-devel@nongnu.org" <qemu-devel@nongnu.org>,
	"kvm@vger.kernel.org" <kvm@vger.kernel.org>,
	"qemu-riscv@nongnu.org" <qemu-riscv@nongnu.org>,
	"qemu-arm@nongnu.org" <qemu-arm@nongnu.org>,
	"Zhenyu Wang" <zhenyu.z.wang@intel.com>,
	"Dapeng Mi" <dapeng1.mi@linux.intel.com>,
	"Yongwei Ma" <yongwei.ma@intel.com>,
	"Zhao Liu" <zhao1.liu@intel.com>
Subject: Re: [RFC 6/8] i386/cpu: Update cache topology with machine's configuration
Date: Thu, 29 Feb 2024 15:19:40 +0800	[thread overview]
Message-ID: <ZeAwDIDdJff6SiiB@intel.com> (raw)
In-Reply-To: <BJSPR01MB0561F3D87C67D4BCCA9E9C8D9C58A@BJSPR01MB0561.CHNPR01.prod.partner.outlook.cn>

Hi JeeHeng,

> > diff --git a/target/i386/cpu.c b/target/i386/cpu.c
> > index d7cb0f1e49b4..4b5c551fe7f0 100644
> > --- a/target/i386/cpu.c
> > +++ b/target/i386/cpu.c
> > @@ -7582,6 +7582,27 @@ static void x86_cpu_realizefn(DeviceState *dev, Error **errp)
> > 
> >  #ifndef CONFIG_USER_ONLY
> >      MachineState *ms = MACHINE(qdev_get_machine());
> > +
> > +    if (ms->smp_cache.l1d != CPU_TOPO_LEVEL_INVALID) {
> > +        env->cache_info_cpuid4.l1d_cache->share_level = ms->smp_cache.l1d;
> > +        env->cache_info_amd.l1d_cache->share_level = ms->smp_cache.l1d;
> > +    }
> > +
> > +    if (ms->smp_cache.l1i != CPU_TOPO_LEVEL_INVALID) {
> > +        env->cache_info_cpuid4.l1i_cache->share_level = ms->smp_cache.l1i;
> > +        env->cache_info_amd.l1i_cache->share_level = ms->smp_cache.l1i;
> > +    }
> > +
> > +    if (ms->smp_cache.l2 != CPU_TOPO_LEVEL_INVALID) {
> > +        env->cache_info_cpuid4.l2_cache->share_level = ms->smp_cache.l2;
> > +        env->cache_info_amd.l2_cache->share_level = ms->smp_cache.l2;
> > +    }
> > +
> > +    if (ms->smp_cache.l3 != CPU_TOPO_LEVEL_INVALID) {
> > +        env->cache_info_cpuid4.l3_cache->share_level = ms->smp_cache.l3;
> > +        env->cache_info_amd.l3_cache->share_level = ms->smp_cache.l3;
> > +    }
> > +
>
> I think this block of code can be further optimized. Maybe we can create
> a function called updateCacheShareLevel() that takes a cache pointer and
> a share level as arguments. This function encapsulates the common
> pattern of updating cache share levels for different caches. You can define
> it like this:
> void updateCacheShareLevel(XxxCacheInfo *cache, int shareLevel) {
>     if (shareLevel != CPU_TOPO_LEVEL_INVALID) {
>         cache->share_level = shareLevel;
>     }
> }
>

Good idea! Will try this way.

Thanks,
Zhao



  reply	other threads:[~2024-02-29  7:06 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-02-20  9:24 [RFC 0/8] Introduce SMP Cache Topology Zhao Liu
2024-02-20  9:24 ` [RFC 1/8] hw/core: Rename CpuTopology to CPUTopology Zhao Liu
2024-02-20  9:24 ` [RFC 2/8] hw/core: Move CPU topology enumeration into arch-agnostic file Zhao Liu
2024-02-28  9:53   ` JeeHeng Sia
2024-02-29  4:46     ` Zhao Liu
2024-02-20  9:24 ` [RFC 3/8] hw/core: Define cache topology for machine Zhao Liu
2024-02-20  9:25 ` [RFC 4/8] hw/core: Add cache topology options in -smp Zhao Liu
2024-02-21 12:46   ` Markus Armbruster
2024-02-21 15:17     ` Zhao Liu
2024-02-26 15:39   ` Jonathan Cameron via
2024-02-27  9:20     ` Zhao Liu
2024-02-27  9:12       ` Daniel P. Berrangé
2024-02-27 10:35         ` Zhao Liu
2024-02-27 10:51       ` Jonathan Cameron via
2024-02-27 15:55         ` Zhao Liu
2024-02-28  5:38   ` JeeHeng Sia
2024-02-29  7:04     ` Zhao Liu
2024-02-20  9:25 ` [RFC 5/8] i386/cpu: Support thread and module level cache topology Zhao Liu
2024-02-20  9:25 ` [RFC 6/8] i386/cpu: Update cache topology with machine's configuration Zhao Liu
2024-02-28  9:45   ` JeeHeng Sia
2024-02-29  7:19     ` Zhao Liu [this message]
2024-02-20  9:25 ` [RFC 7/8] i386/pc: Support cache topology in -smp for PC machine Zhao Liu
2024-02-20  9:25 ` [RFC 8/8] qemu-options: Add the cache topology description of -smp Zhao Liu
2024-02-26 15:47   ` Jonathan Cameron via
2024-02-27 16:17     ` Zhao Liu
2024-02-20 20:07 ` [RFC 0/8] Introduce SMP Cache Topology Philippe Mathieu-Daudé

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