From: Alistair Francis <alistair23@gmail.com>
To: Conor Dooley <conor@kernel.org>
Cc: qemu-riscv@nongnu.org, Conor Dooley <conor.dooley@microchip.com>,
Alistair Francis <Alistair.Francis@wdc.com>,
Bin Meng <bin.meng@windriver.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Weiwei Li <liwei1518@gmail.com>,
Daniel Henrique Barboza <dbarboza@ventanamicro.com>,
Andrew Jones <ajones@ventanamicro.com>,
Liu Zhiwei <zhiwei_liu@linux.alibaba.com>,
qemu-devel@nongnu.org
Subject: Re: [PATCH v4 0/2] riscv: support new isa extension detection devicetree properties
Date: Mon, 5 Feb 2024 14:00:30 +1000 [thread overview]
Message-ID: <CAKmqyKO6q1+Tr2wahFMCHjZ4bX1fmsLSw1WdzpLqcwjVu1o=ZQ@mail.gmail.com> (raw)
In-Reply-To: <20240124-squatting-getup-a16a8499ad73@spud>
On Wed, Jan 24, 2024 at 10:57 PM Conor Dooley <conor@kernel.org> wrote:
>
> From: Conor Dooley <conor.dooley@microchip.com>
>
> Making it a series to keep the standalone change to riscv_isa_string()
> that Drew reported separate.
>
> Changes in v4:
> - Other than a rebase, add a helper for the mxl_max to xlen conversion
>
> Changes in v3:
> - g_free() isa_extensions too
> - use misa_mxl_max rather than the compile target for the base isa
> - add a new patch changing riscv_isa_string() to do the same
> - drop a null check that cannot be null
> - rebased on top of Alistair's next branch
>
> Changes in v2:
> - use g_strdup() for multiletter extension string copying
> - wrap stuff in #ifndef to prevent breaking the user mode build
> - rename riscv_isa_set_props() -> riscv_isa_write_fdt()
>
> CC: Alistair Francis <Alistair.Francis@wdc.com>
> CC: Bin Meng <bin.meng@windriver.com>
> CC: Palmer Dabbelt <palmer@dabbelt.com>
> CC: Weiwei Li <liwei1518@gmail.com>
> CC: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
> CC: Andrew Jones <ajones@ventanamicro.com>
> CC: Liu Zhiwei <zhiwei_liu@linux.alibaba.com>
> CC: qemu-riscv@nongnu.org
> CC: qemu-devel@nongnu.org
>
> Conor Dooley (2):
> target/riscv: use misa_mxl_max to populate isa string rather than
> TARGET_LONG_BITS
> target/riscv: support new isa extension detection devicetree
> properties
Thanks!
Applied to riscv-to-apply.next with some manual rebasing
Alistair
>
> hw/riscv/sifive_u.c | 7 ++---
> hw/riscv/spike.c | 6 ++--
> hw/riscv/virt.c | 6 ++--
> target/riscv/cpu.c | 62 +++++++++++++++++++++++++++++++++++++++++-
> target/riscv/cpu.h | 2 ++
> target/riscv/gdbstub.c | 2 +-
> 6 files changed, 70 insertions(+), 15 deletions(-)
>
> --
> 2.43.0
>
>
prev parent reply other threads:[~2024-02-05 4:01 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-01-24 12:55 [PATCH v4 0/2] riscv: support new isa extension detection devicetree properties Conor Dooley
2024-01-24 12:55 ` [PATCH v4 1/2] target/riscv: use misa_mxl_max to populate isa string rather than TARGET_LONG_BITS Conor Dooley
2024-01-24 13:13 ` Andrew Jones
2024-01-24 20:04 ` Daniel Henrique Barboza
2024-02-05 3:44 ` Alistair Francis
2024-01-24 12:55 ` [PATCH v4 2/2] target/riscv: support new isa extension detection devicetree properties Conor Dooley
2024-01-24 20:04 ` Daniel Henrique Barboza
2024-02-05 4:00 ` Alistair Francis [this message]
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