messages from 2024-03-22 04:48:23 to 2024-04-15 06:53:07 UTC [more...]
[PATCH 1/1] target/riscv/kvm.c: Fix the hart bit setting of AIA
2024-04-15 6:52 UTC
[RFC PATCH 0/4] target/riscv/kvm: QEMU support for KVM Guest Debug on RISC-V
2024-04-15 1:47 UTC (4+ messages)
[PATCH] target/riscv/kvm/kvm-cpu.c: kvm_riscv_handle_sbi() fail with vendor-specific SBI
2024-04-13 11:25 UTC (7+ messages)
` [PATCH v2] "
` [PATCH v3] "
` [PATCH v4] "
[PATCH 1/2] target/riscv: prioritize pmp errors in raise_mmu_exception()
2024-04-13 10:59 UTC (2+ messages)
` [PATCH 2/2] target/riscv: do not set mtval2 for non guest-page faults
[PATCH 0/2] Improvements for switches in hw/cpu/Kconfig
2024-04-13 9:50 UTC (8+ messages)
` [PATCH 1/2] hw: Fix problem with the A*MPCORE switches in the Kconfig files
` [PATCH 2/2] hw: Add a Kconfig switch for the TYPE_CPU_CLUSTER device
[PATCH for-9.0] target/riscv: prioritize pmp errors in raise_mmu_exception()
2024-04-12 17:26 UTC (7+ messages)
[PATCH 00/65]target/riscv: Support XTheadVector extension
2024-04-12 7:37 UTC (66+ messages)
` [PATCH 01/65] riscv: thead: Add th.sxstatus CSR emulation
` [PATCH 02/65] target/riscv: Reuse th_csr.c to add user-mode csrs
` [PATCH 03/65] target/riscv: Add properties for XTheadVector extension
` [PATCH 04/65] target/riscv: Override some csr ops for XTheadVector
` [PATCH 05/65] target/riscv: Add mlen in DisasContext
` [PATCH 06/65] target/riscv: Implement insns decode rules for XTheadVector
` [PATCH 07/65] target/riscv: implement th.vsetvl{i} "
` [PATCH 08/65] target/riscv: Add strided load instructions "
` [PATCH 09/65] target/riscv: Add strided store "
` [PATCH 10/65] target/riscv: Add unit-stride load "
` [PATCH 11/65] target/riscv: Add unit-stride store "
` [PATCH 12/65] target/riscv: Add indexed load "
` [PATCH 13/65] target/riscv: Add indexed store "
` [PATCH 14/65] target/riscv: Add unit-stride fault-only-first "
` [PATCH 15/65] target/riscv: Add vector amo operations "
` [PATCH 16/65] target/riscv: Add single-width integer add and subtract instructions "
` [PATCH 17/65] target/riscv: Add widening integer add/subtract "
` [PATCH 18/65] target/riscv: Add integer add-with-carry/sub-with-borrow "
` [PATCH 19/65] target/riscv: Add bitwise logical "
` [PATCH 20/65] target/riscv: Add single-width bit shift "
` [PATCH 21/65] target/riscv: Add narrowing integer right "
` [PATCH 22/65] target/riscv: Add integer compare "
` [PATCH 23/65] target/riscv: Add integer min/max "
` [PATCH 24/65] target/riscv: Add single-width integer multiply "
` [PATCH 25/65] target/riscv: Add integer divide "
` [PATCH 26/65] target/riscv: Add widening integer multiply "
` [PATCH 27/65] target/riscv: Add single-width integer multiply-add "
` [PATCH 28/65] target/riscv: Add widening "
` [PATCH 29/65] target/riscv: Add integer merge and move "
` [PATCH 30/65] target/riscv: Add single-width saturating add and sub "
` [PATCH 31/65] target/riscv: Add single-width average "
` [PATCH 32/65] target/riscv: Add single-width fractional mul with rounding and saturation "
` [PATCH 33/65] target/riscv: Add widening saturating scaled multiply-add instructions "
` [PATCH 34/65] target/riscv: Add single-width scaling shift "
` [PATCH 35/65] target/riscv: Add narrowing fixed-point clip "
` [PATCH 36/65] target/riscv: Add single-width floating-point add/sub "
` [PATCH 37/65] target/riscv: Add widening "
` [PATCH 38/65] target/riscv: Add single-width floating-point multiply/divide "
` [PATCH 39/65] target/riscv: Add widening floating-point multiply "
` [PATCH 40/65] target/riscv: Add single-width floating-point fused multiply-add "
` [PATCH 41/65] target/riscv: Add widening floating-point fused mul-add "
` [PATCH 42/65] target/riscv: Add floating-pointing square-root "
` [PATCH 43/65] target/riscv: Add floating-point MIN/MAX "
` [PATCH 44/65] target/riscv: Add floating-point sign-injection "
` [PATCH 45/65] target/riscv: Add floating-point compare "
` [PATCH 46/65] target/riscv: Add floating-point classify and merge "
` [PATCH 47/65] target/riscv: Add single-width floating-point/integer type-convert "
` [PATCH 48/65] target/riscv: Add widening "
` [PATCH 49/65] target/riscv: Add narrowing "
` [PATCH 50/65] target/riscv: Add single-width integer reduction "
` [PATCH 51/65] target/riscv: Add widening "
` [PATCH 52/65] target/riscv: Add single-width floating-point "
` [PATCH 53/65] target/riscv: Add widening "
` [PATCH 54/65] target/riscv: Add mask-register logical "
` [PATCH 55/65] target/riscv: Add vector mask population count vmpopc "
` [PATCH 56/65] target/riscv: Add th.vmfirst.m "
` [PATCH 57/65] target/riscv: Add set-X-first mask bit instructrions "
` [PATCH 58/65] target/riscv: Add vector iota instruction "
` [PATCH 59/65] target/riscv: Add vector element index "
` [PATCH 60/65] target/riscv: Add integer extract and scalar move instructions "
` [PATCH 61/65] target/riscv: Add floating-point "
` [PATCH 62/65] target/riscv: Add vector slide "
` [PATCH 63/65] target/riscv: Add vector register gather "
` [PATCH 64/65] target/riscv: Add vector compress instruction "
` [PATCH 65/65] target/riscv: Enable XTheadVector extension for c906
[PATCH 0/9] misc: Replace sprintf() by snprintf() due to macOS deprecation
2024-04-11 21:46 UTC (25+ messages)
` [PATCH 1/9] disas/m68k: Replace sprintf() by snprintf()
` [PATCH 2/9] disas/microblaze: "
` [PATCH 3/9] disas/riscv: "
` [PATCH 4/9] linux-user/flatload: "
` [PATCH 5/9] hw/misc/imx: "
` [PATCH 6/9] hw/net/rocker: "
` [PATCH 7/9] hw/riscv/virt: "
` [PATCH 8/9] target/arm: "
` [PATCH 9/9] target/i386: "
[PATCH] target/riscv: fix instructions count handling in icount mode
2024-04-11 17:22 UTC (2+ messages)
[PATCH for-9.0] target/riscv/debug: set tval=pc in breakpoint exceptions
2024-04-10 20:24 UTC (3+ messages)
[PATCH] target/riscv/cpu_helper.c: fix wrong exception raise
2024-04-09 12:11 UTC (2+ messages)
[PATCH v3 0/3] target/riscv: Support Zve32x and Zve64x extensions
2024-04-09 9:43 UTC (7+ messages)
` [PATCH v3 1/3] target/riscv: Add support for Zve32x extension
` [PATCH v3 2/3] target/riscv: Add support for Zve64x extension
` [PATCH v3 3/3] target/riscv: Relax vector register check in RISCV gdbstub
[PATCH] hw/intc/riscv_aplic: APLICs should add child earlier than realize
2024-04-09 1:46 UTC (3+ messages)
` "
[PATCH] hw/intc/riscv_aplic: APLICs should add child earlier than realize
2024-04-09 1:44 UTC
[PATCH-for-9.1 v2 0/3] target/ppc: fix tlb flushing race (plus
2024-04-05 17:09 UTC (6+ messages)
` [PATCH v2 1/3] target/ppc: Fix broadcast tlbie synchronisation
` [PATCH v2 2/3] tcg/cputlb: Remove non-synced variants of global TLB flushes
` [PATCH v2 3/3] tcg/cputlb: remove other-cpu capability from TLB flushing
[PATCH 29/32] target/riscv: Use translator_ld* for everything
2024-04-05 12:44 UTC (2+ messages)
` [PATCH 16/32] accel/tcg: Provide default implementation of disas_log
[PATCH v2] riscv: thead: Add th.sxstatus CSR emulation
2024-04-05 1:36 UTC (2+ messages)
[PATCH] Fix incorrect disassembly format for certain RISC-V instructions
2024-04-03 9:14 UTC (4+ messages)
[PATCH v3] target/riscv: raise an exception when CSRRS/CSRRC writes a read-only CSR
2024-04-03 7:08 UTC
[RFC PATCH-for-9.1 00/21] qapi: Make @query-cpu-definitions command target-agnostic
2024-04-02 9:37 UTC (17+ messages)
` [PATCH-for-9.1 06/21] target/i386: Make X86_CPU common to new I386_CPU / X86_64_CPU types
` [PATCH-for-9.1 09/21] qapi: Merge machine-common.json with qapi/machine.json
` [PATCH-for-9.1 10/21] qapi: Make CpuModel* definitions target agnostic
` [RFC PATCH-for-9.1 14/21] system: Introduce QMP generic_query_cpu_definitions()
` [RFC PATCH-for-9.1 21/21] qapi: Make @query-cpu-definitions target-agnostic
[PATCH v3] target/riscv: Fix the element agnostic function problem
2024-04-02 7:01 UTC (2+ messages)
[PATCH v4] target/riscv: Implement dynamic establishment of custom decoder
2024-04-02 6:58 UTC (2+ messages)
[PATCH v1 1/1] hw/riscv/boot.c: Support 64-bit address for initrd
2024-04-01 7:51 UTC
[PATCH v2 0/2] target/riscv: Support mxstatus CSR for thead-c906
2024-03-28 14:24 UTC (8+ messages)
` [PATCH v2 2/2] target/riscv: Support xtheadmaee "
[PATCH v2 0/5] target/riscv: Support Zve32x and Zve64x extensions
2024-03-27 18:02 UTC (9+ messages)
` [PATCH v2 1/5] target/riscv: Add support for Zve32x extension
` [PATCH v2 2/5] target/riscv: Expose Zve32x extension to users
` [PATCH v2 3/5] target/riscv: Add support for Zve64x extension
` [PATCH v2 4/5] target/riscv: Expose Zve64x extension to users
` [PATCH v2 5/5] target/riscv: Relax vector register check in RISCV gdbstub
[PATCH-for-9.1 v2 10/21] hw/smbios: Remove 'uuid_encoded' argument from smbios_set_defaults()
2024-03-27 14:17 UTC (3+ messages)
[PATCH] riscv: thead: Add th.mxstatus CSR emulation
2024-03-27 10:00 UTC
[RFC v2 0/2] Add RISC-V Server Platform Reference Board
2024-03-25 10:06 UTC (9+ messages)
` [RFC v2 2/2] hw/riscv: Add server platform reference machine
[PATCH] target/riscv: Fix mode in riscv_tlb_fill
2024-03-24 15:09 UTC (3+ messages)
` [PATCH v3 1/2] target/riscv/csr.c: Add functional of hvictl CSR
` [PATCH v3 2/2] target/riscv/csr: Added the ability to delegate LCOFI to VS
[PATCH-for-9.1 00/27] accel/tcg: Introduce TCGCPUOps::get_cpu_state() handler
2024-03-24 9:44 UTC (5+ messages)
` [PATCH-for-9.1 08/27] target/hexagon: Convert to TCGCPUOps::get_cpu_state()
` [PATCH-for-9.1 25/27] target/tricore: "
[PATCH v2 0/4] Fix fp16 checking in vector fp widen/narrow instructions
2024-03-22 9:25 UTC (5+ messages)
` [PATCH v2 1/4] target/riscv: rvv: Fix Zvfhmin checking for vfwcvt.f.f.v and vfncvt.f.f.w instructions
` [PATCH v2 2/4] target/riscv: rvv: Check single width operator for vector fp widen instructions
` [PATCH v2 3/4] target/riscv: rvv: Check single width operator for vfncvt.rod.f.f.w
` [PATCH v2 4/4] target/riscv: rvv: Remove redudant SEW checking for vector fp narrow/widen instructions
[PATCH] Fix fp16 checking in vector fp widen/narrow instructions
2024-03-22 8:59 UTC (3+ messages)
[PATCH] hw/intc: Update APLIC IDC after claiming iforce register
2024-03-22 5:09 UTC (2+ messages)
[PATCH v2 1/1] target/riscv/kvm: fix timebase-frequency when using KVM acceleration
2024-03-22 4:47 UTC (2+ messages)
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