From: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
To: qemu-devel@nongnu.org
Cc: qemu-riscv@nongnu.org, alistair.francis@wdc.com,
bmeng@tinylab.org, liwei1518@gmail.com,
zhiwei_liu@linux.alibaba.com, palmer@rivosinc.com,
ajones@ventanamicro.com, tjeznach@rivosinc.com,
Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Subject: [PATCH v2 00/15] riscv: QEMU RISC-V IOMMU Support
Date: Thu, 7 Mar 2024 13:03:03 -0300 [thread overview]
Message-ID: <20240307160319.675044-1-dbarboza@ventanamicro.com> (raw)
Hi,
This is the second version of the work Tomasz sent in July 2023 [1].
I'll be helping Tomasz upstreaming it.
The core emulation code is left unchanged but a few tweaks were made in
v2:
- The most notable difference in this version is that the code was split
in smaller chunks. Patch 03 is still a 1700 lines patch, which is an
improvement from the 3800 lines patch from v1, but we can only go so
far when splitting the core components of the emulation. The reality
is that the IOMMU emulation is a rather complex piece of software and
there's not much we can do to alleviate it;
- I'm not contributing the HPM support that was present in v1. It shaved
off 600 lines of code from the series, which is already large enough
as is. We'll introduce HPM in later versions or as a follow-up;
- The riscv-iommu-header.h header was also trimmed. I shaved it of 300
or so from it, all of them from definitions that the emulation isn't
using it. The header will be eventually be imported from the Linux
driver (not upstream yet), so for now we can live with a trimmed
header for the emulation usage alone;
- I added libqos tests for the riscv-iommu-pci device. The idea of these
tests is to give us more confidence in the emulation code;
- 'edu' device support. The support was retrieved from Tomasz EDU branch
[2]. This device can then be used to test PCI passthrough to exercise
the IOMMU.
Patches based on alistair/riscv-to-apply.next.
v1 link: https://lore.kernel.org/qemu-riscv/cover.1689819031.git.tjeznach@rivosinc.com/
[1] https://lore.kernel.org/qemu-riscv/cover.1689819031.git.tjeznach@rivosinc.com/
[2] https://github.com/tjeznach/qemu.git, branch 'riscv_iommu_edu_impl'
Andrew Jones (1):
hw/riscv/riscv-iommu: Add another irq for mrif notifications
Daniel Henrique Barboza (2):
test/qtest: add riscv-iommu-pci tests
qtest/riscv-iommu-test: add init queues test
Tomasz Jeznach (12):
exec/memtxattr: add process identifier to the transaction attributes
hw/riscv: add riscv-iommu-bits.h
hw/riscv: add RISC-V IOMMU base emulation
hw/riscv: add riscv-iommu-pci device
hw/riscv: add riscv-iommu-sys platform device
hw/riscv/virt.c: support for RISC-V IOMMU PCIDevice hotplug
hw/riscv/riscv-iommu: add Address Translation Cache (IOATC)
hw/riscv/riscv-iommu: add s-stage and g-stage support
hw/riscv/riscv-iommu: add ATS support
hw/riscv/riscv-iommu: add DBG support
hw/misc: EDU: added PASID support
hw/misc: EDU: add ATS/PRI capability
hw/misc/edu.c | 297 ++++-
hw/riscv/Kconfig | 4 +
hw/riscv/meson.build | 1 +
hw/riscv/riscv-iommu-bits.h | 407 ++++++
hw/riscv/riscv-iommu-pci.c | 173 +++
hw/riscv/riscv-iommu-sys.c | 93 ++
hw/riscv/riscv-iommu.c | 2085 ++++++++++++++++++++++++++++++
hw/riscv/riscv-iommu.h | 146 +++
hw/riscv/trace-events | 15 +
hw/riscv/trace.h | 2 +
hw/riscv/virt.c | 33 +-
include/exec/memattrs.h | 5 +
include/hw/riscv/iommu.h | 40 +
meson.build | 1 +
tests/qtest/libqos/meson.build | 4 +
tests/qtest/libqos/riscv-iommu.c | 79 ++
tests/qtest/libqos/riscv-iommu.h | 96 ++
tests/qtest/meson.build | 1 +
tests/qtest/riscv-iommu-test.c | 234 ++++
19 files changed, 3704 insertions(+), 12 deletions(-)
create mode 100644 hw/riscv/riscv-iommu-bits.h
create mode 100644 hw/riscv/riscv-iommu-pci.c
create mode 100644 hw/riscv/riscv-iommu-sys.c
create mode 100644 hw/riscv/riscv-iommu.c
create mode 100644 hw/riscv/riscv-iommu.h
create mode 100644 hw/riscv/trace-events
create mode 100644 hw/riscv/trace.h
create mode 100644 include/hw/riscv/iommu.h
create mode 100644 tests/qtest/libqos/riscv-iommu.c
create mode 100644 tests/qtest/libqos/riscv-iommu.h
create mode 100644 tests/qtest/riscv-iommu-test.c
--
2.43.2
next reply other threads:[~2024-03-07 16:03 UTC|newest]
Thread overview: 55+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-03-07 16:03 Daniel Henrique Barboza [this message]
2024-03-07 16:03 ` [PATCH v2 01/15] exec/memtxattr: add process identifier to the transaction attributes Daniel Henrique Barboza
2024-04-23 16:33 ` Frank Chang
2024-03-07 16:03 ` [PATCH v2 02/15] hw/riscv: add riscv-iommu-bits.h Daniel Henrique Barboza
2024-05-10 11:01 ` Frank Chang
2024-05-15 10:02 ` Eric Cheng
2024-05-15 14:28 ` Daniel Henrique Barboza
2024-03-07 16:03 ` [PATCH v2 03/15] hw/riscv: add RISC-V IOMMU base emulation Daniel Henrique Barboza
2024-05-01 11:57 ` Jason Chien
2024-05-14 20:06 ` Daniel Henrique Barboza
2024-05-02 11:37 ` Frank Chang
2024-05-08 11:15 ` Daniel Henrique Barboza
2024-05-10 10:58 ` Frank Chang
2024-05-13 12:41 ` Daniel Henrique Barboza
2024-05-13 12:37 ` Daniel Henrique Barboza
2024-05-16 7:13 ` Frank Chang
2024-05-20 16:17 ` Daniel Henrique Barboza
2024-05-21 10:52 ` Frank Chang
2024-05-21 12:28 ` Daniel Henrique Barboza
2024-03-07 16:03 ` [PATCH v2 04/15] hw/riscv: add riscv-iommu-pci device Daniel Henrique Barboza
2024-04-29 7:21 ` Frank Chang
2024-05-02 9:37 ` Daniel Henrique Barboza
2024-03-07 16:03 ` [PATCH v2 05/15] hw/riscv: add riscv-iommu-sys platform device Daniel Henrique Barboza
2024-04-30 1:35 ` Frank Chang
2024-03-07 16:03 ` [PATCH v2 06/15] hw/riscv/virt.c: support for RISC-V IOMMU PCIDevice hotplug Daniel Henrique Barboza
2024-04-30 2:17 ` Frank Chang
2024-05-15 6:25 ` Eric Cheng
2024-05-15 7:16 ` Andrew Jones
2024-03-07 16:03 ` [PATCH v2 07/15] test/qtest: add riscv-iommu-pci tests Daniel Henrique Barboza
2024-04-30 3:33 ` Frank Chang
2024-03-07 16:03 ` [PATCH v2 08/15] hw/riscv/riscv-iommu: add Address Translation Cache (IOATC) Daniel Henrique Barboza
2024-05-08 7:26 ` Frank Chang
2024-05-16 21:45 ` Daniel Henrique Barboza
2024-03-07 16:03 ` [PATCH v2 09/15] hw/riscv/riscv-iommu: add s-stage and g-stage support Daniel Henrique Barboza
2024-05-10 10:36 ` Frank Chang
2024-05-10 11:14 ` Andrew Jones
2024-05-16 19:41 ` Daniel Henrique Barboza
2024-03-07 16:03 ` [PATCH v2 10/15] hw/riscv/riscv-iommu: add ATS support Daniel Henrique Barboza
2024-05-08 2:57 ` Frank Chang
2024-05-17 9:29 ` Daniel Henrique Barboza
2024-03-07 16:03 ` [PATCH v2 11/15] hw/riscv/riscv-iommu: add DBG support Daniel Henrique Barboza
2024-05-06 4:09 ` Frank Chang
2024-05-06 13:05 ` Daniel Henrique Barboza
2024-05-10 10:59 ` Frank Chang
2024-03-07 16:03 ` [PATCH v2 12/15] hw/riscv/riscv-iommu: Add another irq for mrif notifications Daniel Henrique Barboza
2024-05-06 6:12 ` Frank Chang
2024-03-07 16:03 ` [PATCH v2 13/15] qtest/riscv-iommu-test: add init queues test Daniel Henrique Barboza
2024-05-07 8:01 ` Frank Chang
2024-03-07 16:03 ` [PATCH v2 14/15] hw/misc: EDU: added PASID support Daniel Henrique Barboza
2024-05-07 9:06 ` Frank Chang
2024-03-07 16:03 ` [PATCH v2 15/15] hw/misc: EDU: add ATS/PRI capability Daniel Henrique Barboza
2024-05-07 15:32 ` Frank Chang
2024-05-16 13:59 ` Daniel Henrique Barboza
2024-05-10 11:14 ` [PATCH v2 00/15] riscv: QEMU RISC-V IOMMU Support Frank Chang
2024-05-20 16:26 ` Daniel Henrique Barboza
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