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From: BALATON Zoltan <balaton@eik.bme.hu>
To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org
Cc: Nicholas Piggin <npiggin@gmail.com>,
	Daniel Henrique Barboza <danielhb413@gmail.com>
Subject: [PATCH v4 10/33] target/ppc/mmu_common.c: Move else branch to avoid large if block
Date: Thu, 09 May 2024 01:36:13 +0200 (CEST)	[thread overview]
Message-ID: <7be1d0cb73a148b38149f78daa976bdba830ff80.1715209155.git.balaton@eik.bme.hu> (raw)
In-Reply-To: <cover.1715209155.git.balaton@eik.bme.hu>

In mmu6xx_get_physical_address() we have a large if block with a two
line else branch that effectively returns. Invert the condition and
move the else there to allow deindenting the large if block to make
the flow easier to follow.

Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
Reviewed-by: Nicholas Piggin <npiggin@gmail.com>
---
 target/ppc/mmu_common.c | 71 ++++++++++++++++++++---------------------
 1 file changed, 34 insertions(+), 37 deletions(-)

diff --git a/target/ppc/mmu_common.c b/target/ppc/mmu_common.c
index b7c07cf515..ba60b4902b 100644
--- a/target/ppc/mmu_common.c
+++ b/target/ppc/mmu_common.c
@@ -405,47 +405,44 @@ static int mmu6xx_get_physical_address(CPUPPCState *env, mmu_ctx_t *ctx,
     ret = -1;
     if (!ds) {
         /* Check if instruction fetch is allowed, if needed */
-        if (type != ACCESS_CODE || ctx->nx == 0) {
-            /* Page address translation */
-            qemu_log_mask(CPU_LOG_MMU, "htab_base " HWADDR_FMT_plx
-                    " htab_mask " HWADDR_FMT_plx
-                    " hash " HWADDR_FMT_plx "\n",
-                    ppc_hash32_hpt_base(cpu), ppc_hash32_hpt_mask(cpu), hash);
-            ctx->hash[0] = hash;
-            ctx->hash[1] = ~hash;
-
-            /* Initialize real address with an invalid value */
-            ctx->raddr = (hwaddr)-1ULL;
-            /* Software TLB search */
-            ret = ppc6xx_tlb_check(env, ctx, eaddr, access_type);
+        if (type == ACCESS_CODE && ctx->nx) {
+            qemu_log_mask(CPU_LOG_MMU, "No access allowed\n");
+            return -3;
+        }
+        /* Page address translation */
+        qemu_log_mask(CPU_LOG_MMU, "htab_base " HWADDR_FMT_plx " htab_mask "
+                      HWADDR_FMT_plx " hash " HWADDR_FMT_plx "\n",
+                      ppc_hash32_hpt_base(cpu), ppc_hash32_hpt_mask(cpu), hash);
+        ctx->hash[0] = hash;
+        ctx->hash[1] = ~hash;
+
+        /* Initialize real address with an invalid value */
+        ctx->raddr = (hwaddr)-1ULL;
+        /* Software TLB search */
+        ret = ppc6xx_tlb_check(env, ctx, eaddr, access_type);
 #if defined(DUMP_PAGE_TABLES)
-            if (qemu_loglevel_mask(CPU_LOG_MMU)) {
-                CPUState *cs = env_cpu(env);
-                hwaddr curaddr;
-                uint32_t a0, a1, a2, a3;
-
-                qemu_log("Page table: " HWADDR_FMT_plx " len " HWADDR_FMT_plx
-                         "\n", ppc_hash32_hpt_base(cpu),
-                         ppc_hash32_hpt_mask(cpu) + 0x80);
-                for (curaddr = ppc_hash32_hpt_base(cpu);
-                     curaddr < (ppc_hash32_hpt_base(cpu)
-                                + ppc_hash32_hpt_mask(cpu) + 0x80);
-                     curaddr += 16) {
-                    a0 = ldl_phys(cs->as, curaddr);
-                    a1 = ldl_phys(cs->as, curaddr + 4);
-                    a2 = ldl_phys(cs->as, curaddr + 8);
-                    a3 = ldl_phys(cs->as, curaddr + 12);
-                    if (a0 != 0 || a1 != 0 || a2 != 0 || a3 != 0) {
-                        qemu_log(HWADDR_FMT_plx ": %08x %08x %08x %08x\n",
-                                 curaddr, a0, a1, a2, a3);
-                    }
+        if (qemu_loglevel_mask(CPU_LOG_MMU)) {
+            CPUState *cs = env_cpu(env);
+            hwaddr curaddr;
+            uint32_t a0, a1, a2, a3;
+
+            qemu_log("Page table: " HWADDR_FMT_plx " len " HWADDR_FMT_plx "\n",
+                     ppc_hash32_hpt_base(cpu), ppc_hash32_hpt_mask(cpu) + 0x80);
+            for (curaddr = ppc_hash32_hpt_base(cpu);
+                 curaddr < (ppc_hash32_hpt_base(cpu)
+                            + ppc_hash32_hpt_mask(cpu) + 0x80);
+                 curaddr += 16) {
+                a0 = ldl_phys(cs->as, curaddr);
+                a1 = ldl_phys(cs->as, curaddr + 4);
+                a2 = ldl_phys(cs->as, curaddr + 8);
+                a3 = ldl_phys(cs->as, curaddr + 12);
+                if (a0 != 0 || a1 != 0 || a2 != 0 || a3 != 0) {
+                    qemu_log(HWADDR_FMT_plx ": %08x %08x %08x %08x\n",
+                             curaddr, a0, a1, a2, a3);
                 }
             }
-#endif
-        } else {
-            qemu_log_mask(CPU_LOG_MMU, "No access allowed\n");
-            ret = -3;
         }
+#endif
     } else {
         qemu_log_mask(CPU_LOG_MMU, "direct store...\n");
         /* Direct-store segment : absolutely *BUGGY* for now */
-- 
2.30.9



  parent reply	other threads:[~2024-05-08 23:41 UTC|newest]

Thread overview: 43+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-05-08 23:36 [PATCH v4 00/33] Misc PPC exception and BookE MMU clean ups BALATON Zoltan
2024-05-08 23:36 ` [PATCH v4 01/33] target/ppc: Fix gen_sc to use correct nip BALATON Zoltan
2024-05-08 23:36 ` [PATCH v4 02/33] target/ppc: Move patching nip from exception handler to helper_scv BALATON Zoltan
2024-05-08 23:36 ` [PATCH v4 03/33] target/ppc: Simplify syscall exception handlers BALATON Zoltan
2024-05-08 23:36 ` [PATCH v4 04/33] target/ppc: Remove unused helper BALATON Zoltan
2024-05-08 23:36 ` [PATCH v4 05/33] target/ppc/mmu_common.c: Move calculation of a value closer to its usage BALATON Zoltan
2024-05-08 23:36 ` [PATCH v4 06/33] target/ppc/mmu_common.c: Remove unneeded local variable BALATON Zoltan
2024-05-08 23:36 ` [PATCH v4 07/33] target/ppc/mmu_common.c: Simplify checking for real mode BALATON Zoltan
2024-05-08 23:36 ` [PATCH v4 08/33] target/ppc/mmu_common.c: Drop cases for unimplemented MPC8xx MMU BALATON Zoltan
2024-05-09  6:01   ` Nicholas Piggin
2024-05-08 23:36 ` [PATCH v4 09/33] target/ppc/mmu_common.c: Introduce mmu6xx_get_physical_address() BALATON Zoltan
2024-05-08 23:36 ` BALATON Zoltan [this message]
2024-05-08 23:36 ` [PATCH v4 11/33] target/ppc/mmu_common.c: Move some debug logging BALATON Zoltan
2024-05-09  6:01   ` Nicholas Piggin
2024-05-08 23:36 ` [PATCH v4 12/33] target/ppc/mmu_common.c: Eliminate ret from mmu6xx_get_physical_address() BALATON Zoltan
2024-05-08 23:36 ` [PATCH v4 13/33] target/ppc/mmu_common.c: Split out BookE cases before checking real mode BALATON Zoltan
2024-05-08 23:36 ` [PATCH v4 14/33] target/ppc/mmu_common.c: Split off real mode cases in get_physical_address_wtlb() BALATON Zoltan
2024-05-08 23:36 ` [PATCH v4 15/33] target/ppc/mmu_common.c: Inline and remove check_physical() BALATON Zoltan
2024-05-08 23:36 ` [PATCH v4 16/33] target/ppc/mmu_common.c: Fix misindented qemu_log_mask() calls BALATON Zoltan
2024-05-08 23:36 ` [PATCH v4 17/33] target/ppc/mmu_common.c: Deindent ppc_jumbo_xlate() BALATON Zoltan
2024-05-08 23:36 ` [PATCH v4 18/33] target/ppc/mmu_common.c: Replace hard coded constants in ppc_jumbo_xlate() BALATON Zoltan
2024-05-08 23:36 ` [PATCH v4 19/33] target/ppc/mmu_common.c: Don't use mmu_ctx_t for mmu40x_get_physical_address() BALATON Zoltan
2024-05-09  6:13   ` Nicholas Piggin
2024-05-08 23:36 ` [PATCH v4 20/33] target/ppc/mmu_common.c: Don't use mmu_ctx_t in mmubooke_get_physical_address() BALATON Zoltan
2024-05-09  6:13   ` Nicholas Piggin
2024-05-08 23:36 ` [PATCH v4 21/33] target/ppc/mmu_common.c: Don't use mmu_ctx_t in mmubooke206_get_physical_address() BALATON Zoltan
2024-05-09  6:14   ` Nicholas Piggin
2024-05-08 23:36 ` [PATCH v4 22/33] target/ppc/mmu_common.c: Make get_physical_address_wtlb() static BALATON Zoltan
2024-05-09  6:17   ` Nicholas Piggin
2024-05-08 23:36 ` [PATCH v4 23/33] target/ppc: Remove pp_check() and reuse ppc_hash32_pp_prot() BALATON Zoltan
2024-05-08 23:36 ` [PATCH v4 24/33] target/ppc/mmu_common.c: Remove BookE from direct store handling BALATON Zoltan
2024-05-08 23:36 ` [PATCH v4 25/33] target/ppc/mmu_common.c: Split off BookE handling from ppc_jumbo_xlate() BALATON Zoltan
2024-05-09  6:17   ` Nicholas Piggin
2024-05-08 23:36 ` [PATCH v4 26/33] target/ppc/mmu_common.c: Simplify ppc_booke_xlate() part 1 BALATON Zoltan
2024-05-08 23:36 ` [PATCH v4 27/33] target/ppc/mmu_common.c: Simplify ppc_booke_xlate() part 2 BALATON Zoltan
2024-05-09  6:19   ` Nicholas Piggin
2024-05-08 23:36 ` [PATCH v4 28/33] target/ppc: Remove id_tlbs flag from CPU env BALATON Zoltan
2024-05-08 23:36 ` [PATCH v4 29/33] target/ppc: Split off common embedded TLB init BALATON Zoltan
2024-05-08 23:36 ` [PATCH v4 30/33] target/ppc/mmu-hash32.c: Drop a local variable BALATON Zoltan
2024-05-08 23:36 ` [PATCH v4 31/33] target/ppc/mmu-radix64.c: " BALATON Zoltan
2024-05-08 23:36 ` [PATCH v4 32/33] target/ppc: Add a macro to check for page protection bit BALATON Zoltan
2024-05-08 23:36 ` [PATCH v4 33/33] target/ppc: Move out BookE and related MMU functions from mmu_common.c BALATON Zoltan
2024-05-09  6:19   ` Nicholas Piggin

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