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Sun, 19 Sep 2021 15:23:11 -0700 (PDT) Received: from [192.168.1.11] ([71.212.134.125]) by smtp.gmail.com with ESMTPSA id t68sm13023463pgc.59.2021.09.19.15.23.10 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sun, 19 Sep 2021 15:23:11 -0700 (PDT) Subject: Re: [PATCH v2 4/8] linux-user/arm: Report SIGBUS and SIGSEGV correctly To: Peter Maydell References: <20210821195958.41312-1-richard.henderson@linaro.org> <20210821195958.41312-5-richard.henderson@linaro.org> From: Richard Henderson Message-ID: <4a65af02-ae19-20c5-9ffa-3e3a7d0401d4@linaro.org> Date: Sun, 19 Sep 2021 15:23:09 -0700 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.13.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=2607:f8b0:4864:20::536; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x536.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, NICE_REPLY_A=-0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-arm , QEMU Developers Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 8/26/21 6:31 AM, Peter Maydell wrote: >> + si_signo = TARGET_SIGSEGV; >> + si_code = TARGET_SEGV_ACCERR; >> + break; >> + case 0x5: /* Translation fault, level 1 */ >> + case 0x7: /* Translation fault, level 2 */ >> + si_signo = TARGET_SIGSEGV; >> + si_code = TARGET_SEGV_MAPERR; >> + break; > > Side note: for cases like this where we can tell MAPERR from > ACCERR based on info the exception handler passes to us, should > we prefer that or the "check the page flags" approach that > force_sigsegv_for_addr() takes ? FYI, the v3 version of the sigsegv+siginfo patch set makes is vastly easier on the target code. For the most part the target code goes away entirely. For the specific case of Arm (both a32 and a64), we retain it because we are supposed to report the ESR and FAR as part of the signal frame. I'll note that a64 isn't filling in the esr_context and far_context structures. The latter was invented for MTE, I believe, where the normal si_addr is untagged. I should have a double-check around those at some point... r~