From: Shravan Ramani <shravankr@nvidia.com>
To: "Ilpo Järvinen" <ilpo.jarvinen@linux.intel.com>
Cc: Hans de Goede <hdegoede@redhat.com>,
Vadim Pasternak <vadimp@nvidia.com>,
David Thompson <davthompson@nvidia.com>,
"platform-driver-x86@vger.kernel.org"
<platform-driver-x86@vger.kernel.org>,
LKML <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v1 2/3] platform/mellanox: mlxbf-pmc: Add support for 64-bit counters and cycle count
Date: Thu, 18 Apr 2024 12:06:22 +0000 [thread overview]
Message-ID: <DM4PR12MB513613B05FB14A933AB7304DC00E2@DM4PR12MB5136.namprd12.prod.outlook.com> (raw)
In-Reply-To: <e77f01b4-f314-6822-8533-95f37a42cd4f@linux.intel.com>
> On Wed, 17 Apr 2024, Shravan Kumar Ramani wrote:
>
> > Add support for programming any counter to monitor the cycle count.
> > Since counting of cycles using 32-bit ocunters would result in frequent
> > wraparounds, add the ability to combine 2 adjacent 32-bit counters to
> > form 1 64-bit counter.
> > Both these features are supported by BlueField-3 PMC hardware, hence
> > the required bit-fields are exposed by the driver via sysfs to allow
> > the user to configure as needed.
> >
> > Signed-off-by: Shravan Kumar Ramani <shravankr@nvidia.com>
> > Reviewed-by: David Thompson <davthompson@nvidia.com>
> > Reviewed-by: Vadim Pasternak <vadimp@nvidia.com>
> > ---
>
> > @@ -1799,6 +1902,37 @@ static int mlxbf_pmc_init_perftype_counter(struct device *dev, unsigned int blk_
> > attr = NULL;
> > }
> >
> > + if (pmc->block[blk_num].type == MLXBF_PMC_TYPE_CRSPACE) {
> > + /*
> > + * Couple adjacent odd and even 32-bit counters to form 64-bit counters
> > + * using "use_odd_counter" sysfs which has one bit per even counter.
> > + */
> > + attr = &pmc->block[blk_num].attr_use_odd_counter;
> > + attr->dev_attr.attr.mode = 0644;
> > + attr->dev_attr.show = mlxbf_pmc_use_odd_counter_show;
> > + attr->dev_attr.store = mlxbf_pmc_use_odd_counter_store;
> > + attr->nr = blk_num;
> > + attr->dev_attr.attr.name = devm_kasprintf(dev, GFP_KERNEL,
> > + "use_odd_counter");
> > + if (!attr->dev_attr.attr.name)
> > + return -ENOMEM;
> > + pmc->block[blk_num].block_attr[++i] = &attr->dev_attr.attr;
> > + attr = NULL;
> > +
> > + /* Program crspace counters to count clock cycles using "count_clock" sysfs */
> > + attr = &pmc->block[blk_num].attr_count_clock;
> > + attr->dev_attr.attr.mode = 0644;
> > + attr->dev_attr.show = mlxbf_pmc_count_clock_show;
> > + attr->dev_attr.store = mlxbf_pmc_count_clock_store;
> > + attr->nr = blk_num;
> > + attr->dev_attr.attr.name = devm_kasprintf(dev, GFP_KERNEL,
> > + "count_clock");
> > + if (!attr->dev_attr.attr.name)
> > + return -ENOMEM;
> > + pmc->block[blk_num].block_attr[++i] = &attr->dev_attr.attr;
> > + attr = NULL;
> > + }
>
> Hi,
>
> What was the reason why this driver could not use .dev_groups to setup
> sysfs (filtering can be done with .is_visible)?
>
The current approach was suggested during the initial submission of the driver and the same has
been followed since. Do you mean to add a is_visible routine for each of the sysfs types like
count_clock, use_odd_counter, etc and check the conditions for their inclusion in this routine?
Thanks,
Shravan
next prev parent reply other threads:[~2024-04-18 12:06 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-04-17 7:30 [PATCH v1 0/3] Updates to mlxbf-pmc Shravan Kumar Ramani
2024-04-17 7:30 ` [PATCH v1 1/3] Documentation/ABI: Add document for Mellanox PMC driver Shravan Kumar Ramani
2024-04-17 13:13 ` Ilpo Järvinen
2024-04-17 7:30 ` [PATCH v1 2/3] platform/mellanox: mlxbf-pmc: Add support for 64-bit counters and cycle count Shravan Kumar Ramani
2024-04-17 13:18 ` Ilpo Järvinen
2024-04-18 12:06 ` Shravan Ramani [this message]
2024-04-17 7:30 ` [PATCH v1 3/3] platform/mellanox: mlxbf-pmc: Add support for clock_measure performance block Shravan Kumar Ramani
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