From: Stafford Horne <shorne@gmail.com>
To: LKML <linux-kernel@vger.kernel.org>
Cc: Linux OpenRISC <linux-openrisc@vger.kernel.org>,
Stafford Horne <shorne@gmail.com>,
Jonas Bonn <jonas@southpole.se>,
Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>,
Oleg Nesterov <oleg@redhat.com>
Subject: [PATCH 4/5] openrisc: Add FPU config
Date: Thu, 11 Apr 2024 19:06:31 +0100 [thread overview]
Message-ID: <20240411180644.2023991-5-shorne@gmail.com> (raw)
In-Reply-To: <20240411180644.2023991-1-shorne@gmail.com>
Allow disabling FPU related code sequences to save space.
Signed-off-by: Stafford Horne <shorne@gmail.com>
---
arch/openrisc/Kconfig | 9 +++++++++
arch/openrisc/kernel/ptrace.c | 6 ++++++
arch/openrisc/kernel/traps.c | 3 ++-
3 files changed, 17 insertions(+), 1 deletion(-)
diff --git a/arch/openrisc/Kconfig b/arch/openrisc/Kconfig
index 3586cda55bde..69c0258700b2 100644
--- a/arch/openrisc/Kconfig
+++ b/arch/openrisc/Kconfig
@@ -188,6 +188,15 @@ config SMP
If you don't know what to do here, say N.
+config FPU
+ bool "FPU support"
+ default y
+ help
+ Say N here if you want to disable all floating-point related procedures
+ in the kernel and reduce binary size.
+
+ If you don't know what to do here, say Y.
+
source "kernel/Kconfig.hz"
config OPENRISC_NO_SPR_SR_DSX
diff --git a/arch/openrisc/kernel/ptrace.c b/arch/openrisc/kernel/ptrace.c
index 1eeac3b62e9d..cf410193095f 100644
--- a/arch/openrisc/kernel/ptrace.c
+++ b/arch/openrisc/kernel/ptrace.c
@@ -88,6 +88,7 @@ static int genregs_set(struct task_struct *target,
return ret;
}
+#ifdef CONFIG_FPU
/*
* As OpenRISC shares GPRs and floating point registers we don't need to export
* the floating point registers again. So here we only export the fpcsr special
@@ -115,13 +116,16 @@ static int fpregs_set(struct task_struct *target,
®s->fpcsr, 0, 4);
return ret;
}
+#endif
/*
* Define the register sets available on OpenRISC under Linux
*/
enum or1k_regset {
REGSET_GENERAL,
+#ifdef CONFIG_FPU
REGSET_FPU,
+#endif
};
static const struct user_regset or1k_regsets[] = {
@@ -133,6 +137,7 @@ static const struct user_regset or1k_regsets[] = {
.regset_get = genregs_get,
.set = genregs_set,
},
+#ifdef CONFIG_FPU
[REGSET_FPU] = {
.core_note_type = NT_PRFPREG,
.n = sizeof(struct __or1k_fpu_state) / sizeof(long),
@@ -141,6 +146,7 @@ static const struct user_regset or1k_regsets[] = {
.regset_get = fpregs_get,
.set = fpregs_set,
},
+#endif
};
static const struct user_regset_view user_or1k_native_view = {
diff --git a/arch/openrisc/kernel/traps.c b/arch/openrisc/kernel/traps.c
index 211ddaa0c5fa..57e0d674eb04 100644
--- a/arch/openrisc/kernel/traps.c
+++ b/arch/openrisc/kernel/traps.c
@@ -182,6 +182,7 @@ asmlinkage void do_fpe_trap(struct pt_regs *regs, unsigned long address)
{
if (user_mode(regs)) {
int code = FPE_FLTUNK;
+#ifdef CONFIG_FPU
unsigned long fpcsr = regs->fpcsr;
if (fpcsr & SPR_FPCSR_IVF)
@@ -197,7 +198,7 @@ asmlinkage void do_fpe_trap(struct pt_regs *regs, unsigned long address)
/* Clear all flags */
regs->fpcsr &= ~SPR_FPCSR_ALLF;
-
+#endif
force_sig_fault(SIGFPE, code, (void __user *)regs->pc);
} else {
pr_emerg("KERNEL: Illegal fpe exception 0x%.8lx\n", regs->pc);
--
2.44.0
next prev parent reply other threads:[~2024-04-11 18:07 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-04-11 18:06 [PATCH 0/5] OpenRISC FPU and Signal handling fixups Stafford Horne
2024-04-11 18:06 ` [PATCH 1/5] openrisc: traps: Convert printks to pr_<level> macros Stafford Horne
2024-04-11 18:06 ` [PATCH 2/5] openrisc: traps: Remove calls to show_registers before die Stafford Horne
2024-04-11 18:06 ` [PATCH 3/5] openrisc: traps: Don't send signals to kernel mode threads Stafford Horne
2024-04-11 18:06 ` Stafford Horne [this message]
2024-04-11 18:06 ` [PATCH 5/5] openrisc: Move FPU state out of pt_regs Stafford Horne
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