From: Stephen Boyd <sboyd@kernel.org>
To: Tomer Maimon <tmaimon77@gmail.com>
Cc: devicetree@vger.kernel.org, benjaminfair@google.com,
venture@google.com, mturquette@baylibre.com,
linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org,
tali.perry1@gmail.com, robh+dt@kernel.org, joel@jms.id.au,
krzysztof.kozlowski+dt@linaro.org, openbmc@lists.ozlabs.org
Subject: Re: [PATCH v23 3/3] clk: npcm8xx: add clock controller
Date: Wed, 10 Apr 2024 21:51:24 -0700 [thread overview]
Message-ID: <6709fe217cfbd78543e7dfe7c3acec6e.sboyd@kernel.org> (raw)
In-Reply-To: <CAP6Zq1htKQ5v0tH9HGRejnKwJ5ZauUWG_CzYUKegkVL4Ek8UxA@mail.gmail.com>
Quoting Tomer Maimon (2024-02-29 13:29:46)
> Hi Stephen,
>
> Thanks for your reply.
>
> On Thu, 29 Feb 2024 at 00:48, Stephen Boyd <sboyd@kernel.org> wrote:
> >
> > Quoting Tomer Maimon (2024-02-25 10:00:35)
> > > Hi Stephen,
> > >
> > > On Thu, 22 Feb 2024 at 07:58, Stephen Boyd <sboyd@kernel.org> wrote:
> > > >
> > > > Quoting Tomer Maimon (2024-01-31 10:26:53)
> > > > > +
> > > > > +static unsigned long npcm8xx_clk_div_get_parent(struct clk_hw *hw,
> > > > > + unsigned long parent_rate)
> > > > > +{
> > > > > + struct npcm8xx_clk *div = to_npcm8xx_clk(hw);
> > > > > + unsigned int val;
> > > > > +
> > > > > + regmap_read(div->clk_regmap, div->offset, &val);
> > > > > + val = val >> div->shift;
> > > > > + val &= clk_div_mask(div->width);
> > > > > +
> > > > > + return divider_recalc_rate(hw, parent_rate, val, NULL, div->flags,
> > > > > + div->width);
> > > > > +}
> > > > > +
> > > > > +static const struct clk_ops npcm8xx_clk_div_ops = {
> > > > > + .recalc_rate = npcm8xx_clk_div_get_parent,
> > > > > +};
> > > > > +
> > > > > +static int npcm8xx_clk_probe(struct platform_device *pdev)
> > > > > +{
> > > > > + struct device_node *parent_np = of_get_parent(pdev->dev.of_node);
> > > >
> > > > The parent of this device is not a syscon.
> > > Once I have registered the map that handles both reset and the clock
> > > in general is syscon, this is why we will modify the DTS so the clock
> > > and the reset will be under syscon father node
> > > sysctrl: system-controller@f0801000 {
> > > compatible = "syscon", "simple-mfd";
> > > reg = <0x0 0xf0801000 0x0 0x1000>;
> > >
> > > rstc: reset-controller {
> > > compatible = "nuvoton,npcm845-reset";
> > > reg = <0x0 0xf0801000 0x0 0xC4>;
> > > #reset-cells = <2>;
> > > nuvoton,sysgcr = <&gcr>;
> > > };
> > >
> > > clk: clock-controller {
> > > compatible = "nuvoton,npcm845-clk";
> > > #clock-cells = <1>;
> > > clocks = <&refclk>;
> > > clock-names = "refclk";
> > > };
> > > };
> > > You can see other drivers that using the same method like
> > > https://elixir.bootlin.com/linux/v6.8-rc5/source/Documentation/devicetree/bindings/clock/socionext,uniphier-clock.yaml
> >
> > You will need a similar file like
> > Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-perictrl.yaml
> > then to describe the child nodes.
> I can do it.
> >
> > Socionext may not be the best example to follow. I generally try to
> > avoid syscon and simply put #reset-cells and #clock-cells in the node
> If I remove syscon I can't use syscon_node_to_regmap function, What
> should I use If I remove syscon? auxiliary bus? something else?
You should use auxiliary bus. You can make a regmap in the parent
driver and pass that to the child auxiliary devices still.
> > for the device. You can use the auxiliary bus to register drivers for
> > clk and reset and put them into the resepective driver directories.
> I little bit confused, what is an auxiliary bus to register drivers,
> can you provide me an example?
$ git grep -l auxiliary_ -- drivers/clk/
drivers/clk/microchip/clk-mpfs.c
drivers/clk/starfive/clk-starfive-jh7110-sys.c
You can decide to make either the clk or the reset driver the "main"
driver that registers the other auxiliary devices. Either way the DT
binding has a single node instead of one per logical driver in the
kernel.
> > Avoid syscon means random drivers can't reach into the device with a
> > regmap handle and read/write registers that they're not supposed to.
> Indeed, but the drivers could use the reset and clock memory map only
> if the module is also a child node.
>
> Please let me know what is your preferred way to handle it:
> 1. stick with syscon and upstream-defined documentation for the rst clk syscon.
> 2. avoid syscon and use an auxiliary bus, appreciate if you could give
> me an example of how it should be done.
> 3. Avoid sycon and handle it differently.
I prefer 2
prev parent reply other threads:[~2024-04-11 4:52 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-01-31 18:26 [PATCH v23 0/3] Introduce Nuvoton Arbel NPCM8XX BMC SoC Tomer Maimon
2024-01-31 18:26 ` [PATCH v23 1/3] dt-bindings: clock: npcm845: Add reference 25m clock property Tomer Maimon
2024-02-22 5:58 ` Stephen Boyd
2024-02-25 18:06 ` Tomer Maimon
2024-01-31 18:26 ` [PATCH v23 2/3] arm64: dts: nuvoton: npcm8xx: add reference 25m clock Tomer Maimon
2024-01-31 18:26 ` [PATCH v23 3/3] clk: npcm8xx: add clock controller Tomer Maimon
2024-02-22 5:58 ` Stephen Boyd
2024-02-25 18:00 ` Tomer Maimon
2024-02-28 22:47 ` Stephen Boyd
2024-02-29 21:29 ` Tomer Maimon
2024-03-05 15:59 ` Tomer Maimon
2024-04-02 19:42 ` Tomer Maimon
2024-04-11 4:51 ` Stephen Boyd [this message]
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