From: Dave Jiang <dave.jiang@intel.com>
To: Alison Schofield <alison.schofield@intel.com>
Cc: <linux-cxl@vger.kernel.org>, <nvdimm@lists.linux.dev>,
<vishal.l.verma@intel.com>
Subject: Re: [NDCTL PATCH v3 3/3] ndctl: cxl: add QoS class check for CXL region creation
Date: Tue, 30 Jan 2024 13:53:04 -0700 [thread overview]
Message-ID: <d9127d2f-da9f-4b39-9f81-0a8e718e5ebc@intel.com> (raw)
In-Reply-To: <ZbP2f31s09WRzWb1@aschofie-mobl2>
On 1/26/24 11:14, Alison Schofield wrote:
> On Wed, Jan 24, 2024 at 01:54:54PM -0700, Dave Jiang wrote:
>> The CFMWS provides a QTG ID. The kernel driver creates a root decoder that
>> represents the CFMWS. A qos_class attribute is exported via sysfs for the root
>> decoder.
>>
>> One or more QoS class tokens are retrieved via QTG ID _DSM from the ACPI0017
>> device for a CXL memory device. The input for the _DSM is the read and write
>> latency and bandwidth for the path between the device and the CPU. The
>> numbers are constructed by the kernel driver for the _DSM input. When a
>> device is probed, QoS class tokens are retrieved. This is useful for a
>> hot-plugged CXL memory device that does not have regions created.
>>
>> Add a check for config check during region creation. Emit a warning if the
>
> Maybe "Add a QoS check during region creation."
>
>> QoS class token from the root decoder is different than the mem device QoS
>> class token. User parameter options are provided to fail instead of just
>> warning.
>>
>> Signed-off-by: Dave Jiang <dave.jiang@intel.com>
>> ---
>> v3:
>> - Rebase to pending branch
>> ---
>> Documentation/cxl/cxl-create-region.txt | 9 ++++
>> cxl/region.c | 67 +++++++++++++++++++++++++++++++
>> 2 files changed, 75 insertions(+), 1 deletion(-)
>>
>> diff --git a/Documentation/cxl/cxl-create-region.txt b/Documentation/cxl/cxl-create-region.txt
>> index f11a412bddfe..9ab2e0fee152 100644
>> --- a/Documentation/cxl/cxl-create-region.txt
>> +++ b/Documentation/cxl/cxl-create-region.txt
>> @@ -105,6 +105,15 @@ include::bus-option.txt[]
>> supplied, the first cross-host bridge (if available), decoder that
>> supports the largest interleave will be chosen.
>>
>> +-e::
>> +--strict::
>> + Enforce strict execution where any potential error will force failure.
>> + For example, if QTG ID mismatches will cause failure.
>
> The definition of this 'Enforce ...' sounds very broad like it's
> going to be used for more that this QTG ID check. Is it? Maybe I
> missed some earlier reviews and that is intentional.
I left it intentionally broad to allow it be used in other strict checking in the future and not exclusively to qos_class. And then the -q parameter below is used to override for qos_class. Speaking of which, I should fixup the documentation to use qos_class rather than QTG ID.
>
> I was expecting it to say something like: Enforce strict QTG ID matching.
> Fail to create region on any mismatch.
>
>
>> +
>> +-q::
>> +--no-enforce-qtg::
>> + Parameter to bypass QTG ID mismatch failure. Will only emit warning.
>> +
>> include::human-option.txt[]
>>
>> include::debug-option.txt[]
>
>
> snip
>
>>
next prev parent reply other threads:[~2024-01-30 20:53 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-01-24 20:54 [NDCTL PATCH v3 0/3] ndctl: Add support of qos_class for CXL CLI Dave Jiang
2024-01-24 20:54 ` [NDCTL PATCH v3 1/3] ndctl: cxl: Add QoS class retrieval for the root decoder Dave Jiang
2024-01-26 17:45 ` Alison Schofield
2024-01-24 20:54 ` [NDCTL PATCH v3 2/3] ndctl: cxl: Add QoS class support for the memory device Dave Jiang
2024-01-26 18:01 ` Alison Schofield
2024-01-30 20:48 ` Dave Jiang
2024-01-24 20:54 ` [NDCTL PATCH v3 3/3] ndctl: cxl: add QoS class check for CXL region creation Dave Jiang
2024-01-26 18:14 ` Alison Schofield
2024-01-30 20:53 ` Dave Jiang [this message]
2024-01-25 21:16 ` [NDCTL PATCH v3 0/3] ndctl: Add support of qos_class for CXL CLI Dan Williams
2024-01-25 21:40 ` Dave Jiang
2024-01-25 22:07 ` Dan Williams
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