From: Alison Schofield <alison.schofield@intel.com>
To: Dave Jiang <dave.jiang@intel.com>
Cc: linux-cxl@vger.kernel.org, nvdimm@lists.linux.dev,
vishal.l.verma@intel.com
Subject: Re: [NDCTL PATCH v4 3/4] ndctl: cxl: add QoS class check for CXL region creation
Date: Tue, 30 Jan 2024 19:10:07 -0800 [thread overview]
Message-ID: <Zbm6Dwa93iO0O83Z@aschofie-mobl2> (raw)
In-Reply-To: <20240130233526.1031801-4-dave.jiang@intel.com>
On Tue, Jan 30, 2024 at 04:32:43PM -0700, Dave Jiang wrote:
> The CFMWS provides a QTG ID. The kernel driver creates a root decoder that
> represents the CFMWS. A qos_class attribute is exported via sysfs for the root
> decoder.
>
> One or more QoS class tokens are retrieved via QTG ID _DSM from the ACPI0017
> device for a CXL memory device. The input for the _DSM is the read and write
> latency and bandwidth for the path between the device and the CPU. The
> numbers are constructed by the kernel driver for the _DSM input. When a
> device is probed, QoS class tokens are retrieved. This is useful for a
> hot-plugged CXL memory device that does not have regions created.
>
> Add a QoS check during region creation. Emit a warning if the qos_class
> token from the root decoder is different than the mem device qos_class
> token. User parameter options are provided to fail instead of just
> warning.
>
> Signed-off-by: Dave Jiang <dave.jiang@intel.com>
Reviewed-by: Alison Schofield <alison.schofield@intel.com>
> ---
> v4:
> - Deal with single memdev qos_class due to kernel change
> - Clarify commit log verbiage (Alison)
> ---
> Documentation/cxl/cxl-create-region.txt | 9 ++++
> cxl/region.c | 56 ++++++++++++++++++++++++-
> 2 files changed, 64 insertions(+), 1 deletion(-)
>
> diff --git a/Documentation/cxl/cxl-create-region.txt b/Documentation/cxl/cxl-create-region.txt
> index f11a412bddfe..d5e34cf38236 100644
> --- a/Documentation/cxl/cxl-create-region.txt
> +++ b/Documentation/cxl/cxl-create-region.txt
> @@ -105,6 +105,15 @@ include::bus-option.txt[]
> supplied, the first cross-host bridge (if available), decoder that
> supports the largest interleave will be chosen.
>
> +-e::
> +--strict::
> + Enforce strict execution where any potential error will force failure.
> + For example, if qos_class mismatches region creation will fail.
> +
> +-q::
> +--no-enforce-qos::
> + Parameter to bypass qos_class mismatch failure. Will only emit warning.
> +
> include::human-option.txt[]
>
> include::debug-option.txt[]
> diff --git a/cxl/region.c b/cxl/region.c
> index 3a762db4800e..f9033fa0afbf 100644
> --- a/cxl/region.c
> +++ b/cxl/region.c
> @@ -32,6 +32,8 @@ static struct region_params {
> bool force;
> bool human;
> bool debug;
> + bool strict;
> + bool no_qos;
> } param = {
> .ways = INT_MAX,
> .granularity = INT_MAX,
> @@ -49,6 +51,8 @@ struct parsed_params {
> const char **argv;
> struct cxl_decoder *root_decoder;
> enum cxl_decoder_mode mode;
> + bool strict;
> + bool no_qos;
> };
>
> enum region_actions {
> @@ -81,7 +85,9 @@ OPT_STRING('U', "uuid", ¶m.uuid, \
> "region uuid", "uuid for the new region (default: autogenerate)"), \
> OPT_BOOLEAN('m', "memdevs", ¶m.memdevs, \
> "non-option arguments are memdevs"), \
> -OPT_BOOLEAN('u', "human", ¶m.human, "use human friendly number formats")
> +OPT_BOOLEAN('u', "human", ¶m.human, "use human friendly number formats"), \
> +OPT_BOOLEAN('e', "strict", ¶m.strict, "strict execution enforcement"), \
> +OPT_BOOLEAN('q', "no-enforce-qos", ¶m.no_qos, "no enforce of qos_class")
>
> static const struct option create_options[] = {
> BASE_OPTIONS(),
> @@ -360,6 +366,9 @@ static int parse_create_options(struct cxl_ctx *ctx, int count,
> }
> }
>
> + p->strict = param.strict;
> + p->no_qos = param.no_qos;
> +
> return 0;
>
> err:
> @@ -467,6 +476,49 @@ static void set_type_from_decoder(struct cxl_ctx *ctx, struct parsed_params *p)
> p->mode = CXL_DECODER_MODE_PMEM;
> }
>
> +static int create_region_validate_qos_class(struct cxl_ctx *ctx,
> + struct parsed_params *p)
> +{
> + int root_qos_class;
> + int qos_class;
> + int i;
> +
> + root_qos_class = cxl_root_decoder_get_qos_class(p->root_decoder);
> + if (root_qos_class == CXL_QOS_CLASS_NONE)
> + return 0;
> +
> + for (i = 0; i < p->ways; i++) {
> + struct json_object *jobj =
> + json_object_array_get_idx(p->memdevs, i);
> + struct cxl_memdev *memdev = json_object_get_userdata(jobj);
> +
> + if (p->mode == CXL_DECODER_MODE_RAM)
> + qos_class = cxl_memdev_get_ram_qos_class(memdev);
> + else
> + qos_class = cxl_memdev_get_pmem_qos_class(memdev);
> +
> + /* No qos_class entries. Possibly no kernel support */
> + if (qos_class == CXL_QOS_CLASS_NONE)
> + break;
> +
> + if (qos_class != root_qos_class) {
> + if (p->strict && !p->no_qos) {
> + log_err(&rl, "%s QoS Class mismatches %s\n",
> + cxl_decoder_get_devname(p->root_decoder),
> + cxl_memdev_get_devname(memdev));
> +
> + return -ENXIO;
> + }
> +
> + log_notice(&rl, "%s QoS Class mismatches %s\n",
> + cxl_decoder_get_devname(p->root_decoder),
> + cxl_memdev_get_devname(memdev));
> + }
> + }
> +
> + return 0;
> +}
> +
> static int create_region_validate_config(struct cxl_ctx *ctx,
> struct parsed_params *p)
> {
> @@ -507,6 +559,8 @@ found:
> return rc;
>
> collect_minsize(ctx, p);
> + create_region_validate_qos_class(ctx, p);
> +
> return 0;
> }
>
> --
> 2.43.0
>
>
next prev parent reply other threads:[~2024-01-31 3:10 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-01-30 23:32 ndctl: Add support of qos_class for CXL CLI Dave Jiang
2024-01-30 23:32 ` [NDCTL PATCH v4 1/4] ndctl: cxl: Add QoS class retrieval for the root decoder Dave Jiang
2024-01-30 23:32 ` [NDCTL PATCH v4 2/4] ndctl: cxl: Add QoS class support for the memory device Dave Jiang
2024-01-30 23:32 ` [NDCTL PATCH v4 3/4] ndctl: cxl: add QoS class check for CXL region creation Dave Jiang
2024-01-31 3:10 ` Alison Schofield [this message]
2024-01-30 23:32 ` [NDCTL PATCH v4 4/4] ndctl: add test for qos_class in cxl-topology.sh Dave Jiang
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