From: Marek Vasut <marex@denx.de>
To: Alexandre TORGUE <alexandre.torgue@foss.st.com>,
Christophe Roullier <christophe.roullier@foss.st.com>,
"David S . Miller" <davem@davemloft.net>,
Eric Dumazet <edumazet@google.com>,
Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Conor Dooley <conor+dt@kernel.org>,
Maxime Coquelin <mcoquelin.stm32@gmail.com>,
Richard Cochran <richardcochran@gmail.com>,
Jose Abreu <joabreu@synopsys.com>,
Liam Girdwood <lgirdwood@gmail.com>,
Mark Brown <broonie@kernel.org>
Cc: netdev@vger.kernel.org, devicetree@vger.kernel.org,
linux-stm32@st-md-mailman.stormreply.com,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 10/11] ARM: dts: stm32: add ethernet1 and ethernet2 for STM32MP135F-DK board
Date: Thu, 16 May 2024 02:23:56 +0200 [thread overview]
Message-ID: <9c1d80eb-03e7-4d39-b516-cbcae0d50e4a@denx.de> (raw)
In-Reply-To: <8bf3be27-3222-422d-bfff-ff67271981d8@foss.st.com>
On 5/13/24 6:01 PM, Alexandre TORGUE wrote:
> Hi Marek
Hi,
> On 4/26/24 17:44, Marek Vasut wrote:
>> On 4/26/24 2:57 PM, Christophe Roullier wrote:
>>> Add dual Ethernet:
>>> -Ethernet1: RMII with crystal
>>> -Ethernet2: RMII without crystal
>>> PHYs used are SMSC (LAN8742A)
>>>
>>> With Ethernet1, we can performed WoL from PHY instead of GMAC point
>>> of view.
>>> (in this case IRQ for WoL is managed as wakeup pin and configured
>>> in OS secure).
>>
>> How does the Linux PHY driver process such a PHY IRQ ?
>>
>> Or is Linux unaware of the PHY IRQ ? Doesn't that cause issues ?
>
> In this case, we want to have an example to wakeup the system from
> Standby low power mode (VDDCPU and VDD_CORE off) thanks to a magic
> packet detected by the PHY. The PHY then assert his interrupt output
> signal.
> On MP13 DK platform, this PHY signal is connected to a specific GPIO
> aka "Wakeup pins" (only 6 wakeup pins an MP13). Those specific GPIOs are
> handled by the PWR peripheral which is controlled by the secure OS.
What does configure the PHY for this wakeup mode ?
> On WoL packet, the Secure OS catches the PHY interrupt and uses
> asynchronous notification mechanism to warn Linux (on our platform we
> use a PPI). On Linux side, Optee core driver creates an irq
> domain/irqchip triggered on the asynchronous notification. Each device
> which use a wakeup pin need then to request an IRQ on this "Optee irq
> domain".
>
> This OPTEE irq domain will be pushed soon.
I suspect it might make sense to add this WoL part separately from the
actual ethernet DT nodes, so ethernet could land and the WoL
functionality can be added when it is ready ?
next prev parent reply other threads:[~2024-05-16 0:24 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-04-26 12:56 [PATCH v2 00/11] Series to deliver Ethernets for STM32MP13 Christophe Roullier
2024-04-26 12:56 ` [PATCH v2 01/11] dt-bindings: net: add STM32MP13 compatible in documentation for stm32 Christophe Roullier
2024-04-26 14:46 ` Marek Vasut
2024-04-26 19:16 ` Rob Herring
2024-04-26 12:56 ` [PATCH v2 02/11] dt-bindings: net: add phy-supply property " Christophe Roullier
2024-04-26 14:47 ` Marek Vasut
2024-05-13 11:45 ` Christophe ROULLIER
2024-05-13 14:16 ` Marek Vasut
2024-04-26 15:30 ` Rob Herring
2024-05-13 14:06 ` Christophe ROULLIER
2024-05-13 14:20 ` Marek Vasut
2024-04-26 12:56 ` [PATCH v2 03/11] net: stmmac: dwmac-stm32: rework glue to simplify management Christophe Roullier
2024-04-26 14:53 ` Marek Vasut
2024-05-13 12:48 ` Christophe ROULLIER
2024-05-13 14:23 ` Marek Vasut
2024-04-26 12:57 ` [PATCH v2 04/11] net: stmmac: dwmac-stm32: add management of stm32mp13 Christophe Roullier
2024-04-26 12:57 ` [PATCH v2 05/11] net: stmmac: dwmac-stm32: update config management for phy wo cristal Christophe Roullier
2024-04-26 15:37 ` Marek Vasut
2024-05-13 15:11 ` Christophe ROULLIER
2024-05-13 22:33 ` Marek Vasut
2024-04-26 12:57 ` [PATCH v2 06/11] net: stmmac: dwmac-stm32: clean the way to manage wol irqwake Christophe Roullier
2024-04-26 15:40 ` Marek Vasut
2024-05-13 15:14 ` Christophe ROULLIER
2024-04-26 12:57 ` [PATCH v2 07/11] net: stmmac: dwmac-stm32: support the phy-supply regulator binding Christophe Roullier
2024-04-26 15:48 ` Marek Vasut
2024-04-26 12:57 ` [PATCH v2 08/11] ARM: dts: stm32: add ethernet1 and ethernet2 support on stm32mp13 Christophe Roullier
2024-04-26 12:57 ` [PATCH v2 09/11] ARM: dts: stm32: add ethernet1/2 RMII pins for STM32MP13F-DK board Christophe Roullier
2024-04-26 12:57 ` [PATCH v2 10/11] ARM: dts: stm32: add ethernet1 and ethernet2 for STM32MP135F-DK board Christophe Roullier
2024-04-26 15:44 ` Marek Vasut
2024-05-13 16:01 ` Alexandre TORGUE
2024-05-16 0:23 ` Marek Vasut [this message]
2024-05-16 7:58 ` Alexandre TORGUE
2024-05-16 12:22 ` Andrew Lunn
2024-05-17 7:30 ` Alexandre TORGUE
2024-04-26 12:57 ` [PATCH v2 11/11] ARM: multi_v7_defconfig: Add MCP23S08 pinctrl support Christophe Roullier
2024-04-26 14:22 ` [PATCH v2 00/11] Series to deliver Ethernets for STM32MP13 Rob Herring
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