From: Hui Min Mina Chou via ltp <ltp@lists.linux.it>
To: <ltp@lists.linux.it>
Cc: Hui Min Mina Chou <minachou@andestech.com>,
tim609@andestech.com, cynthia@andestech.com, az70021@gmail.com
Subject: [LTP] [RESEND] [PATCH] hugemmap15: Support RISC-V to do __cache_flush.
Date: Thu, 9 May 2024 17:07:17 +0800 [thread overview]
Message-ID: <20240509090717.1342778-1-minachou@andestech.com> (raw)
AndesCore CPU test fails due to an illegal instruction at the first
jumpfunc(), caused by executing incorrect instructions after
self-modifying code.
On RISC-V CPUs, a FENCE.i synchronizes instruction and data streams,
ensuring that subsequent instruction fetch on a RISC-V hart will see
any previous data stores already visible to the same RISC-V hart.
Thus, cacheflush() in the test should also use __clear_cache for RISC-V.
In SMP systems, it invokes the kernel syscall riscv_flush_icache to inform
each hart to flush their local i-caches.
Signed-off-by: Hui Min Mina Chou <minachou@andestech.com>
---
testcases/kernel/mem/hugetlb/hugemmap/hugemmap15.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/testcases/kernel/mem/hugetlb/hugemmap/hugemmap15.c b/testcases/kernel/mem/hugetlb/hugemmap/hugemmap15.c
index 4d198407044a..a84ba6476f1e 100644
--- a/testcases/kernel/mem/hugetlb/hugemmap/hugemmap15.c
+++ b/testcases/kernel/mem/hugetlb/hugemmap/hugemmap15.c
@@ -47,7 +47,7 @@ static void cacheflush(void *p)
{
#if defined(__powerpc__)
asm volatile("dcbst 0,%0; sync; icbi 0,%0; isync" : : "r"(p));
-#elif defined(__arm__) || defined(__aarch64__)
+#elif defined(__arm__) || defined(__aarch64__) || defined(__riscv)
__clear_cache(p, p + COPY_SIZE);
#else
(void)p;
--
2.34.1
--
Mailing list info: https://lists.linux.it/listinfo/ltp
next reply other threads:[~2024-05-09 9:08 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-05-09 9:07 Hui Min Mina Chou via ltp [this message]
2024-05-09 9:54 ` [LTP] [RESEND] [PATCH] hugemmap15: Support RISC-V to do __cache_flush Petr Vorel
2024-05-10 6:37 ` Mina Chou via ltp
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