From: Tiezhu Yang <yangtiezhu@loongson.cn>
To: Huacai Chen <chenhuacai@kernel.org>,
Thomas Gleixner <tglx@linutronix.de>,
Arnd Bergmann <arnd@arndb.de>, Marc Zyngier <maz@kernel.org>
Cc: loongarch@lists.linux.dev, linux-kernel@vger.kernel.org,
loongson-kernel@lists.loongnix.cn
Subject: [PATCH v3 3/4] LoongArch: Save and restore PERCPU_BASE_KS for ACPI S3 state
Date: Thu, 11 Apr 2024 09:05:09 +0800 [thread overview]
Message-ID: <20240411010510.22135-4-yangtiezhu@loongson.cn> (raw)
In-Reply-To: <20240411010510.22135-1-yangtiezhu@loongson.cn>
Currently, per_cpu_offset(x) is defined as __per_cpu_offset[x])
only under CONFIG_SMP in include/asm-generic/percpu.h, that is
to say, the implementation of loongarch_common_resume() which
calls per_cpu_offset(0) is not suitable for the case of non-SMP,
so do not write per_cpu_offset(0) to PERCPU_BASE_KS when resume,
just save the value of PERCPU_BASE_KS when suspend and restore
it when resume to make it work well for both SMP and non-SMP.
Tested with the command "rtcwake -d rtc1 -s 20 -m mem -v", dmesg
shows that "PM: suspend entry (deep)" and "PM: suspend exit".
Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn>
---
arch/loongarch/power/suspend.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/arch/loongarch/power/suspend.c b/arch/loongarch/power/suspend.c
index 166d9e06a64b..7a97949ddade 100644
--- a/arch/loongarch/power/suspend.c
+++ b/arch/loongarch/power/suspend.c
@@ -16,6 +16,7 @@
#include <asm/tlbflush.h>
u64 loongarch_suspend_addr;
+static u64 saved_pcpu_base;
struct saved_registers {
u32 ecfg;
@@ -36,6 +37,7 @@ void loongarch_common_suspend(void)
saved_regs.pwctl1 = csr_read32(LOONGARCH_CSR_PWCTL1);
saved_regs.ecfg = csr_read32(LOONGARCH_CSR_ECFG);
saved_regs.euen = csr_read32(LOONGARCH_CSR_EUEN);
+ saved_pcpu_base = csr_read64(PERCPU_BASE_KS);
loongarch_suspend_addr = loongson_sysconf.suspend_addr;
}
@@ -44,7 +46,7 @@ void loongarch_common_resume(void)
{
sync_counter();
local_flush_tlb_all();
- csr_write64(per_cpu_offset(0), PERCPU_BASE_KS);
+ csr_write64(saved_pcpu_base, PERCPU_BASE_KS);
csr_write64(eentry, LOONGARCH_CSR_EENTRY);
csr_write64(eentry, LOONGARCH_CSR_MERRENTRY);
csr_write64(tlbrentry, LOONGARCH_CSR_TLBRENTRY);
--
2.42.0
next prev parent reply other threads:[~2024-04-11 1:05 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-04-11 1:05 [PATCH v3 0/4] Give chance to build under !CONFIG_SMP for LoongArch Tiezhu Yang
2024-04-11 1:05 ` [PATCH v3 1/4] LoongArch: Move CONFIG_HAVE_SETUP_PER_CPU_AREA related code to smp.c Tiezhu Yang
2024-04-12 4:12 ` Huacai Chen
2024-04-12 9:27 ` Tiezhu Yang
2024-04-13 7:20 ` Huacai Chen
2024-04-11 1:05 ` [PATCH v3 2/4] LoongArch: Refactor get_acpi_id_for_cpu() related code Tiezhu Yang
2024-04-12 4:17 ` Huacai Chen
2024-04-12 9:28 ` Tiezhu Yang
2024-04-11 1:05 ` Tiezhu Yang [this message]
2024-04-12 4:18 ` [PATCH v3 3/4] LoongArch: Save and restore PERCPU_BASE_KS for ACPI S3 state Huacai Chen
2024-04-12 9:30 ` Tiezhu Yang
2024-04-13 7:22 ` Huacai Chen
2024-04-11 1:05 ` [PATCH v3 4/4] LoongArch: Give chance to build under !CONFIG_SMP Tiezhu Yang
2024-04-11 4:26 ` [PATCH v3 0/4] Give chance to build under !CONFIG_SMP for LoongArch Huacai Chen
2024-04-11 6:06 ` Arnd Bergmann
2024-04-12 4:00 ` Huacai Chen
2024-04-18 17:44 ` Xi Ruoyao
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