* [PATCH v2 -next 0/4] RISC-V: ACPI improvements
@ 2023-09-27 17:00 Sunil V L
2023-09-27 17:00 ` [PATCH v2 -next 1/4] RISC-V: ACPI: Enhance acpi_os_ioremap with MMIO remapping Sunil V L
` (3 more replies)
0 siblings, 4 replies; 18+ messages in thread
From: Sunil V L @ 2023-09-27 17:00 UTC (permalink / raw
To: linux-riscv, linux-kernel, linux-acpi
Cc: Paul Walmsley, Palmer Dabbelt, Albert Ou, Rafael J . Wysocki,
Len Brown, Daniel Lezcano, Thomas Gleixner, Andrew Jones,
Conor Dooley, Anup Patel, Ard Biesheuvel, Alexandre Ghiti,
Andy Shevchenko, Atish Kumar Patra, Sunil V L
This series is a set of patches which were originally part of RFC v1 series
[1] to add ACPI support in RISC-V interrupt controllers. Since these
patches are independent of the interrupt controllers, creating this new
series which helps to merge instead of waiting for big series.
This set of patches primarily adds support below ECR [2] which is approved
by the ASWG and adds below features.
- Get CBO block sizes from RHCT on ACPI based systems.
- Set timer_can_not_wakeup in timer driver based on the flag in RHCT.
Additionally, the series contains a patch to improve acpi_os_ioremap().
[1] - https://lore.kernel.org/lkml/20230803175202.3173957-1-sunilvl@ventanamicro.com/
[2] - https://drive.google.com/file/d/1sKbOa8m1UZw1JkquZYe3F1zQBN1xXsaf/view?usp=sharing
Changes since RFC v1:
1) Separated the patches from interrupt controller support series.
2) Addressed feedback from Andy and Drew.
3) Rebased to Palmer's for-next tree.
4) Added RB tags received on RFC v1.
Sunil V L (4):
RISC-V: ACPI: Enhance acpi_os_ioremap with MMIO remapping
RISC-V: ACPI: RHCT: Add function to get CBO block sizes
RISC-V: cacheflush: Initialize CBO variables on ACPI systems
clocksource/timer-riscv: ACPI: Add timer_cannot_wakeup_cpu
arch/riscv/Kconfig | 1 +
arch/riscv/include/asm/acpi.h | 9 ++++
arch/riscv/kernel/acpi.c | 87 ++++++++++++++++++++++++++++++-
arch/riscv/mm/cacheflush.c | 37 ++++++++++---
drivers/acpi/riscv/rhct.c | 72 ++++++++++++++++++++++++-
drivers/clocksource/timer-riscv.c | 4 ++
6 files changed, 201 insertions(+), 9 deletions(-)
--
2.39.2
^ permalink raw reply [flat|nested] 18+ messages in thread
* [PATCH v2 -next 1/4] RISC-V: ACPI: Enhance acpi_os_ioremap with MMIO remapping
2023-09-27 17:00 [PATCH v2 -next 0/4] RISC-V: ACPI improvements Sunil V L
@ 2023-09-27 17:00 ` Sunil V L
2023-10-02 15:53 ` Conor Dooley
2023-10-03 18:53 ` Alexandre Ghiti
2023-09-27 17:00 ` [PATCH v2 -next 2/4] RISC-V: ACPI: RHCT: Add function to get CBO block sizes Sunil V L
` (2 subsequent siblings)
3 siblings, 2 replies; 18+ messages in thread
From: Sunil V L @ 2023-09-27 17:00 UTC (permalink / raw
To: linux-riscv, linux-kernel, linux-acpi
Cc: Paul Walmsley, Palmer Dabbelt, Albert Ou, Rafael J . Wysocki,
Len Brown, Daniel Lezcano, Thomas Gleixner, Andrew Jones,
Conor Dooley, Anup Patel, Ard Biesheuvel, Alexandre Ghiti,
Andy Shevchenko, Atish Kumar Patra, Sunil V L
Enhance the acpi_os_ioremap() to support opregions in MMIO space. Also,
have strict checks using EFI memory map to allow remapping the RAM similar
to arm64.
Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
---
arch/riscv/Kconfig | 1 +
arch/riscv/kernel/acpi.c | 87 +++++++++++++++++++++++++++++++++++++++-
2 files changed, 86 insertions(+), 2 deletions(-)
diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index d607ab0f7c6d..ac039cf8af7a 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -39,6 +39,7 @@ config RISCV
select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
select ARCH_HAS_UBSAN_SANITIZE_ALL
select ARCH_HAS_VDSO_DATA
+ select ARCH_KEEP_MEMBLOCK
select ARCH_OPTIONAL_KERNEL_RWX if ARCH_HAS_STRICT_KERNEL_RWX
select ARCH_OPTIONAL_KERNEL_RWX_DEFAULT
select ARCH_STACKWALK
diff --git a/arch/riscv/kernel/acpi.c b/arch/riscv/kernel/acpi.c
index 56cb2c986c48..e619edc8b0cc 100644
--- a/arch/riscv/kernel/acpi.c
+++ b/arch/riscv/kernel/acpi.c
@@ -14,9 +14,10 @@
*/
#include <linux/acpi.h>
+#include <linux/efi.h>
#include <linux/io.h>
+#include <linux/memblock.h>
#include <linux/pci.h>
-#include <linux/efi.h>
int acpi_noirq = 1; /* skip ACPI IRQ initialization */
int acpi_disabled = 1;
@@ -217,7 +218,89 @@ void __init __acpi_unmap_table(void __iomem *map, unsigned long size)
void __iomem *acpi_os_ioremap(acpi_physical_address phys, acpi_size size)
{
- return (void __iomem *)memremap(phys, size, MEMREMAP_WB);
+ efi_memory_desc_t *md, *region = NULL;
+ pgprot_t prot;
+
+ if (WARN_ON_ONCE(!efi_enabled(EFI_MEMMAP)))
+ return NULL;
+
+ for_each_efi_memory_desc(md) {
+ u64 end = md->phys_addr + (md->num_pages << EFI_PAGE_SHIFT);
+
+ if (phys < md->phys_addr || phys >= end)
+ continue;
+
+ if (phys + size > end) {
+ pr_warn(FW_BUG "requested region covers multiple EFI memory regions\n");
+ return NULL;
+ }
+ region = md;
+ break;
+ }
+
+ /*
+ * It is fine for AML to remap regions that are not represented in the
+ * EFI memory map at all, as it only describes normal memory, and MMIO
+ * regions that require a virtual mapping to make them accessible to
+ * the EFI runtime services.
+ */
+ prot = PAGE_KERNEL_IO;
+ if (region) {
+ switch (region->type) {
+ case EFI_LOADER_CODE:
+ case EFI_LOADER_DATA:
+ case EFI_BOOT_SERVICES_CODE:
+ case EFI_BOOT_SERVICES_DATA:
+ case EFI_CONVENTIONAL_MEMORY:
+ case EFI_PERSISTENT_MEMORY:
+ if (memblock_is_map_memory(phys) ||
+ !memblock_is_region_memory(phys, size)) {
+ pr_warn(FW_BUG "requested region covers kernel memory\n");
+ return NULL;
+ }
+
+ /*
+ * Mapping kernel memory is permitted if the region in
+ * question is covered by a single memblock with the
+ * NOMAP attribute set: this enables the use of ACPI
+ * table overrides passed via initramfs.
+ * This particular use case only requires read access.
+ */
+ fallthrough;
+
+ case EFI_RUNTIME_SERVICES_CODE:
+ /*
+ * This would be unusual, but not problematic per se,
+ * as long as we take care not to create a writable
+ * mapping for executable code.
+ */
+ prot = PAGE_KERNEL_RO;
+ break;
+
+ case EFI_ACPI_RECLAIM_MEMORY:
+ /*
+ * ACPI reclaim memory is used to pass firmware tables
+ * and other data that is intended for consumption by
+ * the OS only, which may decide it wants to reclaim
+ * that memory and use it for something else. We never
+ * do that, but we usually add it to the linear map
+ * anyway, in which case we should use the existing
+ * mapping.
+ */
+ if (memblock_is_map_memory(phys))
+ return (void __iomem *)__va(phys);
+ fallthrough;
+
+ default:
+ if (region->attribute & EFI_MEMORY_WB)
+ prot = PAGE_KERNEL;
+ else if ((region->attribute & EFI_MEMORY_WC) ||
+ (region->attribute & EFI_MEMORY_WT))
+ prot = pgprot_writecombine(PAGE_KERNEL);
+ }
+ }
+
+ return ioremap_prot(phys, size, pgprot_val(prot));
}
#ifdef CONFIG_PCI
--
2.39.2
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH v2 -next 2/4] RISC-V: ACPI: RHCT: Add function to get CBO block sizes
2023-09-27 17:00 [PATCH v2 -next 0/4] RISC-V: ACPI improvements Sunil V L
2023-09-27 17:00 ` [PATCH v2 -next 1/4] RISC-V: ACPI: Enhance acpi_os_ioremap with MMIO remapping Sunil V L
@ 2023-09-27 17:00 ` Sunil V L
2023-09-27 17:00 ` [PATCH v2 -next 3/4] RISC-V: cacheflush: Initialize CBO variables on ACPI systems Sunil V L
2023-09-27 17:00 ` [PATCH v2 -next 4/4] clocksource/timer-riscv: ACPI: Add timer_cannot_wakeup_cpu Sunil V L
3 siblings, 0 replies; 18+ messages in thread
From: Sunil V L @ 2023-09-27 17:00 UTC (permalink / raw
To: linux-riscv, linux-kernel, linux-acpi
Cc: Paul Walmsley, Palmer Dabbelt, Albert Ou, Rafael J . Wysocki,
Len Brown, Daniel Lezcano, Thomas Gleixner, Andrew Jones,
Conor Dooley, Anup Patel, Ard Biesheuvel, Alexandre Ghiti,
Andy Shevchenko, Atish Kumar Patra, Sunil V L
Cache Block Operation (CBO) related block size in ACPI is provided by RHCT.
Add support to read the CMO node in RHCT to get this information.
Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
---
arch/riscv/include/asm/acpi.h | 9 +++++
drivers/acpi/riscv/rhct.c | 72 ++++++++++++++++++++++++++++++++++-
2 files changed, 80 insertions(+), 1 deletion(-)
diff --git a/arch/riscv/include/asm/acpi.h b/arch/riscv/include/asm/acpi.h
index d5604d2073bc..0c4e8b35103e 100644
--- a/arch/riscv/include/asm/acpi.h
+++ b/arch/riscv/include/asm/acpi.h
@@ -66,6 +66,8 @@ int acpi_get_riscv_isa(struct acpi_table_header *table,
unsigned int cpu, const char **isa);
static inline int acpi_numa_get_nid(unsigned int cpu) { return NUMA_NO_NODE; }
+int acpi_get_cbo_block_size(struct acpi_table_header *table, unsigned int cpu, u32 *cbom_size,
+ u32 *cboz_size, u32 *cbop_size);
#else
static inline void acpi_init_rintc_map(void) { }
static inline struct acpi_madt_rintc *acpi_cpu_get_madt_rintc(int cpu)
@@ -79,6 +81,13 @@ static inline int acpi_get_riscv_isa(struct acpi_table_header *table,
return -EINVAL;
}
+static inline int acpi_get_cbo_block_size(struct acpi_table_header *table,
+ unsigned int cpu, u32 *cbom_size,
+ u32 *cboz_size, u32 *cbop_size)
+{
+ return -EINVAL;
+}
+
#endif /* CONFIG_ACPI */
#endif /*_ASM_ACPI_H*/
diff --git a/drivers/acpi/riscv/rhct.c b/drivers/acpi/riscv/rhct.c
index b280b3e9c7d9..9042949277f8 100644
--- a/drivers/acpi/riscv/rhct.c
+++ b/drivers/acpi/riscv/rhct.c
@@ -8,6 +8,7 @@
#define pr_fmt(fmt) "ACPI: RHCT: " fmt
#include <linux/acpi.h>
+#include <linux/bits.h>
static struct acpi_table_header *acpi_get_rhct(void)
{
@@ -56,7 +57,6 @@ int acpi_get_riscv_isa(struct acpi_table_header *table, unsigned int cpu, const
}
end = ACPI_ADD_PTR(struct acpi_rhct_node_header, rhct, rhct->header.length);
-
for (node = ACPI_ADD_PTR(struct acpi_rhct_node_header, rhct, rhct->node_offset);
node < end;
node = ACPI_ADD_PTR(struct acpi_rhct_node_header, node, node->length)) {
@@ -81,3 +81,73 @@ int acpi_get_riscv_isa(struct acpi_table_header *table, unsigned int cpu, const
return -1;
}
+
+/*
+ * During early boot, the caller should call acpi_get_table() and pass its pointer to
+ * these functions(and free up later). At run time, since this table can be used
+ * multiple times, pass NULL so that the table remains in memory
+ */
+int acpi_get_cbo_block_size(struct acpi_table_header *table, unsigned int cpu,
+ u32 *cbom_size, u32 *cboz_size, u32 *cbop_size)
+{
+ struct acpi_rhct_node_header *node, *ref_node, *end;
+ u32 size_hdr = sizeof(struct acpi_rhct_node_header);
+ u32 size_hartinfo = sizeof(struct acpi_rhct_hart_info);
+ struct acpi_rhct_hart_info *hart_info;
+ struct acpi_rhct_cmo_node *cmo_node;
+ struct acpi_table_rhct *rhct;
+ u32 *hart_info_node_offset;
+ u32 acpi_cpu_id = get_acpi_id_for_cpu(cpu);
+
+ BUG_ON(acpi_disabled);
+
+ if (table) {
+ rhct = (struct acpi_table_rhct *)table;
+ } else {
+ rhct = (struct acpi_table_rhct *)acpi_get_rhct();
+ if (!rhct)
+ return -ENOENT;
+ }
+
+ end = ACPI_ADD_PTR(struct acpi_rhct_node_header, rhct, rhct->header.length);
+ for (node = ACPI_ADD_PTR(struct acpi_rhct_node_header, rhct, rhct->node_offset);
+ node < end;
+ node = ACPI_ADD_PTR(struct acpi_rhct_node_header, node, node->length)) {
+ if (node->type == ACPI_RHCT_NODE_TYPE_HART_INFO) {
+ hart_info = ACPI_ADD_PTR(struct acpi_rhct_hart_info, node, size_hdr);
+ hart_info_node_offset = ACPI_ADD_PTR(u32, hart_info, size_hartinfo);
+ if (acpi_cpu_id != hart_info->uid)
+ continue;
+
+ for (int i = 0; i < hart_info->num_offsets; i++) {
+ ref_node = ACPI_ADD_PTR(struct acpi_rhct_node_header,
+ rhct, hart_info_node_offset[i]);
+ if (ref_node->type == ACPI_RHCT_NODE_TYPE_CMO) {
+ cmo_node = ACPI_ADD_PTR(struct acpi_rhct_cmo_node,
+ ref_node, size_hdr);
+ if (cbom_size && cmo_node->cbom_size <= 30)
+ *cbom_size = BIT(cmo_node->cbom_size);
+
+ if (cboz_size && cmo_node->cboz_size <= 30)
+ *cboz_size = BIT(cmo_node->cboz_size);
+
+ if (cbop_size && cmo_node->cbop_size <= 30)
+ *cbop_size = BIT(cmo_node->cbop_size);
+
+ return 0;
+ }
+ }
+ }
+ }
+
+ if (cbom_size)
+ *cbom_size = 0;
+
+ if (cboz_size)
+ *cboz_size = 0;
+
+ if (cbop_size)
+ *cbop_size = 0;
+
+ return -ENOENT;
+}
--
2.39.2
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH v2 -next 3/4] RISC-V: cacheflush: Initialize CBO variables on ACPI systems
2023-09-27 17:00 [PATCH v2 -next 0/4] RISC-V: ACPI improvements Sunil V L
2023-09-27 17:00 ` [PATCH v2 -next 1/4] RISC-V: ACPI: Enhance acpi_os_ioremap with MMIO remapping Sunil V L
2023-09-27 17:00 ` [PATCH v2 -next 2/4] RISC-V: ACPI: RHCT: Add function to get CBO block sizes Sunil V L
@ 2023-09-27 17:00 ` Sunil V L
2023-10-02 15:50 ` Conor Dooley
2023-10-03 19:50 ` Samuel Holland
2023-09-27 17:00 ` [PATCH v2 -next 4/4] clocksource/timer-riscv: ACPI: Add timer_cannot_wakeup_cpu Sunil V L
3 siblings, 2 replies; 18+ messages in thread
From: Sunil V L @ 2023-09-27 17:00 UTC (permalink / raw
To: linux-riscv, linux-kernel, linux-acpi
Cc: Paul Walmsley, Palmer Dabbelt, Albert Ou, Rafael J . Wysocki,
Len Brown, Daniel Lezcano, Thomas Gleixner, Andrew Jones,
Conor Dooley, Anup Patel, Ard Biesheuvel, Alexandre Ghiti,
Andy Shevchenko, Atish Kumar Patra, Sunil V L
Using new interface to get the CBO block size information in RHCT,
initialize the variables on ACPI platforms.
Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
---
arch/riscv/mm/cacheflush.c | 37 +++++++++++++++++++++++++++++++------
1 file changed, 31 insertions(+), 6 deletions(-)
diff --git a/arch/riscv/mm/cacheflush.c b/arch/riscv/mm/cacheflush.c
index f1387272a551..8e59644e473c 100644
--- a/arch/riscv/mm/cacheflush.c
+++ b/arch/riscv/mm/cacheflush.c
@@ -3,7 +3,9 @@
* Copyright (C) 2017 SiFive
*/
+#include <linux/acpi.h>
#include <linux/of.h>
+#include <asm/acpi.h>
#include <asm/cacheflush.h>
#ifdef CONFIG_SMP
@@ -124,15 +126,38 @@ void __init riscv_init_cbo_blocksizes(void)
unsigned long cbom_hartid, cboz_hartid;
u32 cbom_block_size = 0, cboz_block_size = 0;
struct device_node *node;
+ struct acpi_table_header *rhct;
+ acpi_status status;
+ unsigned int cpu;
+
+ if (!acpi_disabled) {
+ status = acpi_get_table(ACPI_SIG_RHCT, 0, &rhct);
+ if (ACPI_FAILURE(status))
+ return;
+ }
- for_each_of_cpu_node(node) {
- /* set block-size for cbom and/or cboz extension if available */
- cbo_get_block_size(node, "riscv,cbom-block-size",
- &cbom_block_size, &cbom_hartid);
- cbo_get_block_size(node, "riscv,cboz-block-size",
- &cboz_block_size, &cboz_hartid);
+ for_each_possible_cpu(cpu) {
+ if (acpi_disabled) {
+ node = of_cpu_device_node_get(cpu);
+ if (!node) {
+ pr_warn("Unable to find cpu node\n");
+ continue;
+ }
+
+ /* set block-size for cbom and/or cboz extension if available */
+ cbo_get_block_size(node, "riscv,cbom-block-size",
+ &cbom_block_size, &cbom_hartid);
+ cbo_get_block_size(node, "riscv,cboz-block-size",
+ &cboz_block_size, &cboz_hartid);
+ } else {
+ acpi_get_cbo_block_size(rhct, cpu, &cbom_block_size,
+ &cboz_block_size, NULL);
+ }
}
+ if (!acpi_disabled && rhct)
+ acpi_put_table((struct acpi_table_header *)rhct);
+
if (cbom_block_size)
riscv_cbom_block_size = cbom_block_size;
--
2.39.2
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH v2 -next 4/4] clocksource/timer-riscv: ACPI: Add timer_cannot_wakeup_cpu
2023-09-27 17:00 [PATCH v2 -next 0/4] RISC-V: ACPI improvements Sunil V L
` (2 preceding siblings ...)
2023-09-27 17:00 ` [PATCH v2 -next 3/4] RISC-V: cacheflush: Initialize CBO variables on ACPI systems Sunil V L
@ 2023-09-27 17:00 ` Sunil V L
2023-09-27 20:15 ` Samuel Holland
` (4 more replies)
3 siblings, 5 replies; 18+ messages in thread
From: Sunil V L @ 2023-09-27 17:00 UTC (permalink / raw
To: linux-riscv, linux-kernel, linux-acpi
Cc: Paul Walmsley, Palmer Dabbelt, Albert Ou, Rafael J . Wysocki,
Len Brown, Daniel Lezcano, Thomas Gleixner, Andrew Jones,
Conor Dooley, Anup Patel, Ard Biesheuvel, Alexandre Ghiti,
Andy Shevchenko, Atish Kumar Patra, Sunil V L
The timer capability to wakeup the cpu irrespective of its idle state is
provided by the flag in RHCT. Update the timer code to set this flag.
Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
---
drivers/clocksource/timer-riscv.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/clocksource/timer-riscv.c b/drivers/clocksource/timer-riscv.c
index 9c8f3e2decc2..06f5bad3c3e0 100644
--- a/drivers/clocksource/timer-riscv.c
+++ b/drivers/clocksource/timer-riscv.c
@@ -225,6 +225,10 @@ TIMER_OF_DECLARE(riscv_timer, "riscv", riscv_timer_init_dt);
#ifdef CONFIG_ACPI
static int __init riscv_timer_acpi_init(struct acpi_table_header *table)
{
+ struct acpi_table_rhct *rhct = (struct acpi_table_rhct *)table;
+
+ riscv_timer_cannot_wake_cpu = rhct->flags & ACPI_RHCT_TIMER_CANNOT_WAKEUP_CPU;
+
return riscv_timer_init_common();
}
--
2.39.2
^ permalink raw reply related [flat|nested] 18+ messages in thread
* Re: [PATCH v2 -next 4/4] clocksource/timer-riscv: ACPI: Add timer_cannot_wakeup_cpu
2023-09-27 17:00 ` [PATCH v2 -next 4/4] clocksource/timer-riscv: ACPI: Add timer_cannot_wakeup_cpu Sunil V L
@ 2023-09-27 20:15 ` Samuel Holland
2023-10-02 15:46 ` Conor Dooley
` (3 subsequent siblings)
4 siblings, 0 replies; 18+ messages in thread
From: Samuel Holland @ 2023-09-27 20:15 UTC (permalink / raw
To: Sunil V L
Cc: Anup Patel, Albert Ou, Alexandre Ghiti, Rafael J . Wysocki,
Daniel Lezcano, Atish Kumar Patra, Andy Shevchenko, Conor Dooley,
Palmer Dabbelt, Paul Walmsley, Thomas Gleixner, Andrew Jones,
Ard Biesheuvel, Len Brown, linux-riscv, linux-kernel, linux-acpi
On 2023-09-27 12:00 PM, Sunil V L wrote:
> The timer capability to wakeup the cpu irrespective of its idle state is
> provided by the flag in RHCT. Update the timer code to set this flag.
>
> Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
> ---
> drivers/clocksource/timer-riscv.c | 4 ++++
> 1 file changed, 4 insertions(+)
Reviewed-by: Samuel Holland <samuel.holland@sifive.com>
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH v2 -next 4/4] clocksource/timer-riscv: ACPI: Add timer_cannot_wakeup_cpu
2023-09-27 17:00 ` [PATCH v2 -next 4/4] clocksource/timer-riscv: ACPI: Add timer_cannot_wakeup_cpu Sunil V L
2023-09-27 20:15 ` Samuel Holland
@ 2023-10-02 15:46 ` Conor Dooley
2023-10-04 8:38 ` Andrew Jones
` (2 subsequent siblings)
4 siblings, 0 replies; 18+ messages in thread
From: Conor Dooley @ 2023-10-02 15:46 UTC (permalink / raw
To: Sunil V L
Cc: linux-riscv, linux-kernel, linux-acpi, Anup Patel, Albert Ou,
Alexandre Ghiti, Rafael J . Wysocki, Daniel Lezcano,
Atish Kumar Patra, Andy Shevchenko, Conor Dooley, Palmer Dabbelt,
Paul Walmsley, Thomas Gleixner, Andrew Jones, Ard Biesheuvel,
Len Brown
[-- Attachment #1: Type: text/plain, Size: 1258 bytes --]
On Wed, Sep 27, 2023 at 10:30:15PM +0530, Sunil V L wrote:
> The timer capability to wakeup the cpu irrespective of its idle state is
> provided by the flag in RHCT. Update the timer code to set this flag.
>
> Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Thanks,
Conor.
> ---
> drivers/clocksource/timer-riscv.c | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/drivers/clocksource/timer-riscv.c b/drivers/clocksource/timer-riscv.c
> index 9c8f3e2decc2..06f5bad3c3e0 100644
> --- a/drivers/clocksource/timer-riscv.c
> +++ b/drivers/clocksource/timer-riscv.c
> @@ -225,6 +225,10 @@ TIMER_OF_DECLARE(riscv_timer, "riscv", riscv_timer_init_dt);
> #ifdef CONFIG_ACPI
> static int __init riscv_timer_acpi_init(struct acpi_table_header *table)
> {
> + struct acpi_table_rhct *rhct = (struct acpi_table_rhct *)table;
> +
> + riscv_timer_cannot_wake_cpu = rhct->flags & ACPI_RHCT_TIMER_CANNOT_WAKEUP_CPU;
> +
> return riscv_timer_init_common();
> }
>
> --
> 2.39.2
>
>
> _______________________________________________
> linux-riscv mailing list
> linux-riscv@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-riscv
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH v2 -next 3/4] RISC-V: cacheflush: Initialize CBO variables on ACPI systems
2023-09-27 17:00 ` [PATCH v2 -next 3/4] RISC-V: cacheflush: Initialize CBO variables on ACPI systems Sunil V L
@ 2023-10-02 15:50 ` Conor Dooley
2023-10-03 19:50 ` Samuel Holland
1 sibling, 0 replies; 18+ messages in thread
From: Conor Dooley @ 2023-10-02 15:50 UTC (permalink / raw
To: Sunil V L
Cc: linux-riscv, linux-kernel, linux-acpi, Paul Walmsley,
Palmer Dabbelt, Albert Ou, Rafael J . Wysocki, Len Brown,
Daniel Lezcano, Thomas Gleixner, Andrew Jones, Conor Dooley,
Anup Patel, Ard Biesheuvel, Alexandre Ghiti, Andy Shevchenko,
Atish Kumar Patra
[-- Attachment #1: Type: text/plain, Size: 2388 bytes --]
On Wed, Sep 27, 2023 at 10:30:14PM +0530, Sunil V L wrote:
> Using new interface to get the CBO block size information in RHCT,
> initialize the variables on ACPI platforms.
>
> Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
Otherwise,
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Thanks,
Conor.
> ---
> arch/riscv/mm/cacheflush.c | 37 +++++++++++++++++++++++++++++++------
> 1 file changed, 31 insertions(+), 6 deletions(-)
>
> diff --git a/arch/riscv/mm/cacheflush.c b/arch/riscv/mm/cacheflush.c
> index f1387272a551..8e59644e473c 100644
> --- a/arch/riscv/mm/cacheflush.c
> +++ b/arch/riscv/mm/cacheflush.c
> @@ -3,7 +3,9 @@
> * Copyright (C) 2017 SiFive
> */
>
> +#include <linux/acpi.h>
> #include <linux/of.h>
> +#include <asm/acpi.h>
> #include <asm/cacheflush.h>
>
> #ifdef CONFIG_SMP
> @@ -124,15 +126,38 @@ void __init riscv_init_cbo_blocksizes(void)
> unsigned long cbom_hartid, cboz_hartid;
> u32 cbom_block_size = 0, cboz_block_size = 0;
> struct device_node *node;
> + struct acpi_table_header *rhct;
> + acpi_status status;
> + unsigned int cpu;
> +
> + if (!acpi_disabled) {
> + status = acpi_get_table(ACPI_SIG_RHCT, 0, &rhct);
> + if (ACPI_FAILURE(status))
> + return;
> + }
>
> - for_each_of_cpu_node(node) {
> - /* set block-size for cbom and/or cboz extension if available */
> - cbo_get_block_size(node, "riscv,cbom-block-size",
> - &cbom_block_size, &cbom_hartid);
> - cbo_get_block_size(node, "riscv,cboz-block-size",
> - &cboz_block_size, &cboz_hartid);
> + for_each_possible_cpu(cpu) {
> + if (acpi_disabled) {
> + node = of_cpu_device_node_get(cpu);
> + if (!node) {
> + pr_warn("Unable to find cpu node\n");
> + continue;
> + }
> +
> + /* set block-size for cbom and/or cboz extension if available */
> + cbo_get_block_size(node, "riscv,cbom-block-size",
> + &cbom_block_size, &cbom_hartid);
> + cbo_get_block_size(node, "riscv,cboz-block-size",
> + &cboz_block_size, &cboz_hartid);
> + } else {
> + acpi_get_cbo_block_size(rhct, cpu, &cbom_block_size,
> + &cboz_block_size, NULL);
> + }
> }
>
> + if (!acpi_disabled && rhct)
> + acpi_put_table((struct acpi_table_header *)rhct);
> +
> if (cbom_block_size)
> riscv_cbom_block_size = cbom_block_size;
>
> --
> 2.39.2
>
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH v2 -next 1/4] RISC-V: ACPI: Enhance acpi_os_ioremap with MMIO remapping
2023-09-27 17:00 ` [PATCH v2 -next 1/4] RISC-V: ACPI: Enhance acpi_os_ioremap with MMIO remapping Sunil V L
@ 2023-10-02 15:53 ` Conor Dooley
2023-10-03 18:53 ` Alexandre Ghiti
1 sibling, 0 replies; 18+ messages in thread
From: Conor Dooley @ 2023-10-02 15:53 UTC (permalink / raw
To: Sunil V L
Cc: linux-riscv, linux-kernel, linux-acpi, Paul Walmsley,
Palmer Dabbelt, Albert Ou, Rafael J . Wysocki, Len Brown,
Daniel Lezcano, Thomas Gleixner, Andrew Jones, Conor Dooley,
Anup Patel, Ard Biesheuvel, Alexandre Ghiti, Andy Shevchenko,
Atish Kumar Patra
[-- Attachment #1: Type: text/plain, Size: 4710 bytes --]
On Wed, Sep 27, 2023 at 10:30:12PM +0530, Sunil V L wrote:
> Enhance the acpi_os_ioremap() to support opregions in MMIO space. Also,
> have strict checks using EFI memory map to allow remapping the RAM similar
> to arm64.
>
> Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
> Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Thanks for resending this. If you respin, I think it would be worth
mentioning here that you are aligning things with arm64.
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Cheer,
Conor.
> ---
> arch/riscv/Kconfig | 1 +
> arch/riscv/kernel/acpi.c | 87 +++++++++++++++++++++++++++++++++++++++-
> 2 files changed, 86 insertions(+), 2 deletions(-)
>
> diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
> index d607ab0f7c6d..ac039cf8af7a 100644
> --- a/arch/riscv/Kconfig
> +++ b/arch/riscv/Kconfig
> @@ -39,6 +39,7 @@ config RISCV
> select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
> select ARCH_HAS_UBSAN_SANITIZE_ALL
> select ARCH_HAS_VDSO_DATA
> + select ARCH_KEEP_MEMBLOCK
> select ARCH_OPTIONAL_KERNEL_RWX if ARCH_HAS_STRICT_KERNEL_RWX
> select ARCH_OPTIONAL_KERNEL_RWX_DEFAULT
> select ARCH_STACKWALK
> diff --git a/arch/riscv/kernel/acpi.c b/arch/riscv/kernel/acpi.c
> index 56cb2c986c48..e619edc8b0cc 100644
> --- a/arch/riscv/kernel/acpi.c
> +++ b/arch/riscv/kernel/acpi.c
> @@ -14,9 +14,10 @@
> */
>
> #include <linux/acpi.h>
> +#include <linux/efi.h>
> #include <linux/io.h>
> +#include <linux/memblock.h>
> #include <linux/pci.h>
> -#include <linux/efi.h>
>
> int acpi_noirq = 1; /* skip ACPI IRQ initialization */
> int acpi_disabled = 1;
> @@ -217,7 +218,89 @@ void __init __acpi_unmap_table(void __iomem *map, unsigned long size)
>
> void __iomem *acpi_os_ioremap(acpi_physical_address phys, acpi_size size)
> {
> - return (void __iomem *)memremap(phys, size, MEMREMAP_WB);
> + efi_memory_desc_t *md, *region = NULL;
> + pgprot_t prot;
> +
> + if (WARN_ON_ONCE(!efi_enabled(EFI_MEMMAP)))
> + return NULL;
> +
> + for_each_efi_memory_desc(md) {
> + u64 end = md->phys_addr + (md->num_pages << EFI_PAGE_SHIFT);
> +
> + if (phys < md->phys_addr || phys >= end)
> + continue;
> +
> + if (phys + size > end) {
> + pr_warn(FW_BUG "requested region covers multiple EFI memory regions\n");
> + return NULL;
> + }
> + region = md;
> + break;
> + }
> +
> + /*
> + * It is fine for AML to remap regions that are not represented in the
> + * EFI memory map at all, as it only describes normal memory, and MMIO
> + * regions that require a virtual mapping to make them accessible to
> + * the EFI runtime services.
> + */
> + prot = PAGE_KERNEL_IO;
> + if (region) {
> + switch (region->type) {
> + case EFI_LOADER_CODE:
> + case EFI_LOADER_DATA:
> + case EFI_BOOT_SERVICES_CODE:
> + case EFI_BOOT_SERVICES_DATA:
> + case EFI_CONVENTIONAL_MEMORY:
> + case EFI_PERSISTENT_MEMORY:
> + if (memblock_is_map_memory(phys) ||
> + !memblock_is_region_memory(phys, size)) {
> + pr_warn(FW_BUG "requested region covers kernel memory\n");
> + return NULL;
> + }
> +
> + /*
> + * Mapping kernel memory is permitted if the region in
> + * question is covered by a single memblock with the
> + * NOMAP attribute set: this enables the use of ACPI
> + * table overrides passed via initramfs.
> + * This particular use case only requires read access.
> + */
> + fallthrough;
> +
> + case EFI_RUNTIME_SERVICES_CODE:
> + /*
> + * This would be unusual, but not problematic per se,
> + * as long as we take care not to create a writable
> + * mapping for executable code.
> + */
> + prot = PAGE_KERNEL_RO;
> + break;
> +
> + case EFI_ACPI_RECLAIM_MEMORY:
> + /*
> + * ACPI reclaim memory is used to pass firmware tables
> + * and other data that is intended for consumption by
> + * the OS only, which may decide it wants to reclaim
> + * that memory and use it for something else. We never
> + * do that, but we usually add it to the linear map
> + * anyway, in which case we should use the existing
> + * mapping.
> + */
> + if (memblock_is_map_memory(phys))
> + return (void __iomem *)__va(phys);
> + fallthrough;
> +
> + default:
> + if (region->attribute & EFI_MEMORY_WB)
> + prot = PAGE_KERNEL;
> + else if ((region->attribute & EFI_MEMORY_WC) ||
> + (region->attribute & EFI_MEMORY_WT))
> + prot = pgprot_writecombine(PAGE_KERNEL);
> + }
> + }
> +
> + return ioremap_prot(phys, size, pgprot_val(prot));
> }
>
> #ifdef CONFIG_PCI
> --
> 2.39.2
>
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH v2 -next 1/4] RISC-V: ACPI: Enhance acpi_os_ioremap with MMIO remapping
2023-09-27 17:00 ` [PATCH v2 -next 1/4] RISC-V: ACPI: Enhance acpi_os_ioremap with MMIO remapping Sunil V L
2023-10-02 15:53 ` Conor Dooley
@ 2023-10-03 18:53 ` Alexandre Ghiti
2023-10-04 10:33 ` Sunil V L
1 sibling, 1 reply; 18+ messages in thread
From: Alexandre Ghiti @ 2023-10-03 18:53 UTC (permalink / raw
To: Sunil V L
Cc: linux-riscv, linux-kernel, linux-acpi, Paul Walmsley,
Palmer Dabbelt, Albert Ou, Rafael J . Wysocki, Len Brown,
Daniel Lezcano, Thomas Gleixner, Andrew Jones, Conor Dooley,
Anup Patel, Ard Biesheuvel, Andy Shevchenko, Atish Kumar Patra
Hi Sunil,
On Wed, Sep 27, 2023 at 7:00 PM Sunil V L <sunilvl@ventanamicro.com> wrote:
>
> Enhance the acpi_os_ioremap() to support opregions in MMIO space. Also,
> have strict checks using EFI memory map to allow remapping the RAM similar
> to arm64.
>
> Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
> Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
> ---
> arch/riscv/Kconfig | 1 +
> arch/riscv/kernel/acpi.c | 87 +++++++++++++++++++++++++++++++++++++++-
> 2 files changed, 86 insertions(+), 2 deletions(-)
>
> diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
> index d607ab0f7c6d..ac039cf8af7a 100644
> --- a/arch/riscv/Kconfig
> +++ b/arch/riscv/Kconfig
> @@ -39,6 +39,7 @@ config RISCV
> select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
> select ARCH_HAS_UBSAN_SANITIZE_ALL
> select ARCH_HAS_VDSO_DATA
> + select ARCH_KEEP_MEMBLOCK
Shouldn't we restrict this to ACPI?
> select ARCH_OPTIONAL_KERNEL_RWX if ARCH_HAS_STRICT_KERNEL_RWX
> select ARCH_OPTIONAL_KERNEL_RWX_DEFAULT
> select ARCH_STACKWALK
> diff --git a/arch/riscv/kernel/acpi.c b/arch/riscv/kernel/acpi.c
> index 56cb2c986c48..e619edc8b0cc 100644
> --- a/arch/riscv/kernel/acpi.c
> +++ b/arch/riscv/kernel/acpi.c
> @@ -14,9 +14,10 @@
> */
>
> #include <linux/acpi.h>
> +#include <linux/efi.h>
> #include <linux/io.h>
> +#include <linux/memblock.h>
> #include <linux/pci.h>
> -#include <linux/efi.h>
>
> int acpi_noirq = 1; /* skip ACPI IRQ initialization */
> int acpi_disabled = 1;
> @@ -217,7 +218,89 @@ void __init __acpi_unmap_table(void __iomem *map, unsigned long size)
>
> void __iomem *acpi_os_ioremap(acpi_physical_address phys, acpi_size size)
> {
> - return (void __iomem *)memremap(phys, size, MEMREMAP_WB);
> + efi_memory_desc_t *md, *region = NULL;
> + pgprot_t prot;
> +
> + if (WARN_ON_ONCE(!efi_enabled(EFI_MEMMAP)))
> + return NULL;
> +
> + for_each_efi_memory_desc(md) {
> + u64 end = md->phys_addr + (md->num_pages << EFI_PAGE_SHIFT);
> +
> + if (phys < md->phys_addr || phys >= end)
> + continue;
> +
> + if (phys + size > end) {
> + pr_warn(FW_BUG "requested region covers multiple EFI memory regions\n");
> + return NULL;
> + }
> + region = md;
> + break;
> + }
> +
> + /*
> + * It is fine for AML to remap regions that are not represented in the
> + * EFI memory map at all, as it only describes normal memory, and MMIO
> + * regions that require a virtual mapping to make them accessible to
> + * the EFI runtime services.
> + */
> + prot = PAGE_KERNEL_IO;
> + if (region) {
> + switch (region->type) {
> + case EFI_LOADER_CODE:
> + case EFI_LOADER_DATA:
> + case EFI_BOOT_SERVICES_CODE:
> + case EFI_BOOT_SERVICES_DATA:
> + case EFI_CONVENTIONAL_MEMORY:
> + case EFI_PERSISTENT_MEMORY:
> + if (memblock_is_map_memory(phys) ||
> + !memblock_is_region_memory(phys, size)) {
> + pr_warn(FW_BUG "requested region covers kernel memory\n");
> + return NULL;
> + }
> +
> + /*
> + * Mapping kernel memory is permitted if the region in
> + * question is covered by a single memblock with the
> + * NOMAP attribute set: this enables the use of ACPI
> + * table overrides passed via initramfs.
> + * This particular use case only requires read access.
> + */
> + fallthrough;
> +
> + case EFI_RUNTIME_SERVICES_CODE:
> + /*
> + * This would be unusual, but not problematic per se,
> + * as long as we take care not to create a writable
> + * mapping for executable code.
> + */
> + prot = PAGE_KERNEL_RO;
> + break;
> +
> + case EFI_ACPI_RECLAIM_MEMORY:
> + /*
> + * ACPI reclaim memory is used to pass firmware tables
> + * and other data that is intended for consumption by
> + * the OS only, which may decide it wants to reclaim
> + * that memory and use it for something else. We never
> + * do that, but we usually add it to the linear map
> + * anyway, in which case we should use the existing
> + * mapping.
> + */
> + if (memblock_is_map_memory(phys))
> + return (void __iomem *)__va(phys);
> + fallthrough;
> +
> + default:
> + if (region->attribute & EFI_MEMORY_WB)
> + prot = PAGE_KERNEL;
> + else if ((region->attribute & EFI_MEMORY_WC) ||
> + (region->attribute & EFI_MEMORY_WT))
> + prot = pgprot_writecombine(PAGE_KERNEL);
I have to ask: why is write-through mapped to write-combined here?
> + }
> + }
> +
> + return ioremap_prot(phys, size, pgprot_val(prot));
> }
>
> #ifdef CONFIG_PCI
> --
> 2.39.2
>
Like Andrew said in v1, too bad we can't merge that with arm64 instead
of duplicating.
But otherwise, you can add:
Reviewed-by: Alexandre Ghiti <alexghiti@rivosinc.com>
Thanks,
Alex
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH v2 -next 3/4] RISC-V: cacheflush: Initialize CBO variables on ACPI systems
2023-09-27 17:00 ` [PATCH v2 -next 3/4] RISC-V: cacheflush: Initialize CBO variables on ACPI systems Sunil V L
2023-10-02 15:50 ` Conor Dooley
@ 2023-10-03 19:50 ` Samuel Holland
2023-10-04 4:22 ` Sunil V L
1 sibling, 1 reply; 18+ messages in thread
From: Samuel Holland @ 2023-10-03 19:50 UTC (permalink / raw
To: Sunil V L, linux-riscv, linux-kernel, linux-acpi
Cc: Anup Patel, Albert Ou, Alexandre Ghiti, Rafael J . Wysocki,
Daniel Lezcano, Atish Kumar Patra, Andy Shevchenko, Conor Dooley,
Palmer Dabbelt, Paul Walmsley, Thomas Gleixner, Andrew Jones,
Ard Biesheuvel, Len Brown
On 2023-09-27 12:00 PM, Sunil V L wrote:
> Using new interface to get the CBO block size information in RHCT,
> initialize the variables on ACPI platforms.
>
> Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
> ---
> arch/riscv/mm/cacheflush.c | 37 +++++++++++++++++++++++++++++++------
> 1 file changed, 31 insertions(+), 6 deletions(-)
>
> diff --git a/arch/riscv/mm/cacheflush.c b/arch/riscv/mm/cacheflush.c
> index f1387272a551..8e59644e473c 100644
> --- a/arch/riscv/mm/cacheflush.c
> +++ b/arch/riscv/mm/cacheflush.c
> @@ -3,7 +3,9 @@
> * Copyright (C) 2017 SiFive
> */
>
> +#include <linux/acpi.h>
> #include <linux/of.h>
> +#include <asm/acpi.h>
> #include <asm/cacheflush.h>
>
> #ifdef CONFIG_SMP
> @@ -124,15 +126,38 @@ void __init riscv_init_cbo_blocksizes(void)
> unsigned long cbom_hartid, cboz_hartid;
> u32 cbom_block_size = 0, cboz_block_size = 0;
> struct device_node *node;
> + struct acpi_table_header *rhct;
> + acpi_status status;
> + unsigned int cpu;
> +
> + if (!acpi_disabled) {
> + status = acpi_get_table(ACPI_SIG_RHCT, 0, &rhct);
> + if (ACPI_FAILURE(status))
> + return;
> + }
>
> - for_each_of_cpu_node(node) {
> - /* set block-size for cbom and/or cboz extension if available */
> - cbo_get_block_size(node, "riscv,cbom-block-size",
> - &cbom_block_size, &cbom_hartid);
> - cbo_get_block_size(node, "riscv,cboz-block-size",
> - &cboz_block_size, &cboz_hartid);
> + for_each_possible_cpu(cpu) {
> + if (acpi_disabled) {
> + node = of_cpu_device_node_get(cpu);
> + if (!node) {
> + pr_warn("Unable to find cpu node\n");
> + continue;
> + }
> +
> + /* set block-size for cbom and/or cboz extension if available */
> + cbo_get_block_size(node, "riscv,cbom-block-size",
> + &cbom_block_size, &cbom_hartid);
> + cbo_get_block_size(node, "riscv,cboz-block-size",
> + &cboz_block_size, &cboz_hartid);
This leaks a reference to the device node.
> + } else {
> + acpi_get_cbo_block_size(rhct, cpu, &cbom_block_size,
> + &cboz_block_size, NULL);
This function loops through the whole RHCT already. Why do we need to call it
for each CPU? Can't we just call it once, and have it do the same consistency
checks as cbo_get_block_size()?
In that case, the DT path could keep the for_each_of_cpu_node() loop.
Regards,
Samuel
> + }
> }
>
> + if (!acpi_disabled && rhct)
> + acpi_put_table((struct acpi_table_header *)rhct);
> +
> if (cbom_block_size)
> riscv_cbom_block_size = cbom_block_size;
>
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH v2 -next 3/4] RISC-V: cacheflush: Initialize CBO variables on ACPI systems
2023-10-03 19:50 ` Samuel Holland
@ 2023-10-04 4:22 ` Sunil V L
2023-10-04 8:33 ` Andrew Jones
0 siblings, 1 reply; 18+ messages in thread
From: Sunil V L @ 2023-10-04 4:22 UTC (permalink / raw
To: Samuel Holland
Cc: linux-riscv, linux-kernel, linux-acpi, Anup Patel, Albert Ou,
Alexandre Ghiti, Rafael J . Wysocki, Daniel Lezcano,
Atish Kumar Patra, Andy Shevchenko, Conor Dooley, Palmer Dabbelt,
Paul Walmsley, Thomas Gleixner, Andrew Jones, Ard Biesheuvel,
Len Brown
On Tue, Oct 03, 2023 at 02:50:02PM -0500, Samuel Holland wrote:
> On 2023-09-27 12:00 PM, Sunil V L wrote:
> > Using new interface to get the CBO block size information in RHCT,
> > initialize the variables on ACPI platforms.
> >
> > Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
> > ---
> > arch/riscv/mm/cacheflush.c | 37 +++++++++++++++++++++++++++++++------
> > 1 file changed, 31 insertions(+), 6 deletions(-)
> >
> > diff --git a/arch/riscv/mm/cacheflush.c b/arch/riscv/mm/cacheflush.c
> > index f1387272a551..8e59644e473c 100644
> > --- a/arch/riscv/mm/cacheflush.c
> > +++ b/arch/riscv/mm/cacheflush.c
> > @@ -3,7 +3,9 @@
> > * Copyright (C) 2017 SiFive
> > */
> >
> > +#include <linux/acpi.h>
> > #include <linux/of.h>
> > +#include <asm/acpi.h>
> > #include <asm/cacheflush.h>
> >
> > #ifdef CONFIG_SMP
> > @@ -124,15 +126,38 @@ void __init riscv_init_cbo_blocksizes(void)
> > unsigned long cbom_hartid, cboz_hartid;
> > u32 cbom_block_size = 0, cboz_block_size = 0;
> > struct device_node *node;
> > + struct acpi_table_header *rhct;
> > + acpi_status status;
> > + unsigned int cpu;
> > +
> > + if (!acpi_disabled) {
> > + status = acpi_get_table(ACPI_SIG_RHCT, 0, &rhct);
> > + if (ACPI_FAILURE(status))
> > + return;
> > + }
> >
> > - for_each_of_cpu_node(node) {
> > - /* set block-size for cbom and/or cboz extension if available */
> > - cbo_get_block_size(node, "riscv,cbom-block-size",
> > - &cbom_block_size, &cbom_hartid);
> > - cbo_get_block_size(node, "riscv,cboz-block-size",
> > - &cboz_block_size, &cboz_hartid);
> > + for_each_possible_cpu(cpu) {
> > + if (acpi_disabled) {
> > + node = of_cpu_device_node_get(cpu);
> > + if (!node) {
> > + pr_warn("Unable to find cpu node\n");
> > + continue;
> > + }
> > +
> > + /* set block-size for cbom and/or cboz extension if available */
> > + cbo_get_block_size(node, "riscv,cbom-block-size",
> > + &cbom_block_size, &cbom_hartid);
> > + cbo_get_block_size(node, "riscv,cboz-block-size",
> > + &cboz_block_size, &cboz_hartid);
>
> This leaks a reference to the device node.
>
Yep!. I missed of_node_put(). Let me add in next revision. Thanks!
> > + } else {
> > + acpi_get_cbo_block_size(rhct, cpu, &cbom_block_size,
> > + &cboz_block_size, NULL);
>
> This function loops through the whole RHCT already. Why do we need to call it
> for each CPU? Can't we just call it once, and have it do the same consistency
> checks as cbo_get_block_size()?
>
> In that case, the DT path could keep the for_each_of_cpu_node() loop.
>
I kept the same logic as DT. Basically, by passing the cpu node, we
will fetch the exact CPU's CBO property from RHCT. It is not clear to me
why we overwrite the same variable with value from another cpu and
whether we can return as soon as we get the CBO size for one CPU.
Drew, can we exit the loop if we get the CBO size for one CPU?
Thanks!
Sunil
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH v2 -next 3/4] RISC-V: cacheflush: Initialize CBO variables on ACPI systems
2023-10-04 4:22 ` Sunil V L
@ 2023-10-04 8:33 ` Andrew Jones
2023-10-04 10:13 ` Sunil V L
0 siblings, 1 reply; 18+ messages in thread
From: Andrew Jones @ 2023-10-04 8:33 UTC (permalink / raw
To: Sunil V L
Cc: Samuel Holland, linux-riscv, linux-kernel, linux-acpi, Anup Patel,
Albert Ou, Alexandre Ghiti, Rafael J . Wysocki, Daniel Lezcano,
Atish Kumar Patra, Andy Shevchenko, Conor Dooley, Palmer Dabbelt,
Paul Walmsley, Thomas Gleixner, Ard Biesheuvel, Len Brown
On Wed, Oct 04, 2023 at 09:52:23AM +0530, Sunil V L wrote:
> On Tue, Oct 03, 2023 at 02:50:02PM -0500, Samuel Holland wrote:
> > On 2023-09-27 12:00 PM, Sunil V L wrote:
> > > Using new interface to get the CBO block size information in RHCT,
> > > initialize the variables on ACPI platforms.
> > >
> > > Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
> > > ---
> > > arch/riscv/mm/cacheflush.c | 37 +++++++++++++++++++++++++++++++------
> > > 1 file changed, 31 insertions(+), 6 deletions(-)
> > >
> > > diff --git a/arch/riscv/mm/cacheflush.c b/arch/riscv/mm/cacheflush.c
> > > index f1387272a551..8e59644e473c 100644
> > > --- a/arch/riscv/mm/cacheflush.c
> > > +++ b/arch/riscv/mm/cacheflush.c
> > > @@ -3,7 +3,9 @@
> > > * Copyright (C) 2017 SiFive
> > > */
> > >
> > > +#include <linux/acpi.h>
> > > #include <linux/of.h>
> > > +#include <asm/acpi.h>
> > > #include <asm/cacheflush.h>
> > >
> > > #ifdef CONFIG_SMP
> > > @@ -124,15 +126,38 @@ void __init riscv_init_cbo_blocksizes(void)
> > > unsigned long cbom_hartid, cboz_hartid;
> > > u32 cbom_block_size = 0, cboz_block_size = 0;
> > > struct device_node *node;
> > > + struct acpi_table_header *rhct;
> > > + acpi_status status;
> > > + unsigned int cpu;
> > > +
> > > + if (!acpi_disabled) {
> > > + status = acpi_get_table(ACPI_SIG_RHCT, 0, &rhct);
> > > + if (ACPI_FAILURE(status))
> > > + return;
> > > + }
> > >
> > > - for_each_of_cpu_node(node) {
> > > - /* set block-size for cbom and/or cboz extension if available */
> > > - cbo_get_block_size(node, "riscv,cbom-block-size",
> > > - &cbom_block_size, &cbom_hartid);
> > > - cbo_get_block_size(node, "riscv,cboz-block-size",
> > > - &cboz_block_size, &cboz_hartid);
> > > + for_each_possible_cpu(cpu) {
> > > + if (acpi_disabled) {
> > > + node = of_cpu_device_node_get(cpu);
> > > + if (!node) {
> > > + pr_warn("Unable to find cpu node\n");
> > > + continue;
> > > + }
> > > +
> > > + /* set block-size for cbom and/or cboz extension if available */
> > > + cbo_get_block_size(node, "riscv,cbom-block-size",
> > > + &cbom_block_size, &cbom_hartid);
> > > + cbo_get_block_size(node, "riscv,cboz-block-size",
> > > + &cboz_block_size, &cboz_hartid);
> >
> > This leaks a reference to the device node.
> >
> Yep!. I missed of_node_put(). Let me add in next revision. Thanks!
>
> > > + } else {
> > > + acpi_get_cbo_block_size(rhct, cpu, &cbom_block_size,
> > > + &cboz_block_size, NULL);
> >
> > This function loops through the whole RHCT already. Why do we need to call it
> > for each CPU? Can't we just call it once, and have it do the same consistency
> > checks as cbo_get_block_size()?
> >
> > In that case, the DT path could keep the for_each_of_cpu_node() loop.
> >
> I kept the same logic as DT. Basically, by passing the cpu node, we
> will fetch the exact CPU's CBO property from RHCT. It is not clear to me
> why we overwrite the same variable with value from another cpu and
> whether we can return as soon as we get the CBO size for one CPU.
>
> Drew, can we exit the loop if we get the CBO size for one CPU?
We want to compare the values for each CPU with the first one we find in
order to ensure they are consistent. I think Samuel is suggesting that
we leave the DT path here the same, i.e. keep the for_each_of_cpu_node()
loop, and then change acpi_get_cbo_block_size() to *not* take a cpu as
input, but rather follow the same pattern as DT, which is to loop over
all cpus doing a consistency check against the first cpu's CBO info.
Thanks,
drew
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH v2 -next 4/4] clocksource/timer-riscv: ACPI: Add timer_cannot_wakeup_cpu
2023-09-27 17:00 ` [PATCH v2 -next 4/4] clocksource/timer-riscv: ACPI: Add timer_cannot_wakeup_cpu Sunil V L
2023-09-27 20:15 ` Samuel Holland
2023-10-02 15:46 ` Conor Dooley
@ 2023-10-04 8:38 ` Andrew Jones
2023-10-11 9:14 ` Daniel Lezcano
2023-10-27 18:23 ` [tip: timers/core] " tip-bot2 for Sunil V L
4 siblings, 0 replies; 18+ messages in thread
From: Andrew Jones @ 2023-10-04 8:38 UTC (permalink / raw
To: Sunil V L
Cc: linux-riscv, linux-kernel, linux-acpi, Paul Walmsley,
Palmer Dabbelt, Albert Ou, Rafael J . Wysocki, Len Brown,
Daniel Lezcano, Thomas Gleixner, Conor Dooley, Anup Patel,
Ard Biesheuvel, Alexandre Ghiti, Andy Shevchenko,
Atish Kumar Patra
On Wed, Sep 27, 2023 at 10:30:15PM +0530, Sunil V L wrote:
> The timer capability to wakeup the cpu irrespective of its idle state is
> provided by the flag in RHCT. Update the timer code to set this flag.
>
> Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
> ---
> drivers/clocksource/timer-riscv.c | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/drivers/clocksource/timer-riscv.c b/drivers/clocksource/timer-riscv.c
> index 9c8f3e2decc2..06f5bad3c3e0 100644
> --- a/drivers/clocksource/timer-riscv.c
> +++ b/drivers/clocksource/timer-riscv.c
> @@ -225,6 +225,10 @@ TIMER_OF_DECLARE(riscv_timer, "riscv", riscv_timer_init_dt);
> #ifdef CONFIG_ACPI
> static int __init riscv_timer_acpi_init(struct acpi_table_header *table)
> {
> + struct acpi_table_rhct *rhct = (struct acpi_table_rhct *)table;
> +
> + riscv_timer_cannot_wake_cpu = rhct->flags & ACPI_RHCT_TIMER_CANNOT_WAKEUP_CPU;
> +
> return riscv_timer_init_common();
> }
>
> --
> 2.39.2
>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH v2 -next 3/4] RISC-V: cacheflush: Initialize CBO variables on ACPI systems
2023-10-04 8:33 ` Andrew Jones
@ 2023-10-04 10:13 ` Sunil V L
0 siblings, 0 replies; 18+ messages in thread
From: Sunil V L @ 2023-10-04 10:13 UTC (permalink / raw
To: Andrew Jones
Cc: Samuel Holland, linux-riscv, linux-kernel, linux-acpi, Anup Patel,
Albert Ou, Alexandre Ghiti, Rafael J . Wysocki, Daniel Lezcano,
Atish Kumar Patra, Andy Shevchenko, Conor Dooley, Palmer Dabbelt,
Paul Walmsley, Thomas Gleixner, Ard Biesheuvel, Len Brown
On Wed, Oct 04, 2023 at 10:33:31AM +0200, Andrew Jones wrote:
> On Wed, Oct 04, 2023 at 09:52:23AM +0530, Sunil V L wrote:
> > On Tue, Oct 03, 2023 at 02:50:02PM -0500, Samuel Holland wrote:
> > > On 2023-09-27 12:00 PM, Sunil V L wrote:
> > > > Using new interface to get the CBO block size information in RHCT,
> > > > initialize the variables on ACPI platforms.
> > > >
> > > > Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
> > > > ---
> > > > arch/riscv/mm/cacheflush.c | 37 +++++++++++++++++++++++++++++++------
> > > > 1 file changed, 31 insertions(+), 6 deletions(-)
> > > >
> > > > diff --git a/arch/riscv/mm/cacheflush.c b/arch/riscv/mm/cacheflush.c
> > > > index f1387272a551..8e59644e473c 100644
> > > > --- a/arch/riscv/mm/cacheflush.c
> > > > +++ b/arch/riscv/mm/cacheflush.c
> > > > @@ -3,7 +3,9 @@
> > > > * Copyright (C) 2017 SiFive
> > > > */
> > > >
> > > > +#include <linux/acpi.h>
> > > > #include <linux/of.h>
> > > > +#include <asm/acpi.h>
> > > > #include <asm/cacheflush.h>
> > > >
> > > > #ifdef CONFIG_SMP
> > > > @@ -124,15 +126,38 @@ void __init riscv_init_cbo_blocksizes(void)
> > > > unsigned long cbom_hartid, cboz_hartid;
> > > > u32 cbom_block_size = 0, cboz_block_size = 0;
> > > > struct device_node *node;
> > > > + struct acpi_table_header *rhct;
> > > > + acpi_status status;
> > > > + unsigned int cpu;
> > > > +
> > > > + if (!acpi_disabled) {
> > > > + status = acpi_get_table(ACPI_SIG_RHCT, 0, &rhct);
> > > > + if (ACPI_FAILURE(status))
> > > > + return;
> > > > + }
> > > >
> > > > - for_each_of_cpu_node(node) {
> > > > - /* set block-size for cbom and/or cboz extension if available */
> > > > - cbo_get_block_size(node, "riscv,cbom-block-size",
> > > > - &cbom_block_size, &cbom_hartid);
> > > > - cbo_get_block_size(node, "riscv,cboz-block-size",
> > > > - &cboz_block_size, &cboz_hartid);
> > > > + for_each_possible_cpu(cpu) {
> > > > + if (acpi_disabled) {
> > > > + node = of_cpu_device_node_get(cpu);
> > > > + if (!node) {
> > > > + pr_warn("Unable to find cpu node\n");
> > > > + continue;
> > > > + }
> > > > +
> > > > + /* set block-size for cbom and/or cboz extension if available */
> > > > + cbo_get_block_size(node, "riscv,cbom-block-size",
> > > > + &cbom_block_size, &cbom_hartid);
> > > > + cbo_get_block_size(node, "riscv,cboz-block-size",
> > > > + &cboz_block_size, &cboz_hartid);
> > >
> > > This leaks a reference to the device node.
> > >
> > Yep!. I missed of_node_put(). Let me add in next revision. Thanks!
> >
> > > > + } else {
> > > > + acpi_get_cbo_block_size(rhct, cpu, &cbom_block_size,
> > > > + &cboz_block_size, NULL);
> > >
> > > This function loops through the whole RHCT already. Why do we need to call it
> > > for each CPU? Can't we just call it once, and have it do the same consistency
> > > checks as cbo_get_block_size()?
> > >
> > > In that case, the DT path could keep the for_each_of_cpu_node() loop.
> > >
> > I kept the same logic as DT. Basically, by passing the cpu node, we
> > will fetch the exact CPU's CBO property from RHCT. It is not clear to me
> > why we overwrite the same variable with value from another cpu and
> > whether we can return as soon as we get the CBO size for one CPU.
> >
> > Drew, can we exit the loop if we get the CBO size for one CPU?
>
> We want to compare the values for each CPU with the first one we find in
> order to ensure they are consistent. I think Samuel is suggesting that
> we leave the DT path here the same, i.e. keep the for_each_of_cpu_node()
> loop, and then change acpi_get_cbo_block_size() to *not* take a cpu as
> input, but rather follow the same pattern as DT, which is to loop over
> all cpus doing a consistency check against the first cpu's CBO info.
>
Ahh OK. Thanks Drew and Samuel. Let me update as you suggested.
Thanks!
Sunil
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH v2 -next 1/4] RISC-V: ACPI: Enhance acpi_os_ioremap with MMIO remapping
2023-10-03 18:53 ` Alexandre Ghiti
@ 2023-10-04 10:33 ` Sunil V L
0 siblings, 0 replies; 18+ messages in thread
From: Sunil V L @ 2023-10-04 10:33 UTC (permalink / raw
To: Alexandre Ghiti
Cc: linux-riscv, linux-kernel, linux-acpi, Paul Walmsley,
Palmer Dabbelt, Albert Ou, Rafael J . Wysocki, Len Brown,
Daniel Lezcano, Thomas Gleixner, Andrew Jones, Conor Dooley,
Anup Patel, Ard Biesheuvel, Andy Shevchenko, Atish Kumar Patra
Hi Alex,
On Tue, Oct 03, 2023 at 08:53:12PM +0200, Alexandre Ghiti wrote:
> Hi Sunil,
>
> On Wed, Sep 27, 2023 at 7:00 PM Sunil V L <sunilvl@ventanamicro.com> wrote:
> >
> > Enhance the acpi_os_ioremap() to support opregions in MMIO space. Also,
> > have strict checks using EFI memory map to allow remapping the RAM similar
> > to arm64.
> >
> > Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
> > Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
> > ---
> > arch/riscv/Kconfig | 1 +
> > arch/riscv/kernel/acpi.c | 87 +++++++++++++++++++++++++++++++++++++++-
> > 2 files changed, 86 insertions(+), 2 deletions(-)
> >
> > diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
> > index d607ab0f7c6d..ac039cf8af7a 100644
> > --- a/arch/riscv/Kconfig
> > +++ b/arch/riscv/Kconfig
> > @@ -39,6 +39,7 @@ config RISCV
> > select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
> > select ARCH_HAS_UBSAN_SANITIZE_ALL
> > select ARCH_HAS_VDSO_DATA
> > + select ARCH_KEEP_MEMBLOCK
>
> Shouldn't we restrict this to ACPI?
>
Sure, Let me update.
> > select ARCH_OPTIONAL_KERNEL_RWX if ARCH_HAS_STRICT_KERNEL_RWX
> > select ARCH_OPTIONAL_KERNEL_RWX_DEFAULT
> > select ARCH_STACKWALK
> > diff --git a/arch/riscv/kernel/acpi.c b/arch/riscv/kernel/acpi.c
> > index 56cb2c986c48..e619edc8b0cc 100644
> > --- a/arch/riscv/kernel/acpi.c
> > +++ b/arch/riscv/kernel/acpi.c
> > @@ -14,9 +14,10 @@
> > */
> >
> > #include <linux/acpi.h>
> > +#include <linux/efi.h>
> > #include <linux/io.h>
> > +#include <linux/memblock.h>
> > #include <linux/pci.h>
> > -#include <linux/efi.h>
> >
> > int acpi_noirq = 1; /* skip ACPI IRQ initialization */
> > int acpi_disabled = 1;
> > @@ -217,7 +218,89 @@ void __init __acpi_unmap_table(void __iomem *map, unsigned long size)
> >
> > void __iomem *acpi_os_ioremap(acpi_physical_address phys, acpi_size size)
> > {
> > - return (void __iomem *)memremap(phys, size, MEMREMAP_WB);
> > + efi_memory_desc_t *md, *region = NULL;
> > + pgprot_t prot;
> > +
> > + if (WARN_ON_ONCE(!efi_enabled(EFI_MEMMAP)))
> > + return NULL;
> > +
> > + for_each_efi_memory_desc(md) {
> > + u64 end = md->phys_addr + (md->num_pages << EFI_PAGE_SHIFT);
> > +
> > + if (phys < md->phys_addr || phys >= end)
> > + continue;
> > +
> > + if (phys + size > end) {
> > + pr_warn(FW_BUG "requested region covers multiple EFI memory regions\n");
> > + return NULL;
> > + }
> > + region = md;
> > + break;
> > + }
> > +
> > + /*
> > + * It is fine for AML to remap regions that are not represented in the
> > + * EFI memory map at all, as it only describes normal memory, and MMIO
> > + * regions that require a virtual mapping to make them accessible to
> > + * the EFI runtime services.
> > + */
> > + prot = PAGE_KERNEL_IO;
> > + if (region) {
> > + switch (region->type) {
> > + case EFI_LOADER_CODE:
> > + case EFI_LOADER_DATA:
> > + case EFI_BOOT_SERVICES_CODE:
> > + case EFI_BOOT_SERVICES_DATA:
> > + case EFI_CONVENTIONAL_MEMORY:
> > + case EFI_PERSISTENT_MEMORY:
> > + if (memblock_is_map_memory(phys) ||
> > + !memblock_is_region_memory(phys, size)) {
> > + pr_warn(FW_BUG "requested region covers kernel memory\n");
> > + return NULL;
> > + }
> > +
> > + /*
> > + * Mapping kernel memory is permitted if the region in
> > + * question is covered by a single memblock with the
> > + * NOMAP attribute set: this enables the use of ACPI
> > + * table overrides passed via initramfs.
> > + * This particular use case only requires read access.
> > + */
> > + fallthrough;
> > +
> > + case EFI_RUNTIME_SERVICES_CODE:
> > + /*
> > + * This would be unusual, but not problematic per se,
> > + * as long as we take care not to create a writable
> > + * mapping for executable code.
> > + */
> > + prot = PAGE_KERNEL_RO;
> > + break;
> > +
> > + case EFI_ACPI_RECLAIM_MEMORY:
> > + /*
> > + * ACPI reclaim memory is used to pass firmware tables
> > + * and other data that is intended for consumption by
> > + * the OS only, which may decide it wants to reclaim
> > + * that memory and use it for something else. We never
> > + * do that, but we usually add it to the linear map
> > + * anyway, in which case we should use the existing
> > + * mapping.
> > + */
> > + if (memblock_is_map_memory(phys))
> > + return (void __iomem *)__va(phys);
> > + fallthrough;
> > +
> > + default:
> > + if (region->attribute & EFI_MEMORY_WB)
> > + prot = PAGE_KERNEL;
> > + else if ((region->attribute & EFI_MEMORY_WC) ||
> > + (region->attribute & EFI_MEMORY_WT))
> > + prot = pgprot_writecombine(PAGE_KERNEL);
>
> I have to ask: why is write-through mapped to write-combined here?
>
IIUC, write-through ensures the copy in the cache and memory are always
in sync. So, instead of using WB, non-cacheable WC is used as RISC-V
doesn't really define these attributes. Let me know if this is not
correct.
> > + }
> > + }
> > +
> > + return ioremap_prot(phys, size, pgprot_val(prot));
> > }
> >
> > #ifdef CONFIG_PCI
> > --
> > 2.39.2
> >
>
> Like Andrew said in v1, too bad we can't merge that with arm64 instead
> of duplicating.
>
I agree. But since acpi_os_ioremap() is supposed to be arch function, I
kept is separate. Also, I need feedback from Ard whether we should make
it common and where to add this common function.
> But otherwise, you can add:
>
> Reviewed-by: Alexandre Ghiti <alexghiti@rivosinc.com>
>
Thanks!
Sunil
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH v2 -next 4/4] clocksource/timer-riscv: ACPI: Add timer_cannot_wakeup_cpu
2023-09-27 17:00 ` [PATCH v2 -next 4/4] clocksource/timer-riscv: ACPI: Add timer_cannot_wakeup_cpu Sunil V L
` (2 preceding siblings ...)
2023-10-04 8:38 ` Andrew Jones
@ 2023-10-11 9:14 ` Daniel Lezcano
2023-10-27 18:23 ` [tip: timers/core] " tip-bot2 for Sunil V L
4 siblings, 0 replies; 18+ messages in thread
From: Daniel Lezcano @ 2023-10-11 9:14 UTC (permalink / raw
To: Sunil V L, linux-riscv, linux-kernel, linux-acpi
Cc: Paul Walmsley, Palmer Dabbelt, Albert Ou, Rafael J . Wysocki,
Len Brown, Thomas Gleixner, Andrew Jones, Conor Dooley,
Anup Patel, Ard Biesheuvel, Alexandre Ghiti, Andy Shevchenko,
Atish Kumar Patra
On 27/09/2023 19:00, Sunil V L wrote:
> The timer capability to wakeup the cpu irrespective of its idle state is
> provided by the flag in RHCT. Update the timer code to set this flag.
>
> Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
> ---
Applied, thanks
--
<http://www.linaro.org/> Linaro.org │ Open source software for ARM SoCs
Follow Linaro: <http://www.facebook.com/pages/Linaro> Facebook |
<http://twitter.com/#!/linaroorg> Twitter |
<http://www.linaro.org/linaro-blog/> Blog
^ permalink raw reply [flat|nested] 18+ messages in thread
* [tip: timers/core] clocksource/timer-riscv: ACPI: Add timer_cannot_wakeup_cpu
2023-09-27 17:00 ` [PATCH v2 -next 4/4] clocksource/timer-riscv: ACPI: Add timer_cannot_wakeup_cpu Sunil V L
` (3 preceding siblings ...)
2023-10-11 9:14 ` Daniel Lezcano
@ 2023-10-27 18:23 ` tip-bot2 for Sunil V L
4 siblings, 0 replies; 18+ messages in thread
From: tip-bot2 for Sunil V L @ 2023-10-27 18:23 UTC (permalink / raw
To: linux-tip-commits
Cc: Sunil V L, Conor Dooley, Andrew Jones, Samuel Holland,
Daniel Lezcano, x86, linux-kernel
The following commit has been merged into the timers/core branch of tip:
Commit-ID: d7f546c751e8c873302331af6a203ee61f894e9d
Gitweb: https://git.kernel.org/tip/d7f546c751e8c873302331af6a203ee61f894e9d
Author: Sunil V L <sunilvl@ventanamicro.com>
AuthorDate: Wed, 27 Sep 2023 22:30:15 +05:30
Committer: Daniel Lezcano <daniel.lezcano@linaro.org>
CommitterDate: Wed, 11 Oct 2023 12:06:41 +02:00
clocksource/timer-riscv: ACPI: Add timer_cannot_wakeup_cpu
The timer capability to wakeup the cpu irrespective of its idle state is
provided by the flag in RHCT. Update the timer code to set this flag.
Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Samuel Holland <samuel.holland@sifive.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Link: https://lore.kernel.org/r/20230927170015.295232-5-sunilvl@ventanamicro.com
---
drivers/clocksource/timer-riscv.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/clocksource/timer-riscv.c b/drivers/clocksource/timer-riscv.c
index da3071b..5019865 100644
--- a/drivers/clocksource/timer-riscv.c
+++ b/drivers/clocksource/timer-riscv.c
@@ -212,6 +212,10 @@ TIMER_OF_DECLARE(riscv_timer, "riscv", riscv_timer_init_dt);
#ifdef CONFIG_ACPI
static int __init riscv_timer_acpi_init(struct acpi_table_header *table)
{
+ struct acpi_table_rhct *rhct = (struct acpi_table_rhct *)table;
+
+ riscv_timer_cannot_wake_cpu = rhct->flags & ACPI_RHCT_TIMER_CANNOT_WAKEUP_CPU;
+
return riscv_timer_init_common();
}
^ permalink raw reply related [flat|nested] 18+ messages in thread
end of thread, other threads:[~2023-10-27 18:25 UTC | newest]
Thread overview: 18+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2023-09-27 17:00 [PATCH v2 -next 0/4] RISC-V: ACPI improvements Sunil V L
2023-09-27 17:00 ` [PATCH v2 -next 1/4] RISC-V: ACPI: Enhance acpi_os_ioremap with MMIO remapping Sunil V L
2023-10-02 15:53 ` Conor Dooley
2023-10-03 18:53 ` Alexandre Ghiti
2023-10-04 10:33 ` Sunil V L
2023-09-27 17:00 ` [PATCH v2 -next 2/4] RISC-V: ACPI: RHCT: Add function to get CBO block sizes Sunil V L
2023-09-27 17:00 ` [PATCH v2 -next 3/4] RISC-V: cacheflush: Initialize CBO variables on ACPI systems Sunil V L
2023-10-02 15:50 ` Conor Dooley
2023-10-03 19:50 ` Samuel Holland
2023-10-04 4:22 ` Sunil V L
2023-10-04 8:33 ` Andrew Jones
2023-10-04 10:13 ` Sunil V L
2023-09-27 17:00 ` [PATCH v2 -next 4/4] clocksource/timer-riscv: ACPI: Add timer_cannot_wakeup_cpu Sunil V L
2023-09-27 20:15 ` Samuel Holland
2023-10-02 15:46 ` Conor Dooley
2023-10-04 8:38 ` Andrew Jones
2023-10-11 9:14 ` Daniel Lezcano
2023-10-27 18:23 ` [tip: timers/core] " tip-bot2 for Sunil V L
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for read-only IMAP folder(s) and NNTP newsgroup(s).