* [PATCH v2 0/6] update for versal net platform
@ 2023-10-04 9:41 Jay Buddhabhatti
2023-10-04 9:41 ` [PATCH v2 1/6] firmware: xilinx: Update firmware call interface to support additional arg Jay Buddhabhatti
` (6 more replies)
0 siblings, 7 replies; 20+ messages in thread
From: Jay Buddhabhatti @ 2023-10-04 9:41 UTC (permalink / raw
To: michal.simek, tanmay.shah, gregkh, nava.kishore.manne,
ben.levinsky, robh, dhaval.r.shah, marex, izhar.ameer.shaikh,
arnd, ruanjinjie, mathieu.poirier
Cc: linux-kernel, linux-arm-kernel, Jay Buddhabhatti
Update firmware and SoC drivers to support for Versal NET platform.
Versal Net is a new AMD/Xilinx SoC.
V1 patch series link: https://lkml.org/lkml/2023/9/29/308
Changes in V2:
- Removed below patch from V1 patch series
https://lkml.org/lkml/2023/9/29/313
- Corrected maintainer name format in patch #6 as per tool requirement
Jay Buddhabhatti (6):
firmware: xilinx: Update firmware call interface to support additional
arg
firmware: xilinx: Expand feature check to support all PLM modules
firmware: xilinx: Register event manager driver
drivers: soc: xilinx: Fix error message on SGI registration failure
firmware: zynqmp: Add support to handle IPI CRC failure
drivers: soc: xilinx: update maintainer of event manager driver
MAINTAINERS | 2 +-
drivers/firmware/xilinx/zynqmp.c | 210 +++++++++++++-----------
drivers/soc/xilinx/xlnx_event_manager.c | 9 +-
drivers/soc/xilinx/zynqmp_power.c | 2 +-
include/linux/firmware/xlnx-zynqmp.h | 15 +-
5 files changed, 140 insertions(+), 98 deletions(-)
--
2.25.1
^ permalink raw reply [flat|nested] 20+ messages in thread
* [PATCH v2 1/6] firmware: xilinx: Update firmware call interface to support additional arg
2023-10-04 9:41 [PATCH v2 0/6] update for versal net platform Jay Buddhabhatti
@ 2023-10-04 9:41 ` Jay Buddhabhatti
2023-10-04 12:14 ` Greg KH
2023-10-04 9:41 ` [PATCH v2 2/6] firmware: xilinx: Expand feature check to support all PLM modules Jay Buddhabhatti
` (5 subsequent siblings)
6 siblings, 1 reply; 20+ messages in thread
From: Jay Buddhabhatti @ 2023-10-04 9:41 UTC (permalink / raw
To: michal.simek, tanmay.shah, gregkh, nava.kishore.manne,
ben.levinsky, robh, dhaval.r.shah, marex, izhar.ameer.shaikh,
arnd, ruanjinjie, mathieu.poirier
Cc: linux-kernel, linux-arm-kernel, Jay Buddhabhatti
System-level platform management layer (do_fw_call()) has support for
maximum of 5 arguments as of now (1 EEMI API ID + 4 command arguments).
In order to support new EEMI PM_IOCTL IDs (Secure Read/Write), this
support must be extended to support one additional argument, which
results in a configuration of - 1 EEMI API ID + 5 command arguments.
Update zynqmp_pm_invoke_fn() and do_fw_call() with this new definition
containing additional argument. As a result, update all the references
to pm invoke function with the updated definition.
Co-developed-by: Izhar Ameer Shaikh <izhar.ameer.shaikh@amd.com>
Signed-off-by: Izhar Ameer Shaikh <izhar.ameer.shaikh@amd.com>
Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
---
drivers/firmware/xilinx/zynqmp.c | 155 +++++++++++++-----------
drivers/soc/xilinx/xlnx_event_manager.c | 2 +-
drivers/soc/xilinx/zynqmp_power.c | 2 +-
include/linux/firmware/xlnx-zynqmp.h | 2 +-
4 files changed, 87 insertions(+), 74 deletions(-)
diff --git a/drivers/firmware/xilinx/zynqmp.c b/drivers/firmware/xilinx/zynqmp.c
index 4cc1ac7f76ed..d102619fd6f4 100644
--- a/drivers/firmware/xilinx/zynqmp.c
+++ b/drivers/firmware/xilinx/zynqmp.c
@@ -106,7 +106,7 @@ static int zynqmp_pm_ret_code(u32 ret_status)
}
}
-static noinline int do_fw_call_fail(u64 arg0, u64 arg1, u64 arg2,
+static noinline int do_fw_call_fail(u64 arg0, u64 arg1, u64 arg2, u64 arg3,
u32 *ret_payload)
{
return -ENODEV;
@@ -116,25 +116,26 @@ static noinline int do_fw_call_fail(u64 arg0, u64 arg1, u64 arg2,
* PM function call wrapper
* Invoke do_fw_call_smc or do_fw_call_hvc, depending on the configuration
*/
-static int (*do_fw_call)(u64, u64, u64, u32 *ret_payload) = do_fw_call_fail;
+static int (*do_fw_call)(u64, u64, u64, u64, u32 *ret_payload) = do_fw_call_fail;
/**
* do_fw_call_smc() - Call system-level platform management layer (SMC)
* @arg0: Argument 0 to SMC call
* @arg1: Argument 1 to SMC call
* @arg2: Argument 2 to SMC call
+ * @arg3: Argument 3 to SMC call
* @ret_payload: Returned value array
*
* Invoke platform management function via SMC call (no hypervisor present).
*
* Return: Returns status, either success or error+reason
*/
-static noinline int do_fw_call_smc(u64 arg0, u64 arg1, u64 arg2,
+static noinline int do_fw_call_smc(u64 arg0, u64 arg1, u64 arg2, u64 arg3,
u32 *ret_payload)
{
struct arm_smccc_res res;
- arm_smccc_smc(arg0, arg1, arg2, 0, 0, 0, 0, 0, &res);
+ arm_smccc_smc(arg0, arg1, arg2, arg3, 0, 0, 0, 0, &res);
if (ret_payload) {
ret_payload[0] = lower_32_bits(res.a0);
@@ -151,6 +152,7 @@ static noinline int do_fw_call_smc(u64 arg0, u64 arg1, u64 arg2,
* @arg0: Argument 0 to HVC call
* @arg1: Argument 1 to HVC call
* @arg2: Argument 2 to HVC call
+ * @arg3: Argument 3 to HVC call
* @ret_payload: Returned value array
*
* Invoke platform management function via HVC
@@ -159,12 +161,12 @@ static noinline int do_fw_call_smc(u64 arg0, u64 arg1, u64 arg2,
*
* Return: Returns status, either success or error+reason
*/
-static noinline int do_fw_call_hvc(u64 arg0, u64 arg1, u64 arg2,
+static noinline int do_fw_call_hvc(u64 arg0, u64 arg1, u64 arg2, u64 arg3,
u32 *ret_payload)
{
struct arm_smccc_res res;
- arm_smccc_hvc(arg0, arg1, arg2, 0, 0, 0, 0, 0, &res);
+ arm_smccc_hvc(arg0, arg1, arg2, arg3, 0, 0, 0, 0, &res);
if (ret_payload) {
ret_payload[0] = lower_32_bits(res.a0);
@@ -184,7 +186,7 @@ static int __do_feature_check_call(const u32 api_id, u32 *ret_payload)
smc_arg[0] = PM_SIP_SVC | PM_FEATURE_CHECK;
smc_arg[1] = api_id;
- ret = do_fw_call(smc_arg[0], smc_arg[1], 0, ret_payload);
+ ret = do_fw_call(smc_arg[0], smc_arg[1], 0, 0, ret_payload);
if (ret)
ret = -EOPNOTSUPP;
else
@@ -299,6 +301,7 @@ EXPORT_SYMBOL_GPL(zynqmp_pm_is_function_supported);
* @arg1: Argument 1 to requested PM-API call
* @arg2: Argument 2 to requested PM-API call
* @arg3: Argument 3 to requested PM-API call
+ * @arg4: Argument 4 to requested PM-API call
* @ret_payload: Returned value array
*
* Invoke platform management function for SMC or HVC call, depending on
@@ -317,7 +320,8 @@ EXPORT_SYMBOL_GPL(zynqmp_pm_is_function_supported);
* Return: Returns status, either success or error+reason
*/
int zynqmp_pm_invoke_fn(u32 pm_api_id, u32 arg0, u32 arg1,
- u32 arg2, u32 arg3, u32 *ret_payload)
+ u32 arg2, u32 arg3, u32 arg4,
+ u32 *ret_payload)
{
/*
* Added SIP service call Function Identifier
@@ -334,8 +338,10 @@ int zynqmp_pm_invoke_fn(u32 pm_api_id, u32 arg0, u32 arg1,
smc_arg[0] = PM_SIP_SVC | pm_api_id;
smc_arg[1] = ((u64)arg1 << 32) | arg0;
smc_arg[2] = ((u64)arg3 << 32) | arg2;
+ smc_arg[3] = ((u64)arg4);
- return do_fw_call(smc_arg[0], smc_arg[1], smc_arg[2], ret_payload);
+ return do_fw_call(smc_arg[0], smc_arg[1], smc_arg[2], smc_arg[3],
+ ret_payload);
}
static u32 pm_api_version;
@@ -348,13 +354,13 @@ int zynqmp_pm_register_sgi(u32 sgi_num, u32 reset)
int ret;
ret = zynqmp_pm_invoke_fn(TF_A_PM_REGISTER_SGI, sgi_num, reset, 0, 0,
- NULL);
+ 0, NULL);
if (!ret)
return ret;
/* try old implementation as fallback strategy if above fails */
return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_REGISTER_SGI, sgi_num,
- reset, NULL);
+ reset, 0, NULL);
}
/**
@@ -376,7 +382,7 @@ int zynqmp_pm_get_api_version(u32 *version)
*version = pm_api_version;
return 0;
}
- ret = zynqmp_pm_invoke_fn(PM_GET_API_VERSION, 0, 0, 0, 0, ret_payload);
+ ret = zynqmp_pm_invoke_fn(PM_GET_API_VERSION, 0, 0, 0, 0, 0, ret_payload);
*version = ret_payload[1];
return ret;
@@ -399,7 +405,7 @@ int zynqmp_pm_get_chipid(u32 *idcode, u32 *version)
if (!idcode || !version)
return -EINVAL;
- ret = zynqmp_pm_invoke_fn(PM_GET_CHIPID, 0, 0, 0, 0, ret_payload);
+ ret = zynqmp_pm_invoke_fn(PM_GET_CHIPID, 0, 0, 0, 0, 0, ret_payload);
*idcode = ret_payload[1];
*version = ret_payload[2];
@@ -427,7 +433,7 @@ static int zynqmp_pm_get_family_info(u32 *family, u32 *subfamily)
return 0;
}
- ret = zynqmp_pm_invoke_fn(PM_GET_CHIPID, 0, 0, 0, 0, ret_payload);
+ ret = zynqmp_pm_invoke_fn(PM_GET_CHIPID, 0, 0, 0, 0, 0, ret_payload);
if (ret < 0)
return ret;
@@ -460,7 +466,7 @@ static int zynqmp_pm_get_trustzone_version(u32 *version)
return 0;
}
ret = zynqmp_pm_invoke_fn(PM_GET_TRUSTZONE_VERSION, 0, 0,
- 0, 0, ret_payload);
+ 0, 0, 0, ret_payload);
*version = ret_payload[1];
return ret;
@@ -508,7 +514,7 @@ int zynqmp_pm_query_data(struct zynqmp_pm_query_data qdata, u32 *out)
int ret;
ret = zynqmp_pm_invoke_fn(PM_QUERY_DATA, qdata.qid, qdata.arg1,
- qdata.arg2, qdata.arg3, out);
+ qdata.arg2, qdata.arg3, 0, out);
/*
* For clock name query, all bytes in SMC response are clock name
@@ -530,7 +536,8 @@ EXPORT_SYMBOL_GPL(zynqmp_pm_query_data);
*/
int zynqmp_pm_clock_enable(u32 clock_id)
{
- return zynqmp_pm_invoke_fn(PM_CLOCK_ENABLE, clock_id, 0, 0, 0, NULL);
+ return zynqmp_pm_invoke_fn(PM_CLOCK_ENABLE, clock_id, 0, 0, 0, 0,
+ NULL);
}
EXPORT_SYMBOL_GPL(zynqmp_pm_clock_enable);
@@ -545,7 +552,8 @@ EXPORT_SYMBOL_GPL(zynqmp_pm_clock_enable);
*/
int zynqmp_pm_clock_disable(u32 clock_id)
{
- return zynqmp_pm_invoke_fn(PM_CLOCK_DISABLE, clock_id, 0, 0, 0, NULL);
+ return zynqmp_pm_invoke_fn(PM_CLOCK_DISABLE, clock_id, 0, 0, 0, 0,
+ NULL);
}
EXPORT_SYMBOL_GPL(zynqmp_pm_clock_disable);
@@ -565,7 +573,7 @@ int zynqmp_pm_clock_getstate(u32 clock_id, u32 *state)
int ret;
ret = zynqmp_pm_invoke_fn(PM_CLOCK_GETSTATE, clock_id, 0,
- 0, 0, ret_payload);
+ 0, 0, 0, ret_payload);
*state = ret_payload[1];
return ret;
@@ -585,7 +593,7 @@ EXPORT_SYMBOL_GPL(zynqmp_pm_clock_getstate);
int zynqmp_pm_clock_setdivider(u32 clock_id, u32 divider)
{
return zynqmp_pm_invoke_fn(PM_CLOCK_SETDIVIDER, clock_id, divider,
- 0, 0, NULL);
+ 0, 0, 0, NULL);
}
EXPORT_SYMBOL_GPL(zynqmp_pm_clock_setdivider);
@@ -605,7 +613,7 @@ int zynqmp_pm_clock_getdivider(u32 clock_id, u32 *divider)
int ret;
ret = zynqmp_pm_invoke_fn(PM_CLOCK_GETDIVIDER, clock_id, 0,
- 0, 0, ret_payload);
+ 0, 0, 0, ret_payload);
*divider = ret_payload[1];
return ret;
@@ -626,7 +634,7 @@ int zynqmp_pm_clock_setrate(u32 clock_id, u64 rate)
return zynqmp_pm_invoke_fn(PM_CLOCK_SETRATE, clock_id,
lower_32_bits(rate),
upper_32_bits(rate),
- 0, NULL);
+ 0, 0, NULL);
}
EXPORT_SYMBOL_GPL(zynqmp_pm_clock_setrate);
@@ -646,7 +654,7 @@ int zynqmp_pm_clock_getrate(u32 clock_id, u64 *rate)
int ret;
ret = zynqmp_pm_invoke_fn(PM_CLOCK_GETRATE, clock_id, 0,
- 0, 0, ret_payload);
+ 0, 0, 0, ret_payload);
*rate = ((u64)ret_payload[2] << 32) | ret_payload[1];
return ret;
@@ -665,7 +673,7 @@ EXPORT_SYMBOL_GPL(zynqmp_pm_clock_getrate);
int zynqmp_pm_clock_setparent(u32 clock_id, u32 parent_id)
{
return zynqmp_pm_invoke_fn(PM_CLOCK_SETPARENT, clock_id,
- parent_id, 0, 0, NULL);
+ parent_id, 0, 0, 0, NULL);
}
EXPORT_SYMBOL_GPL(zynqmp_pm_clock_setparent);
@@ -685,7 +693,7 @@ int zynqmp_pm_clock_getparent(u32 clock_id, u32 *parent_id)
int ret;
ret = zynqmp_pm_invoke_fn(PM_CLOCK_GETPARENT, clock_id, 0,
- 0, 0, ret_payload);
+ 0, 0, 0, ret_payload);
*parent_id = ret_payload[1];
return ret;
@@ -705,7 +713,7 @@ EXPORT_SYMBOL_GPL(zynqmp_pm_clock_getparent);
int zynqmp_pm_set_pll_frac_mode(u32 clk_id, u32 mode)
{
return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_SET_PLL_FRAC_MODE,
- clk_id, mode, NULL);
+ clk_id, mode, 0, NULL);
}
EXPORT_SYMBOL_GPL(zynqmp_pm_set_pll_frac_mode);
@@ -722,7 +730,7 @@ EXPORT_SYMBOL_GPL(zynqmp_pm_set_pll_frac_mode);
int zynqmp_pm_get_pll_frac_mode(u32 clk_id, u32 *mode)
{
return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_GET_PLL_FRAC_MODE,
- clk_id, 0, mode);
+ clk_id, 0, 0, mode);
}
EXPORT_SYMBOL_GPL(zynqmp_pm_get_pll_frac_mode);
@@ -740,7 +748,7 @@ EXPORT_SYMBOL_GPL(zynqmp_pm_get_pll_frac_mode);
int zynqmp_pm_set_pll_frac_data(u32 clk_id, u32 data)
{
return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_SET_PLL_FRAC_DATA,
- clk_id, data, NULL);
+ clk_id, data, 0, NULL);
}
EXPORT_SYMBOL_GPL(zynqmp_pm_set_pll_frac_data);
@@ -757,7 +765,7 @@ EXPORT_SYMBOL_GPL(zynqmp_pm_set_pll_frac_data);
int zynqmp_pm_get_pll_frac_data(u32 clk_id, u32 *data)
{
return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_GET_PLL_FRAC_DATA,
- clk_id, 0, data);
+ clk_id, 0, 0, data);
}
EXPORT_SYMBOL_GPL(zynqmp_pm_get_pll_frac_data);
@@ -780,7 +788,7 @@ int zynqmp_pm_set_sd_tapdelay(u32 node_id, u32 type, u32 value)
if (value) {
return zynqmp_pm_invoke_fn(PM_IOCTL, node_id,
IOCTL_SET_SD_TAPDELAY,
- type, value, NULL);
+ type, value, 0, NULL);
}
/*
@@ -798,7 +806,7 @@ int zynqmp_pm_set_sd_tapdelay(u32 node_id, u32 type, u32 value)
* Use PM_MMIO_READ/PM_MMIO_WRITE to re-implement the missing counter
* part of IOCTL_SET_SD_TAPDELAY which clears SDx_ITAPDLYENA bits.
*/
- return zynqmp_pm_invoke_fn(PM_MMIO_WRITE, reg, mask, 0, 0, NULL);
+ return zynqmp_pm_invoke_fn(PM_MMIO_WRITE, reg, mask, 0, 0, 0, NULL);
}
EXPORT_SYMBOL_GPL(zynqmp_pm_set_sd_tapdelay);
@@ -815,7 +823,7 @@ EXPORT_SYMBOL_GPL(zynqmp_pm_set_sd_tapdelay);
int zynqmp_pm_sd_dll_reset(u32 node_id, u32 type)
{
return zynqmp_pm_invoke_fn(PM_IOCTL, node_id, IOCTL_SD_DLL_RESET,
- type, 0, NULL);
+ type, 0, 0, NULL);
}
EXPORT_SYMBOL_GPL(zynqmp_pm_sd_dll_reset);
@@ -832,7 +840,7 @@ EXPORT_SYMBOL_GPL(zynqmp_pm_sd_dll_reset);
int zynqmp_pm_ospi_mux_select(u32 dev_id, u32 select)
{
return zynqmp_pm_invoke_fn(PM_IOCTL, dev_id, IOCTL_OSPI_MUX_SELECT,
- select, 0, NULL);
+ select, 0, 0, NULL);
}
EXPORT_SYMBOL_GPL(zynqmp_pm_ospi_mux_select);
@@ -848,7 +856,7 @@ EXPORT_SYMBOL_GPL(zynqmp_pm_ospi_mux_select);
int zynqmp_pm_write_ggs(u32 index, u32 value)
{
return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_WRITE_GGS,
- index, value, NULL);
+ index, value, 0, NULL);
}
EXPORT_SYMBOL_GPL(zynqmp_pm_write_ggs);
@@ -864,7 +872,7 @@ EXPORT_SYMBOL_GPL(zynqmp_pm_write_ggs);
int zynqmp_pm_read_ggs(u32 index, u32 *value)
{
return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_READ_GGS,
- index, 0, value);
+ index, 0, 0, value);
}
EXPORT_SYMBOL_GPL(zynqmp_pm_read_ggs);
@@ -881,7 +889,7 @@ EXPORT_SYMBOL_GPL(zynqmp_pm_read_ggs);
int zynqmp_pm_write_pggs(u32 index, u32 value)
{
return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_WRITE_PGGS, index, value,
- NULL);
+ 0, NULL);
}
EXPORT_SYMBOL_GPL(zynqmp_pm_write_pggs);
@@ -898,14 +906,14 @@ EXPORT_SYMBOL_GPL(zynqmp_pm_write_pggs);
int zynqmp_pm_read_pggs(u32 index, u32 *value)
{
return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_READ_PGGS, index, 0,
- value);
+ 0, value);
}
EXPORT_SYMBOL_GPL(zynqmp_pm_read_pggs);
int zynqmp_pm_set_tapdelay_bypass(u32 index, u32 value)
{
return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_SET_TAPDELAY_BYPASS,
- index, value, NULL);
+ index, value, 0, NULL);
}
EXPORT_SYMBOL_GPL(zynqmp_pm_set_tapdelay_bypass);
@@ -921,7 +929,7 @@ EXPORT_SYMBOL_GPL(zynqmp_pm_set_tapdelay_bypass);
int zynqmp_pm_set_boot_health_status(u32 value)
{
return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_SET_BOOT_HEALTH_STATUS,
- value, 0, NULL);
+ value, 0, 0, NULL);
}
/**
@@ -936,7 +944,7 @@ int zynqmp_pm_reset_assert(const enum zynqmp_pm_reset reset,
const enum zynqmp_pm_reset_action assert_flag)
{
return zynqmp_pm_invoke_fn(PM_RESET_ASSERT, reset, assert_flag,
- 0, 0, NULL);
+ 0, 0, 0, NULL);
}
EXPORT_SYMBOL_GPL(zynqmp_pm_reset_assert);
@@ -956,7 +964,7 @@ int zynqmp_pm_reset_get_status(const enum zynqmp_pm_reset reset, u32 *status)
return -EINVAL;
ret = zynqmp_pm_invoke_fn(PM_RESET_GET_STATUS, reset, 0,
- 0, 0, ret_payload);
+ 0, 0, 0, ret_payload);
*status = ret_payload[1];
return ret;
@@ -982,7 +990,7 @@ int zynqmp_pm_fpga_load(const u64 address, const u32 size, const u32 flags)
int ret;
ret = zynqmp_pm_invoke_fn(PM_FPGA_LOAD, lower_32_bits(address),
- upper_32_bits(address), size, flags,
+ upper_32_bits(address), size, flags, 0,
ret_payload);
if (ret_payload[0])
return -ret_payload[0];
@@ -1008,7 +1016,8 @@ int zynqmp_pm_fpga_get_status(u32 *value)
if (!value)
return -EINVAL;
- ret = zynqmp_pm_invoke_fn(PM_FPGA_GET_STATUS, 0, 0, 0, 0, ret_payload);
+ ret = zynqmp_pm_invoke_fn(PM_FPGA_GET_STATUS, 0, 0, 0, 0, 0,
+ ret_payload);
*value = ret_payload[1];
return ret;
@@ -1039,7 +1048,7 @@ int zynqmp_pm_fpga_get_config_status(u32 *value)
ret = zynqmp_pm_invoke_fn(PM_FPGA_READ,
XILINX_ZYNQMP_PM_FPGA_CONFIG_STAT_OFFSET,
lower_addr, upper_addr,
- XILINX_ZYNQMP_PM_FPGA_READ_CONFIG_REG,
+ XILINX_ZYNQMP_PM_FPGA_READ_CONFIG_REG, 0,
ret_payload);
*value = ret_payload[1];
@@ -1058,7 +1067,7 @@ EXPORT_SYMBOL_GPL(zynqmp_pm_fpga_get_config_status);
*/
int zynqmp_pm_pinctrl_request(const u32 pin)
{
- return zynqmp_pm_invoke_fn(PM_PINCTRL_REQUEST, pin, 0, 0, 0, NULL);
+ return zynqmp_pm_invoke_fn(PM_PINCTRL_REQUEST, pin, 0, 0, 0, 0, NULL);
}
EXPORT_SYMBOL_GPL(zynqmp_pm_pinctrl_request);
@@ -1072,7 +1081,7 @@ EXPORT_SYMBOL_GPL(zynqmp_pm_pinctrl_request);
*/
int zynqmp_pm_pinctrl_release(const u32 pin)
{
- return zynqmp_pm_invoke_fn(PM_PINCTRL_RELEASE, pin, 0, 0, 0, NULL);
+ return zynqmp_pm_invoke_fn(PM_PINCTRL_RELEASE, pin, 0, 0, 0, 0, NULL);
}
EXPORT_SYMBOL_GPL(zynqmp_pm_pinctrl_release);
@@ -1094,7 +1103,7 @@ int zynqmp_pm_pinctrl_get_function(const u32 pin, u32 *id)
return -EINVAL;
ret = zynqmp_pm_invoke_fn(PM_PINCTRL_GET_FUNCTION, pin, 0,
- 0, 0, ret_payload);
+ 0, 0, 0, ret_payload);
*id = ret_payload[1];
return ret;
@@ -1113,7 +1122,7 @@ EXPORT_SYMBOL_GPL(zynqmp_pm_pinctrl_get_function);
int zynqmp_pm_pinctrl_set_function(const u32 pin, const u32 id)
{
return zynqmp_pm_invoke_fn(PM_PINCTRL_SET_FUNCTION, pin, id,
- 0, 0, NULL);
+ 0, 0, 0, NULL);
}
EXPORT_SYMBOL_GPL(zynqmp_pm_pinctrl_set_function);
@@ -1137,7 +1146,7 @@ int zynqmp_pm_pinctrl_get_config(const u32 pin, const u32 param,
return -EINVAL;
ret = zynqmp_pm_invoke_fn(PM_PINCTRL_CONFIG_PARAM_GET, pin, param,
- 0, 0, ret_payload);
+ 0, 0, 0, ret_payload);
*value = ret_payload[1];
return ret;
@@ -1167,7 +1176,7 @@ int zynqmp_pm_pinctrl_set_config(const u32 pin, const u32 param,
}
return zynqmp_pm_invoke_fn(PM_PINCTRL_CONFIG_PARAM_SET, pin,
- param, value, 0, NULL);
+ param, value, 0, 0, NULL);
}
EXPORT_SYMBOL_GPL(zynqmp_pm_pinctrl_set_config);
@@ -1186,7 +1195,7 @@ unsigned int zynqmp_pm_bootmode_read(u32 *ps_mode)
u32 ret_payload[PAYLOAD_ARG_CNT];
ret = zynqmp_pm_invoke_fn(PM_MMIO_READ, CRL_APB_BOOT_PIN_CTRL, 0,
- 0, 0, ret_payload);
+ 0, 0, 0, ret_payload);
*ps_mode = ret_payload[1];
@@ -1206,7 +1215,8 @@ EXPORT_SYMBOL_GPL(zynqmp_pm_bootmode_read);
int zynqmp_pm_bootmode_write(u32 ps_mode)
{
return zynqmp_pm_invoke_fn(PM_MMIO_WRITE, CRL_APB_BOOT_PIN_CTRL,
- CRL_APB_BOOTPIN_CTRL_MASK, ps_mode, 0, NULL);
+ CRL_APB_BOOTPIN_CTRL_MASK, ps_mode, 0,
+ 0, NULL);
}
EXPORT_SYMBOL_GPL(zynqmp_pm_bootmode_write);
@@ -1221,7 +1231,7 @@ EXPORT_SYMBOL_GPL(zynqmp_pm_bootmode_write);
*/
int zynqmp_pm_init_finalize(void)
{
- return zynqmp_pm_invoke_fn(PM_PM_INIT_FINALIZE, 0, 0, 0, 0, NULL);
+ return zynqmp_pm_invoke_fn(PM_PM_INIT_FINALIZE, 0, 0, 0, 0, 0, NULL);
}
EXPORT_SYMBOL_GPL(zynqmp_pm_init_finalize);
@@ -1235,7 +1245,7 @@ EXPORT_SYMBOL_GPL(zynqmp_pm_init_finalize);
*/
int zynqmp_pm_set_suspend_mode(u32 mode)
{
- return zynqmp_pm_invoke_fn(PM_SET_SUSPEND_MODE, mode, 0, 0, 0, NULL);
+ return zynqmp_pm_invoke_fn(PM_SET_SUSPEND_MODE, mode, 0, 0, 0, 0, NULL);
}
EXPORT_SYMBOL_GPL(zynqmp_pm_set_suspend_mode);
@@ -1255,7 +1265,7 @@ int zynqmp_pm_request_node(const u32 node, const u32 capabilities,
const u32 qos, const enum zynqmp_pm_request_ack ack)
{
return zynqmp_pm_invoke_fn(PM_REQUEST_NODE, node, capabilities,
- qos, ack, NULL);
+ qos, ack, 0, NULL);
}
EXPORT_SYMBOL_GPL(zynqmp_pm_request_node);
@@ -1271,7 +1281,7 @@ EXPORT_SYMBOL_GPL(zynqmp_pm_request_node);
*/
int zynqmp_pm_release_node(const u32 node)
{
- return zynqmp_pm_invoke_fn(PM_RELEASE_NODE, node, 0, 0, 0, NULL);
+ return zynqmp_pm_invoke_fn(PM_RELEASE_NODE, node, 0, 0, 0, 0, NULL);
}
EXPORT_SYMBOL_GPL(zynqmp_pm_release_node);
@@ -1291,7 +1301,8 @@ int zynqmp_pm_get_rpu_mode(u32 node_id, enum rpu_oper_mode *rpu_mode)
int ret;
ret = zynqmp_pm_invoke_fn(PM_IOCTL, node_id,
- IOCTL_GET_RPU_OPER_MODE, 0, 0, ret_payload);
+ IOCTL_GET_RPU_OPER_MODE, 0, 0, 0,
+ ret_payload);
/* only set rpu_mode if no error */
if (ret == XST_PM_SUCCESS)
@@ -1315,7 +1326,7 @@ int zynqmp_pm_set_rpu_mode(u32 node_id, enum rpu_oper_mode rpu_mode)
{
return zynqmp_pm_invoke_fn(PM_IOCTL, node_id,
IOCTL_SET_RPU_OPER_MODE, (u32)rpu_mode,
- 0, NULL);
+ 0, 0, NULL);
}
EXPORT_SYMBOL_GPL(zynqmp_pm_set_rpu_mode);
@@ -1333,7 +1344,7 @@ int zynqmp_pm_set_tcm_config(u32 node_id, enum rpu_tcm_comb tcm_mode)
{
return zynqmp_pm_invoke_fn(PM_IOCTL, node_id,
IOCTL_TCM_COMB_CONFIG, (u32)tcm_mode, 0,
- NULL);
+ 0, NULL);
}
EXPORT_SYMBOL_GPL(zynqmp_pm_set_tcm_config);
@@ -1348,7 +1359,8 @@ EXPORT_SYMBOL_GPL(zynqmp_pm_set_tcm_config);
int zynqmp_pm_force_pwrdwn(const u32 node,
const enum zynqmp_pm_request_ack ack)
{
- return zynqmp_pm_invoke_fn(PM_FORCE_POWERDOWN, node, ack, 0, 0, NULL);
+ return zynqmp_pm_invoke_fn(PM_FORCE_POWERDOWN, node, ack, 0, 0, 0,
+ NULL);
}
EXPORT_SYMBOL_GPL(zynqmp_pm_force_pwrdwn);
@@ -1368,7 +1380,7 @@ int zynqmp_pm_request_wake(const u32 node,
{
/* set_addr flag is encoded into 1st bit of address */
return zynqmp_pm_invoke_fn(PM_REQUEST_WAKEUP, node, address | set_addr,
- address >> 32, ack, NULL);
+ address >> 32, ack, 0, NULL);
}
EXPORT_SYMBOL_GPL(zynqmp_pm_request_wake);
@@ -1389,7 +1401,7 @@ int zynqmp_pm_set_requirement(const u32 node, const u32 capabilities,
const enum zynqmp_pm_request_ack ack)
{
return zynqmp_pm_invoke_fn(PM_SET_REQUIREMENT, node, capabilities,
- qos, ack, NULL);
+ qos, ack, 0, NULL);
}
EXPORT_SYMBOL_GPL(zynqmp_pm_set_requirement);
@@ -1406,7 +1418,8 @@ int zynqmp_pm_load_pdi(const u32 src, const u64 address)
{
return zynqmp_pm_invoke_fn(PM_LOAD_PDI, src,
lower_32_bits(address),
- upper_32_bits(address), 0, NULL);
+ upper_32_bits(address), 0,
+ 0, NULL);
}
EXPORT_SYMBOL_GPL(zynqmp_pm_load_pdi);
@@ -1428,7 +1441,7 @@ int zynqmp_pm_aes_engine(const u64 address, u32 *out)
ret = zynqmp_pm_invoke_fn(PM_SECURE_AES, upper_32_bits(address),
lower_32_bits(address),
- 0, 0, ret_payload);
+ 0, 0, 0, ret_payload);
*out = ret_payload[1];
return ret;
@@ -1457,7 +1470,7 @@ int zynqmp_pm_sha_hash(const u64 address, const u32 size, const u32 flags)
u32 upper_addr = upper_32_bits(address);
return zynqmp_pm_invoke_fn(PM_SECURE_SHA, upper_addr, lower_addr,
- size, flags, NULL);
+ size, flags, 0, NULL);
}
EXPORT_SYMBOL_GPL(zynqmp_pm_sha_hash);
@@ -1480,7 +1493,7 @@ int zynqmp_pm_register_notifier(const u32 node, const u32 event,
const u32 wake, const u32 enable)
{
return zynqmp_pm_invoke_fn(PM_REGISTER_NOTIFIER, node, event,
- wake, enable, NULL);
+ wake, enable, 0, NULL);
}
EXPORT_SYMBOL_GPL(zynqmp_pm_register_notifier);
@@ -1494,7 +1507,7 @@ EXPORT_SYMBOL_GPL(zynqmp_pm_register_notifier);
int zynqmp_pm_system_shutdown(const u32 type, const u32 subtype)
{
return zynqmp_pm_invoke_fn(PM_SYSTEM_SHUTDOWN, type, subtype,
- 0, 0, NULL);
+ 0, 0, 0, NULL);
}
/**
@@ -1507,7 +1520,7 @@ int zynqmp_pm_system_shutdown(const u32 type, const u32 subtype)
int zynqmp_pm_set_feature_config(enum pm_feature_config_id id, u32 value)
{
return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_SET_FEATURE_CONFIG,
- id, value, NULL);
+ id, value, 0, NULL);
}
/**
@@ -1521,7 +1534,7 @@ int zynqmp_pm_get_feature_config(enum pm_feature_config_id id,
u32 *payload)
{
return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_GET_FEATURE_CONFIG,
- id, 0, payload);
+ id, 0, 0, payload);
}
/**
@@ -1535,7 +1548,7 @@ int zynqmp_pm_get_feature_config(enum pm_feature_config_id id,
int zynqmp_pm_set_sd_config(u32 node, enum pm_sd_config_type config, u32 value)
{
return zynqmp_pm_invoke_fn(PM_IOCTL, node, IOCTL_SET_SD_CONFIG,
- config, value, NULL);
+ config, value, 0, NULL);
}
EXPORT_SYMBOL_GPL(zynqmp_pm_set_sd_config);
@@ -1551,7 +1564,7 @@ int zynqmp_pm_set_gem_config(u32 node, enum pm_gem_config_type config,
u32 value)
{
return zynqmp_pm_invoke_fn(PM_IOCTL, node, IOCTL_SET_GEM_CONFIG,
- config, value, NULL);
+ config, value, 0, NULL);
}
EXPORT_SYMBOL_GPL(zynqmp_pm_set_gem_config);
diff --git a/drivers/soc/xilinx/xlnx_event_manager.c b/drivers/soc/xilinx/xlnx_event_manager.c
index 86a048a10a13..38cfc161a713 100644
--- a/drivers/soc/xilinx/xlnx_event_manager.c
+++ b/drivers/soc/xilinx/xlnx_event_manager.c
@@ -483,7 +483,7 @@ static void xlnx_call_notify_cb_handler(const u32 *payload)
static void xlnx_get_event_callback_data(u32 *buf)
{
- zynqmp_pm_invoke_fn(GET_CALLBACK_DATA, 0, 0, 0, 0, buf);
+ zynqmp_pm_invoke_fn(GET_CALLBACK_DATA, 0, 0, 0, 0, 0, buf);
}
static irqreturn_t xlnx_event_handler(int irq, void *dev_id)
diff --git a/drivers/soc/xilinx/zynqmp_power.c b/drivers/soc/xilinx/zynqmp_power.c
index c2c819701eec..52a868a09106 100644
--- a/drivers/soc/xilinx/zynqmp_power.c
+++ b/drivers/soc/xilinx/zynqmp_power.c
@@ -51,7 +51,7 @@ static enum pm_suspend_mode suspend_mode = PM_SUSPEND_MODE_STD;
static void zynqmp_pm_get_callback_data(u32 *buf)
{
- zynqmp_pm_invoke_fn(GET_CALLBACK_DATA, 0, 0, 0, 0, buf);
+ zynqmp_pm_invoke_fn(GET_CALLBACK_DATA, 0, 0, 0, 0, 0, buf);
}
static void suspend_event_callback(const u32 *payload, void *data)
diff --git a/include/linux/firmware/xlnx-zynqmp.h b/include/linux/firmware/xlnx-zynqmp.h
index e8b12ec8b060..9e2d8e02d9e6 100644
--- a/include/linux/firmware/xlnx-zynqmp.h
+++ b/include/linux/firmware/xlnx-zynqmp.h
@@ -498,7 +498,7 @@ struct zynqmp_pm_query_data {
};
int zynqmp_pm_invoke_fn(u32 pm_api_id, u32 arg0, u32 arg1,
- u32 arg2, u32 arg3, u32 *ret_payload);
+ u32 arg2, u32 arg3, u32 arg4, u32 *ret_payload);
#if IS_REACHABLE(CONFIG_ZYNQMP_FIRMWARE)
int zynqmp_pm_get_api_version(u32 *version);
--
2.25.1
^ permalink raw reply related [flat|nested] 20+ messages in thread
* [PATCH v2 2/6] firmware: xilinx: Expand feature check to support all PLM modules
2023-10-04 9:41 [PATCH v2 0/6] update for versal net platform Jay Buddhabhatti
2023-10-04 9:41 ` [PATCH v2 1/6] firmware: xilinx: Update firmware call interface to support additional arg Jay Buddhabhatti
@ 2023-10-04 9:41 ` Jay Buddhabhatti
2023-10-04 11:30 ` Michal Simek
2023-10-04 9:41 ` [PATCH v2 3/6] firmware: xilinx: Register event manager driver Jay Buddhabhatti
` (4 subsequent siblings)
6 siblings, 1 reply; 20+ messages in thread
From: Jay Buddhabhatti @ 2023-10-04 9:41 UTC (permalink / raw
To: michal.simek, tanmay.shah, gregkh, nava.kishore.manne,
ben.levinsky, robh, dhaval.r.shah, marex, izhar.ameer.shaikh,
arnd, ruanjinjie, mathieu.poirier
Cc: linux-kernel, linux-arm-kernel, Jay Buddhabhatti, Saeed Nowshadi
To support feature check for all modules, append the module id of the API
that is being checked to the feature check API so it could be routed to
the target module for processing.
There is no need to check compatible string becuase the board information
is taken via firmware interface.
Co-developed-by: Saeed Nowshadi <saeed.nowshadi@amd.com>
Signed-off-by: Saeed Nowshadi <saeed.nowshadi@amd.com>
Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
---
drivers/firmware/xilinx/zynqmp.c | 45 +++++++++++++++++-----------
include/linux/firmware/xlnx-zynqmp.h | 11 +++++++
2 files changed, 39 insertions(+), 17 deletions(-)
diff --git a/drivers/firmware/xilinx/zynqmp.c b/drivers/firmware/xilinx/zynqmp.c
index d102619fd6f4..5f40288f69a9 100644
--- a/drivers/firmware/xilinx/zynqmp.c
+++ b/drivers/firmware/xilinx/zynqmp.c
@@ -182,9 +182,33 @@ static int __do_feature_check_call(const u32 api_id, u32 *ret_payload)
{
int ret;
u64 smc_arg[2];
+ u32 module_id;
+ u32 feature_check_api_id;
- smc_arg[0] = PM_SIP_SVC | PM_FEATURE_CHECK;
- smc_arg[1] = api_id;
+ module_id = FIELD_GET(MODULE_ID_MASK, api_id);
+
+ /*
+ * Feature check of APIs belonging to PM, XSEM, and TF-A are
+ * handled by calling PM_FEATURE_CHECK API. For other modules,
+ * call PM_API_FEATURES API.
+ */
+ if (module_id == PM_MODULE_ID || module_id == XSEM_MODULE_ID ||
+ module_id == TF_A_MODULE_ID)
+ feature_check_api_id = PM_FEATURE_CHECK;
+ else
+ feature_check_api_id = PM_API_FEATURES;
+
+ /*
+ * Feature check of TF-A APIs is done in the TF-A layer
+ * and it expects for MODULE_ID_MASK bits of SMC's arg[0] to
+ * be the same as PM_MODULE_ID.
+ */
+ if (module_id == TF_A_MODULE_ID)
+ module_id = PM_MODULE_ID;
+
+ smc_arg[0] = PM_SIP_SVC | FIELD_PREP(MODULE_ID_MASK, module_id) |
+ feature_check_api_id;
+ smc_arg[1] = (api_id & API_ID_MASK);
ret = do_fw_call(smc_arg[0], smc_arg[1], 0, 0, ret_payload);
if (ret)
@@ -1937,22 +1961,9 @@ static int zynqmp_firmware_probe(struct platform_device *pdev)
if (ret)
return ret;
- np = of_find_compatible_node(NULL, NULL, "xlnx,zynqmp");
- if (!np) {
- np = of_find_compatible_node(NULL, NULL, "xlnx,versal");
- if (!np)
- return 0;
-
+ ret = do_feature_check_call(PM_FEATURE_CHECK);
+ if (ret >= 0 && ((ret & FIRMWARE_VERSION_MASK) >= PM_API_VERSION_1))
feature_check_enabled = true;
- }
-
- if (!feature_check_enabled) {
- ret = do_feature_check_call(PM_FEATURE_CHECK);
- if (ret >= 0)
- feature_check_enabled = true;
- }
-
- of_node_put(np);
devinfo = devm_kzalloc(dev, sizeof(*devinfo), GFP_KERNEL);
if (!devinfo)
diff --git a/include/linux/firmware/xlnx-zynqmp.h b/include/linux/firmware/xlnx-zynqmp.h
index 9e2d8e02d9e6..86fb73269d95 100644
--- a/include/linux/firmware/xlnx-zynqmp.h
+++ b/include/linux/firmware/xlnx-zynqmp.h
@@ -32,6 +32,7 @@
#define PM_SIP_SVC 0xC2000000
/* PM API versions */
+#define PM_API_VERSION_1 1
#define PM_API_VERSION_2 2
#define PM_PINCTRL_PARAM_SET_VERSION 2
@@ -47,6 +48,9 @@
#define FAMILY_CODE_MASK GENMASK(27, 21)
#define SUB_FAMILY_CODE_MASK GENMASK(20, 19)
+#define API_ID_MASK GENMASK(7, 0)
+#define MODULE_ID_MASK GENMASK(11, 8)
+
/* ATF only commands */
#define TF_A_PM_REGISTER_SGI 0xa04
#define PM_GET_TRUSTZONE_VERSION 0xa03
@@ -100,6 +104,12 @@
#define SD_ITAPDLY 0xFF180314
#define SD_OTAPDLYSEL 0xFF180318
+enum pm_module_id {
+ PM_MODULE_ID = 0x0,
+ XSEM_MODULE_ID = 0x3,
+ TF_A_MODULE_ID = 0xa,
+};
+
enum pm_api_cb_id {
PM_INIT_SUSPEND_CB = 30,
PM_ACKNOWLEDGE_CB = 31,
@@ -107,6 +117,7 @@ enum pm_api_cb_id {
};
enum pm_api_id {
+ PM_API_FEATURES = 0,
PM_GET_API_VERSION = 1,
PM_REGISTER_NOTIFIER = 5,
PM_FORCE_POWERDOWN = 8,
--
2.25.1
^ permalink raw reply related [flat|nested] 20+ messages in thread
* [PATCH v2 3/6] firmware: xilinx: Register event manager driver
2023-10-04 9:41 [PATCH v2 0/6] update for versal net platform Jay Buddhabhatti
2023-10-04 9:41 ` [PATCH v2 1/6] firmware: xilinx: Update firmware call interface to support additional arg Jay Buddhabhatti
2023-10-04 9:41 ` [PATCH v2 2/6] firmware: xilinx: Expand feature check to support all PLM modules Jay Buddhabhatti
@ 2023-10-04 9:41 ` Jay Buddhabhatti
2023-10-04 9:41 ` [PATCH v2 4/6] drivers: soc: xilinx: Fix error message on SGI registration failure Jay Buddhabhatti
` (3 subsequent siblings)
6 siblings, 0 replies; 20+ messages in thread
From: Jay Buddhabhatti @ 2023-10-04 9:41 UTC (permalink / raw
To: michal.simek, tanmay.shah, gregkh, nava.kishore.manne,
ben.levinsky, robh, dhaval.r.shah, marex, izhar.ameer.shaikh,
arnd, ruanjinjie, mathieu.poirier
Cc: linux-kernel, linux-arm-kernel, Jay Buddhabhatti
Use family code in order to register event manager
driver for Versal and Versal NET platforms, instead
of using compatible string.
Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
---
drivers/firmware/xilinx/zynqmp.c | 5 +----
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git a/drivers/firmware/xilinx/zynqmp.c b/drivers/firmware/xilinx/zynqmp.c
index 5f40288f69a9..00ea2508f692 100644
--- a/drivers/firmware/xilinx/zynqmp.c
+++ b/drivers/firmware/xilinx/zynqmp.c
@@ -1953,7 +1953,6 @@ ATTRIBUTE_GROUPS(zynqmp_firmware);
static int zynqmp_firmware_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
- struct device_node *np;
struct zynqmp_devinfo *devinfo;
int ret;
@@ -2016,14 +2015,12 @@ static int zynqmp_firmware_probe(struct platform_device *pdev)
zynqmp_pm_api_debugfs_init();
- np = of_find_compatible_node(NULL, NULL, "xlnx,versal");
- if (np) {
+ if (pm_family_code == VERSAL_FAMILY_CODE) {
em_dev = platform_device_register_data(&pdev->dev, "xlnx_event_manager",
-1, NULL, 0);
if (IS_ERR(em_dev))
dev_err_probe(&pdev->dev, PTR_ERR(em_dev), "EM register fail with error\n");
}
- of_node_put(np);
return of_platform_populate(dev->of_node, NULL, NULL, dev);
}
--
2.25.1
^ permalink raw reply related [flat|nested] 20+ messages in thread
* [PATCH v2 4/6] drivers: soc: xilinx: Fix error message on SGI registration failure
2023-10-04 9:41 [PATCH v2 0/6] update for versal net platform Jay Buddhabhatti
` (2 preceding siblings ...)
2023-10-04 9:41 ` [PATCH v2 3/6] firmware: xilinx: Register event manager driver Jay Buddhabhatti
@ 2023-10-04 9:41 ` Jay Buddhabhatti
2023-10-04 12:15 ` Greg KH
2023-10-04 9:41 ` [PATCH v2 5/6] firmware: zynqmp: Add support to handle IPI CRC failure Jay Buddhabhatti
` (2 subsequent siblings)
6 siblings, 1 reply; 20+ messages in thread
From: Jay Buddhabhatti @ 2023-10-04 9:41 UTC (permalink / raw
To: michal.simek, tanmay.shah, gregkh, nava.kishore.manne,
ben.levinsky, robh, dhaval.r.shah, marex, izhar.ameer.shaikh,
arnd, ruanjinjie, mathieu.poirier
Cc: linux-kernel, linux-arm-kernel, Jay Buddhabhatti
Failure to register SGI for firmware event notification is non-fatal error
when feature is not supported by other modules such as Xen and TF-A. Add
_info level log message for such special case.
Also add XST_PM_INVALID_VERSION error code and map it to -EOPNOSUPP Linux
kernel error code. If feature is not supported or EEMI API version is
mismatch, firmware can return XST_PM_INVALID_VERSION = 4 or
XST_PM_NO_FEATURE = 19 error code.
Co-developed-by: Tanmay Shah <tanmay.shah@amd.com>
Signed-off-by: Tanmay Shah <tanmay.shah@amd.com>
Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
---
drivers/firmware/xilinx/zynqmp.c | 4 +++-
drivers/soc/xilinx/xlnx_event_manager.c | 7 ++++++-
include/linux/firmware/xlnx-zynqmp.h | 1 +
3 files changed, 10 insertions(+), 2 deletions(-)
diff --git a/drivers/firmware/xilinx/zynqmp.c b/drivers/firmware/xilinx/zynqmp.c
index 00ea2508f692..de09d77cf1e4 100644
--- a/drivers/firmware/xilinx/zynqmp.c
+++ b/drivers/firmware/xilinx/zynqmp.c
@@ -92,6 +92,8 @@ static int zynqmp_pm_ret_code(u32 ret_status)
return 0;
case XST_PM_NO_FEATURE:
return -ENOTSUPP;
+ case XST_PM_INVALID_VERSION:
+ return -EOPNOTSUPP;
case XST_PM_NO_ACCESS:
return -EACCES;
case XST_PM_ABORT_SUSPEND:
@@ -379,7 +381,7 @@ int zynqmp_pm_register_sgi(u32 sgi_num, u32 reset)
ret = zynqmp_pm_invoke_fn(TF_A_PM_REGISTER_SGI, sgi_num, reset, 0, 0,
0, NULL);
- if (!ret)
+ if (ret != -EOPNOTSUPP && !ret)
return ret;
/* try old implementation as fallback strategy if above fails */
diff --git a/drivers/soc/xilinx/xlnx_event_manager.c b/drivers/soc/xilinx/xlnx_event_manager.c
index 38cfc161a713..bfa5cf4a0cab 100644
--- a/drivers/soc/xilinx/xlnx_event_manager.c
+++ b/drivers/soc/xilinx/xlnx_event_manager.c
@@ -653,7 +653,12 @@ static int xlnx_event_manager_probe(struct platform_device *pdev)
ret = zynqmp_pm_register_sgi(sgi_num, 0);
if (ret) {
- dev_err(&pdev->dev, "SGI %d Registration over TF-A failed with %d\n", sgi_num, ret);
+ if (ret == -EOPNOTSUPP)
+ dev_info(&pdev->dev, "PM firmware event notification not supported\n");
+ else
+ dev_err(&pdev->dev, "SGI %d registration failed, err %d\n",
+ sgi_num, ret);
+
xlnx_event_cleanup_sgi(pdev);
return ret;
}
diff --git a/include/linux/firmware/xlnx-zynqmp.h b/include/linux/firmware/xlnx-zynqmp.h
index 86fb73269d95..4afd5d63177e 100644
--- a/include/linux/firmware/xlnx-zynqmp.h
+++ b/include/linux/firmware/xlnx-zynqmp.h
@@ -160,6 +160,7 @@ enum pm_api_id {
/* PMU-FW return status codes */
enum pm_ret_status {
XST_PM_SUCCESS = 0,
+ XST_PM_INVALID_VERSION = 4,
XST_PM_NO_FEATURE = 19,
XST_PM_INTERNAL = 2000,
XST_PM_CONFLICT = 2001,
--
2.25.1
^ permalink raw reply related [flat|nested] 20+ messages in thread
* [PATCH v2 5/6] firmware: zynqmp: Add support to handle IPI CRC failure
2023-10-04 9:41 [PATCH v2 0/6] update for versal net platform Jay Buddhabhatti
` (3 preceding siblings ...)
2023-10-04 9:41 ` [PATCH v2 4/6] drivers: soc: xilinx: Fix error message on SGI registration failure Jay Buddhabhatti
@ 2023-10-04 9:41 ` Jay Buddhabhatti
2023-10-04 9:41 ` [PATCH v2 6/6] drivers: soc: xilinx: update maintainer of event manager driver Jay Buddhabhatti
2023-10-04 11:31 ` [PATCH v2 0/6] update for versal net platform Michal Simek
6 siblings, 0 replies; 20+ messages in thread
From: Jay Buddhabhatti @ 2023-10-04 9:41 UTC (permalink / raw
To: michal.simek, tanmay.shah, gregkh, nava.kishore.manne,
ben.levinsky, robh, dhaval.r.shah, marex, izhar.ameer.shaikh,
arnd, ruanjinjie, mathieu.poirier
Cc: linux-kernel, linux-arm-kernel, Jay Buddhabhatti,
Naman Trivedi Manojbhai
Added new PM error code XST_PM_INVALID_CRC to handle CRC validation failure
during IPI communication.
Co-developed-by: Naman Trivedi Manojbhai <naman.trivedimanojbhai@amd.com>
Signed-off-by: Naman Trivedi Manojbhai <naman.trivedimanojbhai@amd.com>
Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
---
drivers/firmware/xilinx/zynqmp.c | 1 +
include/linux/firmware/xlnx-zynqmp.h | 1 +
2 files changed, 2 insertions(+)
diff --git a/drivers/firmware/xilinx/zynqmp.c b/drivers/firmware/xilinx/zynqmp.c
index de09d77cf1e4..515936497927 100644
--- a/drivers/firmware/xilinx/zynqmp.c
+++ b/drivers/firmware/xilinx/zynqmp.c
@@ -103,6 +103,7 @@ static int zynqmp_pm_ret_code(u32 ret_status)
case XST_PM_INTERNAL:
case XST_PM_CONFLICT:
case XST_PM_INVALID_NODE:
+ case XST_PM_INVALID_CRC:
default:
return -EINVAL;
}
diff --git a/include/linux/firmware/xlnx-zynqmp.h b/include/linux/firmware/xlnx-zynqmp.h
index 4afd5d63177e..2fdda6086de2 100644
--- a/include/linux/firmware/xlnx-zynqmp.h
+++ b/include/linux/firmware/xlnx-zynqmp.h
@@ -162,6 +162,7 @@ enum pm_ret_status {
XST_PM_SUCCESS = 0,
XST_PM_INVALID_VERSION = 4,
XST_PM_NO_FEATURE = 19,
+ XST_PM_INVALID_CRC = 301,
XST_PM_INTERNAL = 2000,
XST_PM_CONFLICT = 2001,
XST_PM_NO_ACCESS = 2002,
--
2.25.1
^ permalink raw reply related [flat|nested] 20+ messages in thread
* [PATCH v2 6/6] drivers: soc: xilinx: update maintainer of event manager driver
2023-10-04 9:41 [PATCH v2 0/6] update for versal net platform Jay Buddhabhatti
` (4 preceding siblings ...)
2023-10-04 9:41 ` [PATCH v2 5/6] firmware: zynqmp: Add support to handle IPI CRC failure Jay Buddhabhatti
@ 2023-10-04 9:41 ` Jay Buddhabhatti
2023-10-04 12:17 ` Greg KH
2023-10-04 11:31 ` [PATCH v2 0/6] update for versal net platform Michal Simek
6 siblings, 1 reply; 20+ messages in thread
From: Jay Buddhabhatti @ 2023-10-04 9:41 UTC (permalink / raw
To: michal.simek, tanmay.shah, gregkh, nava.kishore.manne,
ben.levinsky, robh, dhaval.r.shah, marex, izhar.ameer.shaikh,
arnd, ruanjinjie, mathieu.poirier
Cc: linux-kernel, linux-arm-kernel, Jay Buddhabhatti
Added Michal as a maintainer of event manager driver as Abhyuday is no
longer in AMD-Xilinx.
Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
Acked-by: Michal Simek <michal.simek@amd.com>
---
MAINTAINERS | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index 35977b269d5e..f36fefd7032b 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -23672,7 +23672,7 @@ F: Documentation/devicetree/bindings/net/can/xilinx,can.yaml
F: drivers/net/can/xilinx_can.c
XILINX EVENT MANAGEMENT DRIVER
-M: Abhyuday Godhasara <abhyuday.godhasara@xilinx.com>
+M: Michal Simek <michal.simek@amd.com>
S: Maintained
F: drivers/soc/xilinx/xlnx_event_manager.c
F: include/linux/firmware/xlnx-event-manager.h
--
2.25.1
^ permalink raw reply related [flat|nested] 20+ messages in thread
* Re: [PATCH v2 2/6] firmware: xilinx: Expand feature check to support all PLM modules
2023-10-04 9:41 ` [PATCH v2 2/6] firmware: xilinx: Expand feature check to support all PLM modules Jay Buddhabhatti
@ 2023-10-04 11:30 ` Michal Simek
0 siblings, 0 replies; 20+ messages in thread
From: Michal Simek @ 2023-10-04 11:30 UTC (permalink / raw
To: Jay Buddhabhatti, tanmay.shah, gregkh, nava.kishore.manne,
ben.levinsky, robh, dhaval.r.shah, marex, izhar.ameer.shaikh,
arnd, ruanjinjie, mathieu.poirier
Cc: linux-kernel, linux-arm-kernel, Saeed Nowshadi
On 10/4/23 11:41, Jay Buddhabhatti wrote:
> To support feature check for all modules, append the module id of the API
> that is being checked to the feature check API so it could be routed to
> the target module for processing.
>
> There is no need to check compatible string becuase the board information
nit: typo because.
M
^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH v2 0/6] update for versal net platform
2023-10-04 9:41 [PATCH v2 0/6] update for versal net platform Jay Buddhabhatti
` (5 preceding siblings ...)
2023-10-04 9:41 ` [PATCH v2 6/6] drivers: soc: xilinx: update maintainer of event manager driver Jay Buddhabhatti
@ 2023-10-04 11:31 ` Michal Simek
6 siblings, 0 replies; 20+ messages in thread
From: Michal Simek @ 2023-10-04 11:31 UTC (permalink / raw
To: Jay Buddhabhatti, tanmay.shah, gregkh, nava.kishore.manne,
ben.levinsky, robh, dhaval.r.shah, marex, izhar.ameer.shaikh,
arnd, ruanjinjie, mathieu.poirier
Cc: linux-kernel, linux-arm-kernel
On 10/4/23 11:41, Jay Buddhabhatti wrote:
> Update firmware and SoC drivers to support for Versal NET platform.
> Versal Net is a new AMD/Xilinx SoC.
>
> V1 patch series link: https://lkml.org/lkml/2023/9/29/308
> Changes in V2:
> - Removed below patch from V1 patch series
> https://lkml.org/lkml/2023/9/29/313
> - Corrected maintainer name format in patch #6 as per tool requirement
>
> Jay Buddhabhatti (6):
> firmware: xilinx: Update firmware call interface to support additional
> arg
> firmware: xilinx: Expand feature check to support all PLM modules
> firmware: xilinx: Register event manager driver
> drivers: soc: xilinx: Fix error message on SGI registration failure
> firmware: zynqmp: Add support to handle IPI CRC failure
> drivers: soc: xilinx: update maintainer of event manager driver
>
> MAINTAINERS | 2 +-
> drivers/firmware/xilinx/zynqmp.c | 210 +++++++++++++-----------
> drivers/soc/xilinx/xlnx_event_manager.c | 9 +-
> drivers/soc/xilinx/zynqmp_power.c | 2 +-
> include/linux/firmware/xlnx-zynqmp.h | 15 +-
> 5 files changed, 140 insertions(+), 98 deletions(-)
>
Acked-by: Michal Simek <michal.simek@amd.com>
Thanks,
Michal
^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH v2 1/6] firmware: xilinx: Update firmware call interface to support additional arg
2023-10-04 9:41 ` [PATCH v2 1/6] firmware: xilinx: Update firmware call interface to support additional arg Jay Buddhabhatti
@ 2023-10-04 12:14 ` Greg KH
0 siblings, 0 replies; 20+ messages in thread
From: Greg KH @ 2023-10-04 12:14 UTC (permalink / raw
To: Jay Buddhabhatti
Cc: michal.simek, tanmay.shah, nava.kishore.manne, ben.levinsky, robh,
dhaval.r.shah, marex, izhar.ameer.shaikh, arnd, ruanjinjie,
mathieu.poirier, linux-kernel, linux-arm-kernel
On Wed, Oct 04, 2023 at 02:41:11AM -0700, Jay Buddhabhatti wrote:
> int zynqmp_pm_invoke_fn(u32 pm_api_id, u32 arg0, u32 arg1,
> - u32 arg2, u32 arg3, u32 *ret_payload)
> + u32 arg2, u32 arg3, u32 arg4,
> + u32 *ret_payload)
You do have 100 columns to use now, why wrap?
Same for other places you did this.
thanks,
greg k-h
^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH v2 4/6] drivers: soc: xilinx: Fix error message on SGI registration failure
2023-10-04 9:41 ` [PATCH v2 4/6] drivers: soc: xilinx: Fix error message on SGI registration failure Jay Buddhabhatti
@ 2023-10-04 12:15 ` Greg KH
2023-10-04 12:48 ` Buddhabhatti, Jay
0 siblings, 1 reply; 20+ messages in thread
From: Greg KH @ 2023-10-04 12:15 UTC (permalink / raw
To: Jay Buddhabhatti
Cc: michal.simek, tanmay.shah, nava.kishore.manne, ben.levinsky, robh,
dhaval.r.shah, marex, izhar.ameer.shaikh, arnd, ruanjinjie,
mathieu.poirier, linux-kernel, linux-arm-kernel
On Wed, Oct 04, 2023 at 02:41:14AM -0700, Jay Buddhabhatti wrote:
> Failure to register SGI for firmware event notification is non-fatal error
> when feature is not supported by other modules such as Xen and TF-A. Add
> _info level log message for such special case.
>
> Also add XST_PM_INVALID_VERSION error code and map it to -EOPNOSUPP Linux
> kernel error code. If feature is not supported or EEMI API version is
> mismatch, firmware can return XST_PM_INVALID_VERSION = 4 or
> XST_PM_NO_FEATURE = 19 error code.
>
> Co-developed-by: Tanmay Shah <tanmay.shah@amd.com>
> Signed-off-by: Tanmay Shah <tanmay.shah@amd.com>
> Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
> ---
> drivers/firmware/xilinx/zynqmp.c | 4 +++-
> drivers/soc/xilinx/xlnx_event_manager.c | 7 ++++++-
> include/linux/firmware/xlnx-zynqmp.h | 1 +
> 3 files changed, 10 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/firmware/xilinx/zynqmp.c b/drivers/firmware/xilinx/zynqmp.c
> index 00ea2508f692..de09d77cf1e4 100644
> --- a/drivers/firmware/xilinx/zynqmp.c
> +++ b/drivers/firmware/xilinx/zynqmp.c
> @@ -92,6 +92,8 @@ static int zynqmp_pm_ret_code(u32 ret_status)
> return 0;
> case XST_PM_NO_FEATURE:
> return -ENOTSUPP;
> + case XST_PM_INVALID_VERSION:
> + return -EOPNOTSUPP;
> case XST_PM_NO_ACCESS:
> return -EACCES;
> case XST_PM_ABORT_SUSPEND:
> @@ -379,7 +381,7 @@ int zynqmp_pm_register_sgi(u32 sgi_num, u32 reset)
>
> ret = zynqmp_pm_invoke_fn(TF_A_PM_REGISTER_SGI, sgi_num, reset, 0, 0,
> 0, NULL);
> - if (!ret)
> + if (ret != -EOPNOTSUPP && !ret)
> return ret;
>
> /* try old implementation as fallback strategy if above fails */
> diff --git a/drivers/soc/xilinx/xlnx_event_manager.c b/drivers/soc/xilinx/xlnx_event_manager.c
> index 38cfc161a713..bfa5cf4a0cab 100644
> --- a/drivers/soc/xilinx/xlnx_event_manager.c
> +++ b/drivers/soc/xilinx/xlnx_event_manager.c
> @@ -653,7 +653,12 @@ static int xlnx_event_manager_probe(struct platform_device *pdev)
>
> ret = zynqmp_pm_register_sgi(sgi_num, 0);
> if (ret) {
> - dev_err(&pdev->dev, "SGI %d Registration over TF-A failed with %d\n", sgi_num, ret);
> + if (ret == -EOPNOTSUPP)
> + dev_info(&pdev->dev, "PM firmware event notification not supported\n");
Why is this "info"? Why not error?
And what is userspace supposed to do with this information if it sees
it?
thanks,
greg k-h
^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH v2 6/6] drivers: soc: xilinx: update maintainer of event manager driver
2023-10-04 9:41 ` [PATCH v2 6/6] drivers: soc: xilinx: update maintainer of event manager driver Jay Buddhabhatti
@ 2023-10-04 12:17 ` Greg KH
2023-10-04 13:16 ` Michal Simek
0 siblings, 1 reply; 20+ messages in thread
From: Greg KH @ 2023-10-04 12:17 UTC (permalink / raw
To: Jay Buddhabhatti
Cc: michal.simek, tanmay.shah, nava.kishore.manne, ben.levinsky, robh,
dhaval.r.shah, marex, izhar.ameer.shaikh, arnd, ruanjinjie,
mathieu.poirier, linux-kernel, linux-arm-kernel
On Wed, Oct 04, 2023 at 02:41:16AM -0700, Jay Buddhabhatti wrote:
> Added Michal as a maintainer of event manager driver as Abhyuday is no
> longer in AMD-Xilinx.
>
> Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
> Acked-by: Michal Simek <michal.simek@amd.com>
> ---
> MAINTAINERS | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 35977b269d5e..f36fefd7032b 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -23672,7 +23672,7 @@ F: Documentation/devicetree/bindings/net/can/xilinx,can.yaml
> F: drivers/net/can/xilinx_can.c
>
> XILINX EVENT MANAGEMENT DRIVER
> -M: Abhyuday Godhasara <abhyuday.godhasara@xilinx.com>
> +M: Michal Simek <michal.simek@amd.com>
For obvious reasons, we need an ack from Abhyuday.
thanks,
greg k-h
^ permalink raw reply [flat|nested] 20+ messages in thread
* RE: [PATCH v2 4/6] drivers: soc: xilinx: Fix error message on SGI registration failure
2023-10-04 12:15 ` Greg KH
@ 2023-10-04 12:48 ` Buddhabhatti, Jay
2023-10-04 12:51 ` Greg KH
0 siblings, 1 reply; 20+ messages in thread
From: Buddhabhatti, Jay @ 2023-10-04 12:48 UTC (permalink / raw
To: Greg KH
Cc: Simek, Michal, Shah, Tanmay, Manne, Nava kishore, Levinsky, Ben,
robh@kernel.org, marex@denx.de, Shaikh, Izhar Ameer,
arnd@arndb.de, ruanjinjie@huawei.com, mathieu.poirier@linaro.org,
linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org
Hi Greg,
> -----Original Message-----
> From: Greg KH <gregkh@linuxfoundation.org>
> Sent: Wednesday, October 4, 2023 5:45 PM
> To: Buddhabhatti, Jay <jay.buddhabhatti@amd.com>
> Cc: Simek, Michal <michal.simek@amd.com>; Shah, Tanmay
> <tanmay.shah@amd.com>; Manne, Nava kishore
> <nava.kishore.manne@amd.com>; Levinsky, Ben <ben.levinsky@amd.com>;
> robh@kernel.org; dhaval.r.shah@amd.com; marex@denx.de; Shaikh, Izhar
> Ameer <izhar.ameer.shaikh@amd.com>; arnd@arndb.de;
> ruanjinjie@huawei.com; mathieu.poirier@linaro.org; linux-
> kernel@vger.kernel.org; linux-arm-kernel@lists.infradead.org
> Subject: Re: [PATCH v2 4/6] drivers: soc: xilinx: Fix error message on SGI
> registration failure
>
> On Wed, Oct 04, 2023 at 02:41:14AM -0700, Jay Buddhabhatti wrote:
> > Failure to register SGI for firmware event notification is non-fatal
> > error when feature is not supported by other modules such as Xen and
> > TF-A. Add _info level log message for such special case.
> >
> > Also add XST_PM_INVALID_VERSION error code and map it to -EOPNOSUPP
> > Linux kernel error code. If feature is not supported or EEMI API
> > version is mismatch, firmware can return XST_PM_INVALID_VERSION = 4 or
> > XST_PM_NO_FEATURE = 19 error code.
> >
> > Co-developed-by: Tanmay Shah <tanmay.shah@amd.com>
> > Signed-off-by: Tanmay Shah <tanmay.shah@amd.com>
> > Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
> > ---
> > drivers/firmware/xilinx/zynqmp.c | 4 +++-
> > drivers/soc/xilinx/xlnx_event_manager.c | 7 ++++++-
> > include/linux/firmware/xlnx-zynqmp.h | 1 +
> > 3 files changed, 10 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/firmware/xilinx/zynqmp.c
> > b/drivers/firmware/xilinx/zynqmp.c
> > index 00ea2508f692..de09d77cf1e4 100644
> > --- a/drivers/firmware/xilinx/zynqmp.c
> > +++ b/drivers/firmware/xilinx/zynqmp.c
> > @@ -92,6 +92,8 @@ static int zynqmp_pm_ret_code(u32 ret_status)
> > return 0;
> > case XST_PM_NO_FEATURE:
> > return -ENOTSUPP;
> > + case XST_PM_INVALID_VERSION:
> > + return -EOPNOTSUPP;
> > case XST_PM_NO_ACCESS:
> > return -EACCES;
> > case XST_PM_ABORT_SUSPEND:
> > @@ -379,7 +381,7 @@ int zynqmp_pm_register_sgi(u32 sgi_num, u32 reset)
> >
> > ret = zynqmp_pm_invoke_fn(TF_A_PM_REGISTER_SGI, sgi_num, reset,
> 0, 0,
> > 0, NULL);
> > - if (!ret)
> > + if (ret != -EOPNOTSUPP && !ret)
> > return ret;
> >
> > /* try old implementation as fallback strategy if above fails */
> > diff --git a/drivers/soc/xilinx/xlnx_event_manager.c
> > b/drivers/soc/xilinx/xlnx_event_manager.c
> > index 38cfc161a713..bfa5cf4a0cab 100644
> > --- a/drivers/soc/xilinx/xlnx_event_manager.c
> > +++ b/drivers/soc/xilinx/xlnx_event_manager.c
> > @@ -653,7 +653,12 @@ static int xlnx_event_manager_probe(struct
> > platform_device *pdev)
> >
> > ret = zynqmp_pm_register_sgi(sgi_num, 0);
> > if (ret) {
> > - dev_err(&pdev->dev, "SGI %d Registration over TF-A failed with
> %d\n", sgi_num, ret);
> > + if (ret == -EOPNOTSUPP)
> > + dev_info(&pdev->dev, "PM firmware event notification
> not
> > +supported\n");
>
> Why is this "info"? Why not error?
[Jay] Because it is non-fatal error which will not cause kernel crash.
>
> And what is userspace supposed to do with this information if it sees it?
[Jay] This message indicates that SGI registration is not supported by other modules like TF-A or Xen. So user need to use TF-A with this support if they want to use event management driver.
Thanks,
Jay
>
> thanks,
>
> greg k-h
^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH v2 4/6] drivers: soc: xilinx: Fix error message on SGI registration failure
2023-10-04 12:48 ` Buddhabhatti, Jay
@ 2023-10-04 12:51 ` Greg KH
0 siblings, 0 replies; 20+ messages in thread
From: Greg KH @ 2023-10-04 12:51 UTC (permalink / raw
To: Buddhabhatti, Jay
Cc: Simek, Michal, Shah, Tanmay, Manne, Nava kishore, Levinsky, Ben,
robh@kernel.org, marex@denx.de, Shaikh, Izhar Ameer,
arnd@arndb.de, ruanjinjie@huawei.com, mathieu.poirier@linaro.org,
linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org
On Wed, Oct 04, 2023 at 12:48:25PM +0000, Buddhabhatti, Jay wrote:
> Hi Greg,
>
> > -----Original Message-----
> > From: Greg KH <gregkh@linuxfoundation.org>
> > Sent: Wednesday, October 4, 2023 5:45 PM
> > To: Buddhabhatti, Jay <jay.buddhabhatti@amd.com>
> > Cc: Simek, Michal <michal.simek@amd.com>; Shah, Tanmay
> > <tanmay.shah@amd.com>; Manne, Nava kishore
> > <nava.kishore.manne@amd.com>; Levinsky, Ben <ben.levinsky@amd.com>;
> > robh@kernel.org; dhaval.r.shah@amd.com; marex@denx.de; Shaikh, Izhar
> > Ameer <izhar.ameer.shaikh@amd.com>; arnd@arndb.de;
> > ruanjinjie@huawei.com; mathieu.poirier@linaro.org; linux-
> > kernel@vger.kernel.org; linux-arm-kernel@lists.infradead.org
> > Subject: Re: [PATCH v2 4/6] drivers: soc: xilinx: Fix error message on SGI
> > registration failure
> >
> > On Wed, Oct 04, 2023 at 02:41:14AM -0700, Jay Buddhabhatti wrote:
> > > Failure to register SGI for firmware event notification is non-fatal
> > > error when feature is not supported by other modules such as Xen and
> > > TF-A. Add _info level log message for such special case.
> > >
> > > Also add XST_PM_INVALID_VERSION error code and map it to -EOPNOSUPP
> > > Linux kernel error code. If feature is not supported or EEMI API
> > > version is mismatch, firmware can return XST_PM_INVALID_VERSION = 4 or
> > > XST_PM_NO_FEATURE = 19 error code.
> > >
> > > Co-developed-by: Tanmay Shah <tanmay.shah@amd.com>
> > > Signed-off-by: Tanmay Shah <tanmay.shah@amd.com>
> > > Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
> > > ---
> > > drivers/firmware/xilinx/zynqmp.c | 4 +++-
> > > drivers/soc/xilinx/xlnx_event_manager.c | 7 ++++++-
> > > include/linux/firmware/xlnx-zynqmp.h | 1 +
> > > 3 files changed, 10 insertions(+), 2 deletions(-)
> > >
> > > diff --git a/drivers/firmware/xilinx/zynqmp.c
> > > b/drivers/firmware/xilinx/zynqmp.c
> > > index 00ea2508f692..de09d77cf1e4 100644
> > > --- a/drivers/firmware/xilinx/zynqmp.c
> > > +++ b/drivers/firmware/xilinx/zynqmp.c
> > > @@ -92,6 +92,8 @@ static int zynqmp_pm_ret_code(u32 ret_status)
> > > return 0;
> > > case XST_PM_NO_FEATURE:
> > > return -ENOTSUPP;
> > > + case XST_PM_INVALID_VERSION:
> > > + return -EOPNOTSUPP;
> > > case XST_PM_NO_ACCESS:
> > > return -EACCES;
> > > case XST_PM_ABORT_SUSPEND:
> > > @@ -379,7 +381,7 @@ int zynqmp_pm_register_sgi(u32 sgi_num, u32 reset)
> > >
> > > ret = zynqmp_pm_invoke_fn(TF_A_PM_REGISTER_SGI, sgi_num, reset,
> > 0, 0,
> > > 0, NULL);
> > > - if (!ret)
> > > + if (ret != -EOPNOTSUPP && !ret)
> > > return ret;
> > >
> > > /* try old implementation as fallback strategy if above fails */
> > > diff --git a/drivers/soc/xilinx/xlnx_event_manager.c
> > > b/drivers/soc/xilinx/xlnx_event_manager.c
> > > index 38cfc161a713..bfa5cf4a0cab 100644
> > > --- a/drivers/soc/xilinx/xlnx_event_manager.c
> > > +++ b/drivers/soc/xilinx/xlnx_event_manager.c
> > > @@ -653,7 +653,12 @@ static int xlnx_event_manager_probe(struct
> > > platform_device *pdev)
> > >
> > > ret = zynqmp_pm_register_sgi(sgi_num, 0);
> > > if (ret) {
> > > - dev_err(&pdev->dev, "SGI %d Registration over TF-A failed with
> > %d\n", sgi_num, ret);
> > > + if (ret == -EOPNOTSUPP)
> > > + dev_info(&pdev->dev, "PM firmware event notification
> > not
> > > +supported\n");
> >
> > Why is this "info"? Why not error?
> [Jay] Because it is non-fatal error which will not cause kernel crash.
Neither do dev_err() messages :)
And something failed, this isn't just "here's some nice information", it
is "something went wrong" which should be a warning or error in my
opinion.
> > And what is userspace supposed to do with this information if it sees it?
> [Jay] This message indicates that SGI registration is not supported by other modules like TF-A or Xen. So user need to use TF-A with this support if they want to use event management driver.
So perhaps say that here too? Otherwise how are they supposed to know
that?
thanks,
greg k-h
^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH v2 6/6] drivers: soc: xilinx: update maintainer of event manager driver
2023-10-04 12:17 ` Greg KH
@ 2023-10-04 13:16 ` Michal Simek
2023-10-04 13:47 ` Greg KH
0 siblings, 1 reply; 20+ messages in thread
From: Michal Simek @ 2023-10-04 13:16 UTC (permalink / raw
To: Greg KH, Jay Buddhabhatti
Cc: tanmay.shah, nava.kishore.manne, ben.levinsky, robh,
dhaval.r.shah, marex, izhar.ameer.shaikh, arnd, ruanjinjie,
mathieu.poirier, linux-kernel, linux-arm-kernel
On 10/4/23 14:17, Greg KH wrote:
> On Wed, Oct 04, 2023 at 02:41:16AM -0700, Jay Buddhabhatti wrote:
>> Added Michal as a maintainer of event manager driver as Abhyuday is no
>> longer in AMD-Xilinx.
>>
>> Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
>> Acked-by: Michal Simek <michal.simek@amd.com>
>> ---
>> MAINTAINERS | 2 +-
>> 1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/MAINTAINERS b/MAINTAINERS
>> index 35977b269d5e..f36fefd7032b 100644
>> --- a/MAINTAINERS
>> +++ b/MAINTAINERS
>> @@ -23672,7 +23672,7 @@ F: Documentation/devicetree/bindings/net/can/xilinx,can.yaml
>> F: drivers/net/can/xilinx_can.c
>>
>> XILINX EVENT MANAGEMENT DRIVER
>> -M: Abhyuday Godhasara <abhyuday.godhasara@xilinx.com>
>> +M: Michal Simek <michal.simek@amd.com>
>
> For obvious reasons, we need an ack from Abhyuday.
He no longer works for Xilinx/AMD but I have asked him on side channel to reply
and let's see if this is going to happen or not.
Thanks,
Michal
^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH v2 6/6] drivers: soc: xilinx: update maintainer of event manager driver
2023-10-04 13:16 ` Michal Simek
@ 2023-10-04 13:47 ` Greg KH
2023-10-04 14:34 ` Michal Simek
0 siblings, 1 reply; 20+ messages in thread
From: Greg KH @ 2023-10-04 13:47 UTC (permalink / raw
To: Michal Simek
Cc: Jay Buddhabhatti, tanmay.shah, nava.kishore.manne, ben.levinsky,
robh, dhaval.r.shah, marex, izhar.ameer.shaikh, arnd, ruanjinjie,
mathieu.poirier, linux-kernel, linux-arm-kernel
On Wed, Oct 04, 2023 at 03:16:15PM +0200, Michal Simek wrote:
>
>
> On 10/4/23 14:17, Greg KH wrote:
> > On Wed, Oct 04, 2023 at 02:41:16AM -0700, Jay Buddhabhatti wrote:
> > > Added Michal as a maintainer of event manager driver as Abhyuday is no
> > > longer in AMD-Xilinx.
> > >
> > > Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
> > > Acked-by: Michal Simek <michal.simek@amd.com>
> > > ---
> > > MAINTAINERS | 2 +-
> > > 1 file changed, 1 insertion(+), 1 deletion(-)
> > >
> > > diff --git a/MAINTAINERS b/MAINTAINERS
> > > index 35977b269d5e..f36fefd7032b 100644
> > > --- a/MAINTAINERS
> > > +++ b/MAINTAINERS
> > > @@ -23672,7 +23672,7 @@ F: Documentation/devicetree/bindings/net/can/xilinx,can.yaml
> > > F: drivers/net/can/xilinx_can.c
> > > XILINX EVENT MANAGEMENT DRIVER
> > > -M: Abhyuday Godhasara <abhyuday.godhasara@xilinx.com>
> > > +M: Michal Simek <michal.simek@amd.com>
> >
> > For obvious reasons, we need an ack from Abhyuday.
>
> He no longer works for Xilinx/AMD but I have asked him on side channel to
> reply and let's see if this is going to happen or not.
Mantainerships follow people, not companies, so if he wants to keep
being the maintainer, he can be, there's no requirement for him to step
down.
thanks,
greg k-h
^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH v2 6/6] drivers: soc: xilinx: update maintainer of event manager driver
2023-10-04 13:47 ` Greg KH
@ 2023-10-04 14:34 ` Michal Simek
2023-10-05 14:09 ` Buddhabhatti, Jay
0 siblings, 1 reply; 20+ messages in thread
From: Michal Simek @ 2023-10-04 14:34 UTC (permalink / raw
To: Greg KH
Cc: Jay Buddhabhatti, tanmay.shah, nava.kishore.manne, ben.levinsky,
robh, dhaval.r.shah, marex, izhar.ameer.shaikh, arnd, ruanjinjie,
mathieu.poirier, linux-kernel, linux-arm-kernel
On 10/4/23 15:47, Greg KH wrote:
> On Wed, Oct 04, 2023 at 03:16:15PM +0200, Michal Simek wrote:
>>
>>
>> On 10/4/23 14:17, Greg KH wrote:
>>> On Wed, Oct 04, 2023 at 02:41:16AM -0700, Jay Buddhabhatti wrote:
>>>> Added Michal as a maintainer of event manager driver as Abhyuday is no
>>>> longer in AMD-Xilinx.
>>>>
>>>> Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
>>>> Acked-by: Michal Simek <michal.simek@amd.com>
>>>> ---
>>>> MAINTAINERS | 2 +-
>>>> 1 file changed, 1 insertion(+), 1 deletion(-)
>>>>
>>>> diff --git a/MAINTAINERS b/MAINTAINERS
>>>> index 35977b269d5e..f36fefd7032b 100644
>>>> --- a/MAINTAINERS
>>>> +++ b/MAINTAINERS
>>>> @@ -23672,7 +23672,7 @@ F: Documentation/devicetree/bindings/net/can/xilinx,can.yaml
>>>> F: drivers/net/can/xilinx_can.c
>>>> XILINX EVENT MANAGEMENT DRIVER
>>>> -M: Abhyuday Godhasara <abhyuday.godhasara@xilinx.com>
>>>> +M: Michal Simek <michal.simek@amd.com>
>>>
>>> For obvious reasons, we need an ack from Abhyuday.
>>
>> He no longer works for Xilinx/AMD but I have asked him on side channel to
>> reply and let's see if this is going to happen or not.
>
> Mantainerships follow people, not companies, so if he wants to keep
> being the maintainer, he can be, there's no requirement for him to step
> down.
No doubt about it but normally in these cases people send a patch to start to
use their new email address which is what didn't happen for quite a long time in
this case.
I am definitely happy to wait some time if he reacts but if there is no reaction
for some time we should fix it.
Thanks,
Michal
^ permalink raw reply [flat|nested] 20+ messages in thread
* RE: [PATCH v2 6/6] drivers: soc: xilinx: update maintainer of event manager driver
2023-10-04 14:34 ` Michal Simek
@ 2023-10-05 14:09 ` Buddhabhatti, Jay
2023-10-05 14:10 ` Greg KH
0 siblings, 1 reply; 20+ messages in thread
From: Buddhabhatti, Jay @ 2023-10-05 14:09 UTC (permalink / raw
To: Simek, Michal, Greg KH
Cc: Shah, Tanmay, Manne, Nava kishore, Levinsky, Ben, robh@kernel.org,
marex@denx.de, Shaikh, Izhar Ameer, arnd@arndb.de,
ruanjinjie@huawei.com, mathieu.poirier@linaro.org,
linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, Kannan, Arun Balaji
Hi Greg,
> -----Original Message-----
> From: Simek, Michal <michal.simek@amd.com>
> Sent: Wednesday, October 4, 2023 8:05 PM
> To: Greg KH <gregkh@linuxfoundation.org>
> Cc: Buddhabhatti, Jay <jay.buddhabhatti@amd.com>; Shah, Tanmay
> <tanmay.shah@amd.com>; Manne, Nava kishore
> <nava.kishore.manne@amd.com>; Levinsky, Ben <ben.levinsky@amd.com>;
> robh@kernel.org; dhaval.r.shah@amd.com; marex@denx.de; Shaikh, Izhar
> Ameer <izhar.ameer.shaikh@amd.com>; arnd@arndb.de;
> ruanjinjie@huawei.com; mathieu.poirier@linaro.org; linux-
> kernel@vger.kernel.org; linux-arm-kernel@lists.infradead.org
> Subject: Re: [PATCH v2 6/6] drivers: soc: xilinx: update maintainer of event
> manager driver
>
>
>
> On 10/4/23 15:47, Greg KH wrote:
> > On Wed, Oct 04, 2023 at 03:16:15PM +0200, Michal Simek wrote:
> >>
> >>
> >> On 10/4/23 14:17, Greg KH wrote:
> >>> On Wed, Oct 04, 2023 at 02:41:16AM -0700, Jay Buddhabhatti wrote:
> >>>> Added Michal as a maintainer of event manager driver as Abhyuday is
> >>>> no longer in AMD-Xilinx.
> >>>>
> >>>> Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
> >>>> Acked-by: Michal Simek <michal.simek@amd.com>
> >>>> ---
> >>>> MAINTAINERS | 2 +-
> >>>> 1 file changed, 1 insertion(+), 1 deletion(-)
> >>>>
> >>>> diff --git a/MAINTAINERS b/MAINTAINERS index
> >>>> 35977b269d5e..f36fefd7032b 100644
> >>>> --- a/MAINTAINERS
> >>>> +++ b/MAINTAINERS
> >>>> @@ -23672,7 +23672,7 @@ F:
> Documentation/devicetree/bindings/net/can/xilinx,can.yaml
> >>>> F: drivers/net/can/xilinx_can.c
> >>>> XILINX EVENT MANAGEMENT DRIVER
> >>>> -M: Abhyuday Godhasara <abhyuday.godhasara@xilinx.com>
> >>>> +M: Michal Simek <michal.simek@amd.com>
> >>>
> >>> For obvious reasons, we need an ack from Abhyuday.
> >>
> >> He no longer works for Xilinx/AMD but I have asked him on side
> >> channel to reply and let's see if this is going to happen or not.
> >
> > Mantainerships follow people, not companies, so if he wants to keep
> > being the maintainer, he can be, there's no requirement for him to
> > step down.
>
> No doubt about it but normally in these cases people send a patch to start to
> use their new email address which is what didn't happen for quite a long time
> in this case.
> I am definitely happy to wait some time if he reacts but if there is no reaction
> for some time we should fix it.
[Jay] I got information that Abhyuday is aware about this, but he is not going to react on it.
Thanks,
Jay
>
> Thanks,
> Michal
^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH v2 6/6] drivers: soc: xilinx: update maintainer of event manager driver
2023-10-05 14:09 ` Buddhabhatti, Jay
@ 2023-10-05 14:10 ` Greg KH
2023-10-06 5:15 ` Buddhabhatti, Jay
0 siblings, 1 reply; 20+ messages in thread
From: Greg KH @ 2023-10-05 14:10 UTC (permalink / raw
To: Buddhabhatti, Jay
Cc: Simek, Michal, Shah, Tanmay, Manne, Nava kishore, Levinsky, Ben,
robh@kernel.org, marex@denx.de, Shaikh, Izhar Ameer,
arnd@arndb.de, ruanjinjie@huawei.com, mathieu.poirier@linaro.org,
linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, Kannan, Arun Balaji
On Thu, Oct 05, 2023 at 02:09:39PM +0000, Buddhabhatti, Jay wrote:
> Hi Greg,
>
> > -----Original Message-----
> > From: Simek, Michal <michal.simek@amd.com>
> > Sent: Wednesday, October 4, 2023 8:05 PM
> > To: Greg KH <gregkh@linuxfoundation.org>
> > Cc: Buddhabhatti, Jay <jay.buddhabhatti@amd.com>; Shah, Tanmay
> > <tanmay.shah@amd.com>; Manne, Nava kishore
> > <nava.kishore.manne@amd.com>; Levinsky, Ben <ben.levinsky@amd.com>;
> > robh@kernel.org; dhaval.r.shah@amd.com; marex@denx.de; Shaikh, Izhar
> > Ameer <izhar.ameer.shaikh@amd.com>; arnd@arndb.de;
> > ruanjinjie@huawei.com; mathieu.poirier@linaro.org; linux-
> > kernel@vger.kernel.org; linux-arm-kernel@lists.infradead.org
> > Subject: Re: [PATCH v2 6/6] drivers: soc: xilinx: update maintainer of event
> > manager driver
> >
> >
> >
> > On 10/4/23 15:47, Greg KH wrote:
> > > On Wed, Oct 04, 2023 at 03:16:15PM +0200, Michal Simek wrote:
> > >>
> > >>
> > >> On 10/4/23 14:17, Greg KH wrote:
> > >>> On Wed, Oct 04, 2023 at 02:41:16AM -0700, Jay Buddhabhatti wrote:
> > >>>> Added Michal as a maintainer of event manager driver as Abhyuday is
> > >>>> no longer in AMD-Xilinx.
> > >>>>
> > >>>> Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
> > >>>> Acked-by: Michal Simek <michal.simek@amd.com>
> > >>>> ---
> > >>>> MAINTAINERS | 2 +-
> > >>>> 1 file changed, 1 insertion(+), 1 deletion(-)
> > >>>>
> > >>>> diff --git a/MAINTAINERS b/MAINTAINERS index
> > >>>> 35977b269d5e..f36fefd7032b 100644
> > >>>> --- a/MAINTAINERS
> > >>>> +++ b/MAINTAINERS
> > >>>> @@ -23672,7 +23672,7 @@ F:
> > Documentation/devicetree/bindings/net/can/xilinx,can.yaml
> > >>>> F: drivers/net/can/xilinx_can.c
> > >>>> XILINX EVENT MANAGEMENT DRIVER
> > >>>> -M: Abhyuday Godhasara <abhyuday.godhasara@xilinx.com>
> > >>>> +M: Michal Simek <michal.simek@amd.com>
> > >>>
> > >>> For obvious reasons, we need an ack from Abhyuday.
> > >>
> > >> He no longer works for Xilinx/AMD but I have asked him on side
> > >> channel to reply and let's see if this is going to happen or not.
> > >
> > > Mantainerships follow people, not companies, so if he wants to keep
> > > being the maintainer, he can be, there's no requirement for him to
> > > step down.
> >
> > No doubt about it but normally in these cases people send a patch to start to
> > use their new email address which is what didn't happen for quite a long time
> > in this case.
> > I am definitely happy to wait some time if he reacts but if there is no reaction
> > for some time we should fix it.
>
> [Jay] I got information that Abhyuday is aware about this, but he is not going to react on it.
So I guess they want to remain the maintainer? That's fine, but a new
email address for them is probably wanted if this one currently bounces.
thanks,
greg k-h
^ permalink raw reply [flat|nested] 20+ messages in thread
* RE: [PATCH v2 6/6] drivers: soc: xilinx: update maintainer of event manager driver
2023-10-05 14:10 ` Greg KH
@ 2023-10-06 5:15 ` Buddhabhatti, Jay
0 siblings, 0 replies; 20+ messages in thread
From: Buddhabhatti, Jay @ 2023-10-06 5:15 UTC (permalink / raw
To: Greg KH
Cc: Simek, Michal, Shah, Tanmay, Manne, Nava kishore, Levinsky, Ben,
robh@kernel.org, marex@denx.de, Shaikh, Izhar Ameer,
arnd@arndb.de, ruanjinjie@huawei.com, mathieu.poirier@linaro.org,
linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, Kannan, Arun Balaji
Hi Greg,
> -----Original Message-----
> From: Greg KH <gregkh@linuxfoundation.org>
> Sent: Thursday, October 5, 2023 7:41 PM
> To: Buddhabhatti, Jay <jay.buddhabhatti@amd.com>
> Cc: Simek, Michal <michal.simek@amd.com>; Shah, Tanmay
> <tanmay.shah@amd.com>; Manne, Nava kishore
> <nava.kishore.manne@amd.com>; Levinsky, Ben <ben.levinsky@amd.com>;
> robh@kernel.org; marex@denx.de; Shaikh, Izhar Ameer
> <izhar.ameer.shaikh@amd.com>; arnd@arndb.de; ruanjinjie@huawei.com;
> mathieu.poirier@linaro.org; linux-kernel@vger.kernel.org; linux-arm-
> kernel@lists.infradead.org; Kannan, Arun Balaji
> <arun.balaji.kannan@amd.com>
> Subject: Re: [PATCH v2 6/6] drivers: soc: xilinx: update maintainer of event
> manager driver
>
> On Thu, Oct 05, 2023 at 02:09:39PM +0000, Buddhabhatti, Jay wrote:
> > Hi Greg,
> >
> > > -----Original Message-----
> > > From: Simek, Michal <michal.simek@amd.com>
> > > Sent: Wednesday, October 4, 2023 8:05 PM
> > > To: Greg KH <gregkh@linuxfoundation.org>
> > > Cc: Buddhabhatti, Jay <jay.buddhabhatti@amd.com>; Shah, Tanmay
> > > <tanmay.shah@amd.com>; Manne, Nava kishore
> > > <nava.kishore.manne@amd.com>; Levinsky, Ben <ben.levinsky@amd.com>;
> > > robh@kernel.org; dhaval.r.shah@amd.com; marex@denx.de; Shaikh, Izhar
> > > Ameer <izhar.ameer.shaikh@amd.com>; arnd@arndb.de;
> > > ruanjinjie@huawei.com; mathieu.poirier@linaro.org; linux-
> > > kernel@vger.kernel.org; linux-arm-kernel@lists.infradead.org
> > > Subject: Re: [PATCH v2 6/6] drivers: soc: xilinx: update maintainer
> > > of event manager driver
> > >
> > >
> > >
> > > On 10/4/23 15:47, Greg KH wrote:
> > > > On Wed, Oct 04, 2023 at 03:16:15PM +0200, Michal Simek wrote:
> > > >>
> > > >>
> > > >> On 10/4/23 14:17, Greg KH wrote:
> > > >>> On Wed, Oct 04, 2023 at 02:41:16AM -0700, Jay Buddhabhatti wrote:
> > > >>>> Added Michal as a maintainer of event manager driver as
> > > >>>> Abhyuday is no longer in AMD-Xilinx.
> > > >>>>
> > > >>>> Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
> > > >>>> Acked-by: Michal Simek <michal.simek@amd.com>
> > > >>>> ---
> > > >>>> MAINTAINERS | 2 +-
> > > >>>> 1 file changed, 1 insertion(+), 1 deletion(-)
> > > >>>>
> > > >>>> diff --git a/MAINTAINERS b/MAINTAINERS index
> > > >>>> 35977b269d5e..f36fefd7032b 100644
> > > >>>> --- a/MAINTAINERS
> > > >>>> +++ b/MAINTAINERS
> > > >>>> @@ -23672,7 +23672,7 @@ F:
> > > Documentation/devicetree/bindings/net/can/xilinx,can.yaml
> > > >>>> F: drivers/net/can/xilinx_can.c
> > > >>>> XILINX EVENT MANAGEMENT DRIVER
> > > >>>> -M: Abhyuday Godhasara <abhyuday.godhasara@xilinx.com>
> > > >>>> +M: Michal Simek <michal.simek@amd.com>
> > > >>>
> > > >>> For obvious reasons, we need an ack from Abhyuday.
> > > >>
> > > >> He no longer works for Xilinx/AMD but I have asked him on side
> > > >> channel to reply and let's see if this is going to happen or not.
> > > >
> > > > Mantainerships follow people, not companies, so if he wants to
> > > > keep being the maintainer, he can be, there's no requirement for
> > > > him to step down.
> > >
> > > No doubt about it but normally in these cases people send a patch to
> > > start to use their new email address which is what didn't happen for
> > > quite a long time in this case.
> > > I am definitely happy to wait some time if he reacts but if there is
> > > no reaction for some time we should fix it.
> >
> > [Jay] I got information that Abhyuday is aware about this, but he is not going
> to react on it.
>
> So I guess they want to remain the maintainer? That's fine, but a new email
> address for them is probably wanted if this one currently bounces.
[Jay] He doesn't want to remain the maintainer.
Thanks,
Jay
>
> thanks,
>
> greg k-h
^ permalink raw reply [flat|nested] 20+ messages in thread
end of thread, other threads:[~2023-10-06 5:15 UTC | newest]
Thread overview: 20+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2023-10-04 9:41 [PATCH v2 0/6] update for versal net platform Jay Buddhabhatti
2023-10-04 9:41 ` [PATCH v2 1/6] firmware: xilinx: Update firmware call interface to support additional arg Jay Buddhabhatti
2023-10-04 12:14 ` Greg KH
2023-10-04 9:41 ` [PATCH v2 2/6] firmware: xilinx: Expand feature check to support all PLM modules Jay Buddhabhatti
2023-10-04 11:30 ` Michal Simek
2023-10-04 9:41 ` [PATCH v2 3/6] firmware: xilinx: Register event manager driver Jay Buddhabhatti
2023-10-04 9:41 ` [PATCH v2 4/6] drivers: soc: xilinx: Fix error message on SGI registration failure Jay Buddhabhatti
2023-10-04 12:15 ` Greg KH
2023-10-04 12:48 ` Buddhabhatti, Jay
2023-10-04 12:51 ` Greg KH
2023-10-04 9:41 ` [PATCH v2 5/6] firmware: zynqmp: Add support to handle IPI CRC failure Jay Buddhabhatti
2023-10-04 9:41 ` [PATCH v2 6/6] drivers: soc: xilinx: update maintainer of event manager driver Jay Buddhabhatti
2023-10-04 12:17 ` Greg KH
2023-10-04 13:16 ` Michal Simek
2023-10-04 13:47 ` Greg KH
2023-10-04 14:34 ` Michal Simek
2023-10-05 14:09 ` Buddhabhatti, Jay
2023-10-05 14:10 ` Greg KH
2023-10-06 5:15 ` Buddhabhatti, Jay
2023-10-04 11:31 ` [PATCH v2 0/6] update for versal net platform Michal Simek
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