* [PATCH 0/2] Updates for SGI UV1/UV2 systems...
@ 2012-02-23 0:49 Mike Travis
2012-02-23 0:49 ` [PATCH 1/2] x86 PCI: Fix identity mapping for sandy bridge Mike Travis
2012-02-23 0:49 ` [PATCH 2/2] x86, pci: Increase the number of iommus supported to be MAX_IO_APICS v2 Mike Travis
0 siblings, 2 replies; 7+ messages in thread
From: Mike Travis @ 2012-02-23 0:49 UTC (permalink / raw
To: Andrew Morton
Cc: Ingo Molnar, David Woodhouse, Chris Wright, Daniel Rahn,
Jesse Barnes, Jack Steiner, Tony Ernst, x86, linux-kernel
- Fix arbitrary limitation of number of IOMMU (from 64 to MAX_IO_APICS [128])
- Fix IOMMU identity mapping to not map a PCI device that does not to DMA.
--
^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH 1/2] x86 PCI: Fix identity mapping for sandy bridge
2012-02-23 0:49 [PATCH 0/2] Updates for SGI UV1/UV2 systems Mike Travis
@ 2012-02-23 0:49 ` Mike Travis
2012-02-23 0:49 ` [PATCH 2/2] x86, pci: Increase the number of iommus supported to be MAX_IO_APICS v2 Mike Travis
1 sibling, 0 replies; 7+ messages in thread
From: Mike Travis @ 2012-02-23 0:49 UTC (permalink / raw
To: Andrew Morton
Cc: Ingo Molnar, David Woodhouse, Chris Wright, Daniel Rahn,
Jesse Barnes, Jack Steiner, Tony Ernst, x86, linux-kernel,
Mike Habeck
[-- Attachment #1: fix-iommu-identity-mapping-for-sb --]
[-- Type: text/plain, Size: 1874 bytes --]
With SandyBridge, Intel has changed these Socket PCI devices to have a class
type of "System Peripheral" & "Performance counter", rather than "HostBridge".
So instead of using a "special" case to detect which devices will not be
doing DMA, use the fact that a device that is not associated with an IOMMU,
will not need an identity map.
Signed-off-by: Mike Travis <travis@sgi.com>
Signed-off-by: Mike Habeck <habeck@sgi.com>
---
drivers/iommu/intel-iommu.c | 20 +++++++++-----------
1 file changed, 9 insertions(+), 11 deletions(-)
--- linux.orig/drivers/iommu/intel-iommu.c
+++ linux/drivers/iommu/intel-iommu.c
@@ -48,8 +48,6 @@
#define ROOT_SIZE VTD_PAGE_SIZE
#define CONTEXT_SIZE VTD_PAGE_SIZE
-#define IS_BRIDGE_HOST_DEVICE(pdev) \
- ((pdev->class >> 8) == PCI_CLASS_BRIDGE_HOST)
#define IS_GFX_DEVICE(pdev) ((pdev->class >> 16) == PCI_BASE_CLASS_DISPLAY)
#define IS_ISA_DEVICE(pdev) ((pdev->class >> 8) == PCI_CLASS_BRIDGE_ISA)
#define IS_AZALIA(pdev) ((pdev)->vendor == 0x8086 && (pdev)->device == 0x3a3e)
@@ -2369,18 +2367,18 @@ static int __init iommu_prepare_static_i
return -EFAULT;
for_each_pci_dev(pdev) {
- /* Skip Host/PCI Bridge devices */
- if (IS_BRIDGE_HOST_DEVICE(pdev))
- continue;
if (iommu_should_identity_map(pdev, 1)) {
- printk(KERN_INFO "IOMMU: %s identity mapping for device %s\n",
- hw ? "hardware" : "software", pci_name(pdev));
-
ret = domain_add_dev_info(si_domain, pdev,
- hw ? CONTEXT_TT_PASS_THROUGH :
- CONTEXT_TT_MULTI_LEVEL);
- if (ret)
+ hw ? CONTEXT_TT_PASS_THROUGH :
+ CONTEXT_TT_MULTI_LEVEL);
+ if (ret) {
+ /* device not associated with an iommu */
+ if (ret == -ENODEV)
+ continue;
return ret;
+ }
+ pr_info("IOMMU: %s identity mapping for device %s\n",
+ hw ? "hardware" : "software", pci_name(pdev));
}
}
--
^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH 2/2] x86, pci: Increase the number of iommus supported to be MAX_IO_APICS v2
2012-02-23 0:49 [PATCH 0/2] Updates for SGI UV1/UV2 systems Mike Travis
2012-02-23 0:49 ` [PATCH 1/2] x86 PCI: Fix identity mapping for sandy bridge Mike Travis
@ 2012-02-23 0:49 ` Mike Travis
2012-02-23 20:30 ` Andrew Morton
1 sibling, 1 reply; 7+ messages in thread
From: Mike Travis @ 2012-02-23 0:49 UTC (permalink / raw
To: Andrew Morton
Cc: Ingo Molnar, David Woodhouse, Chris Wright, Daniel Rahn,
Jesse Barnes, Jack Steiner, Tony Ernst, x86, linux-kernel
[-- Attachment #1: uv2-up-iommu-limit-v2 --]
[-- Type: text/plain, Size: 5443 bytes --]
The number of IOMMUs supported should be the same as the number of IO APICS.
This limit comes into play when the IOMMUs are identity mapped, thus the
number of possible IOMMUs in the "static identity" (si) domain should be
this same number.
Version 2: Fix compile error on ia64 (it uses the DMAR logic but does not
define MAX_IO_APICS.) Check to insure that iommu_bmp does not overflow.
Signed-off-by: Mike Travis <travis@sgi.com>
Signed-off-by: Jack Steiner <steiner@sgi.com>
---
drivers/iommu/intel-iommu.c | 39 ++++++++++++++++++++++++++-------------
1 file changed, 26 insertions(+), 13 deletions(-)
--- linux.orig/drivers/iommu/intel-iommu.c
+++ linux/drivers/iommu/intel-iommu.c
@@ -354,10 +354,18 @@ static int hw_pass_through = 1;
/* si_domain contains mulitple devices */
#define DOMAIN_FLAG_STATIC_IDENTITY (1 << 2)
+/* define the limit of IOMMUs supported in each domain */
+#ifdef CONFIG_X86
+#define IOMMU_UNITS_SUPPORTED MAX_IO_APICS
+#else
+#define IOMMU_UNITS_SUPPORTED 64
+#endif
+
struct dmar_domain {
int id; /* domain id */
int nid; /* node id */
- unsigned long iommu_bmp; /* bitmap of iommus this domain uses*/
+ DECLARE_BITMAP(iommu_bmp, IOMMU_UNITS_SUPPORTED);
+ /* bitmap of iommus this domain uses*/
struct list_head devices; /* all devices' list */
struct iova_domain iovad; /* iova's that belong to this domain */
@@ -569,7 +577,7 @@ static struct intel_iommu *domain_get_io
BUG_ON(domain->flags & DOMAIN_FLAG_VIRTUAL_MACHINE);
BUG_ON(domain->flags & DOMAIN_FLAG_STATIC_IDENTITY);
- iommu_id = find_first_bit(&domain->iommu_bmp, g_num_of_iommus);
+ iommu_id = find_first_bit(domain->iommu_bmp, g_num_of_iommus);
if (iommu_id < 0 || iommu_id >= g_num_of_iommus)
return NULL;
@@ -582,7 +590,7 @@ static void domain_update_iommu_coherenc
domain->iommu_coherency = 1;
- for_each_set_bit(i, &domain->iommu_bmp, g_num_of_iommus) {
+ for_each_set_bit(i, domain->iommu_bmp, g_num_of_iommus) {
if (!ecap_coherent(g_iommus[i]->ecap)) {
domain->iommu_coherency = 0;
break;
@@ -596,7 +604,7 @@ static void domain_update_iommu_snooping
domain->iommu_snooping = 1;
- for_each_set_bit(i, &domain->iommu_bmp, g_num_of_iommus) {
+ for_each_set_bit(i, domain->iommu_bmp, g_num_of_iommus) {
if (!ecap_sc_support(g_iommus[i]->ecap)) {
domain->iommu_snooping = 0;
break;
@@ -1332,7 +1340,7 @@ static struct dmar_domain *alloc_domain(
return NULL;
domain->nid = -1;
- memset(&domain->iommu_bmp, 0, sizeof(unsigned long));
+ memset(domain->iommu_bmp, 0, sizeof(domain->iommu_bmp));
domain->flags = 0;
return domain;
@@ -1358,7 +1366,7 @@ static int iommu_attach_domain(struct dm
domain->id = num;
set_bit(num, iommu->domain_ids);
- set_bit(iommu->seq_id, &domain->iommu_bmp);
+ set_bit(iommu->seq_id, domain->iommu_bmp);
iommu->domains[num] = domain;
spin_unlock_irqrestore(&iommu->lock, flags);
@@ -1383,7 +1391,7 @@ static void iommu_detach_domain(struct d
if (found) {
clear_bit(num, iommu->domain_ids);
- clear_bit(iommu->seq_id, &domain->iommu_bmp);
+ clear_bit(iommu->seq_id, domain->iommu_bmp);
iommu->domains[num] = NULL;
}
spin_unlock_irqrestore(&iommu->lock, flags);
@@ -1525,7 +1533,7 @@ static void domain_exit(struct dmar_doma
dma_pte_free_pagetable(domain, 0, DOMAIN_MAX_PFN(domain->gaw));
for_each_active_iommu(iommu, drhd)
- if (test_bit(iommu->seq_id, &domain->iommu_bmp))
+ if (test_bit(iommu->seq_id, domain->iommu_bmp))
iommu_detach_domain(domain, iommu);
free_domain_mem(domain);
@@ -1651,7 +1659,7 @@ static int domain_context_mapping_one(st
spin_unlock_irqrestore(&iommu->lock, flags);
spin_lock_irqsave(&domain->iommu_lock, flags);
- if (!test_and_set_bit(iommu->seq_id, &domain->iommu_bmp)) {
+ if (!test_and_set_bit(iommu->seq_id, domain->iommu_bmp)) {
domain->iommu_count++;
if (domain->iommu_count == 1)
domain->nid = iommu->node;
@@ -2400,12 +2408,17 @@ static int __init init_dmars(void)
* endfor
*/
for_each_drhd_unit(drhd) {
- g_num_of_iommus++;
/*
* lock not needed as this is only incremented in the single
* threaded kernel __init code path all other access are read
* only
*/
+ if (g_num_of_iommus < IOMMU_UNITS_SUPPORTED)
+ g_num_of_iommus++;
+ else
+ printk_once(KERN_ERR,
+ "MAX number (%d) of IOMMUs supported exceeded\n",
+ IOMMU_UNITS_SUPPORTED);
}
g_iommus = kcalloc(g_num_of_iommus, sizeof(struct intel_iommu *),
@@ -3746,7 +3759,7 @@ static void domain_remove_one_dev_info(s
if (found == 0) {
unsigned long tmp_flags;
spin_lock_irqsave(&domain->iommu_lock, tmp_flags);
- clear_bit(iommu->seq_id, &domain->iommu_bmp);
+ clear_bit(iommu->seq_id, domain->iommu_bmp);
domain->iommu_count--;
domain_update_iommu_cap(domain);
spin_unlock_irqrestore(&domain->iommu_lock, tmp_flags);
@@ -3788,7 +3801,7 @@ static void vm_domain_remove_all_dev_inf
*/
spin_lock_irqsave(&domain->iommu_lock, flags2);
if (test_and_clear_bit(iommu->seq_id,
- &domain->iommu_bmp)) {
+ domain->iommu_bmp)) {
domain->iommu_count--;
domain_update_iommu_cap(domain);
}
@@ -3813,7 +3826,7 @@ static struct dmar_domain *iommu_alloc_v
domain->id = vm_domid++;
domain->nid = -1;
- memset(&domain->iommu_bmp, 0, sizeof(unsigned long));
+ memset(domain->iommu_bmp, 0, sizeof(domain->iommu_bmp));
domain->flags = DOMAIN_FLAG_VIRTUAL_MACHINE;
return domain;
--
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH 2/2] x86, pci: Increase the number of iommus supported to be MAX_IO_APICS v2
2012-02-23 0:49 ` [PATCH 2/2] x86, pci: Increase the number of iommus supported to be MAX_IO_APICS v2 Mike Travis
@ 2012-02-23 20:30 ` Andrew Morton
2012-02-27 7:57 ` Ingo Molnar
0 siblings, 1 reply; 7+ messages in thread
From: Andrew Morton @ 2012-02-23 20:30 UTC (permalink / raw
To: Mike Travis
Cc: Ingo Molnar, David Woodhouse, Chris Wright, Daniel Rahn,
Jesse Barnes, Jack Steiner, Tony Ernst, x86, linux-kernel
On Wed, 22 Feb 2012 18:49:32 -0600
Mike Travis <travis@sgi.com> wrote:
> The number of IOMMUs supported should be the same as the number of IO APICS.
> This limit comes into play when the IOMMUs are identity mapped, thus the
> number of possible IOMMUs in the "static identity" (si) domain should be
> this same number.
>
> Version 2: Fix compile error on ia64 (it uses the DMAR logic but does not
> define MAX_IO_APICS.) Check to insure that iommu_bmp does not overflow.
Here's your v2 delta:
--- a/drivers/iommu/intel-iommu.c~x86-pci-increase-the-number-of-iommus-supported-to-be-max_io_apics-v2
+++ a/drivers/iommu/intel-iommu.c
@@ -354,10 +354,17 @@ static int hw_pass_through = 1;
/* si_domain contains mulitple devices */
#define DOMAIN_FLAG_STATIC_IDENTITY (1 << 2)
+/* define the limit of IOMMUs supported in each domain */
+#ifdef CONFIG_X86
+#define IOMMU_UNITS_SUPPORTED MAX_IO_APICS
+#else
+#define IOMMU_UNITS_SUPPORTED 64
+#endif
+
struct dmar_domain {
int id; /* domain id */
int nid; /* node id */
- DECLARE_BITMAP(iommu_bmp, MAX_IO_APICS);
+ DECLARE_BITMAP(iommu_bmp, IOMMU_UNITS_SUPPORTED);
/* bitmap of iommus this domain uses*/
struct list_head devices; /* all devices' list */
@@ -2401,12 +2408,17 @@ static int __init init_dmars(void)
* endfor
*/
for_each_drhd_unit(drhd) {
- g_num_of_iommus++;
/*
* lock not needed as this is only incremented in the single
* threaded kernel __init code path all other access are read
* only
*/
+ if (g_num_of_iommus < IOMMU_UNITS_SUPPORTED)
+ g_num_of_iommus++;
+ else
+ printk_once(KERN_ERR,
+ "MAX number (%d) of IOMMUs supported exceeded\n",
+ IOMMU_UNITS_SUPPORTED);
}
g_iommus = kcalloc(g_num_of_iommus, sizeof(struct intel_iommu *),
The printk_once() is wrong, isn't it? There should not be a comma.
Also we can tweak the code flow and the message to avoid dorky
80-column games:
--- a/drivers/iommu/intel-iommu.c~x86-pci-increase-the-number-of-iommus-supported-to-be-max_io_apics-v2-fix
+++ a/drivers/iommu/intel-iommu.c
@@ -2413,11 +2413,11 @@ static int __init init_dmars(void)
* threaded kernel __init code path all other access are read
* only
*/
- if (g_num_of_iommus < IOMMU_UNITS_SUPPORTED)
+ if (g_num_of_iommus < IOMMU_UNITS_SUPPORTED) {
g_num_of_iommus++;
- else
- printk_once(KERN_ERR,
- "MAX number (%d) of IOMMUs supported exceeded\n",
+ continue;
+ }
+ printk_once(KERN_ERR "intel-iommu: exceeded %d IOMMUs\n",
IOMMU_UNITS_SUPPORTED);
}
_
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH 2/2] x86, pci: Increase the number of iommus supported to be MAX_IO_APICS v2
2012-02-23 20:30 ` Andrew Morton
@ 2012-02-27 7:57 ` Ingo Molnar
2012-02-27 8:03 ` Andrew Morton
0 siblings, 1 reply; 7+ messages in thread
From: Ingo Molnar @ 2012-02-27 7:57 UTC (permalink / raw
To: Andrew Morton
Cc: Mike Travis, David Woodhouse, Chris Wright, Daniel Rahn,
Jesse Barnes, Jack Steiner, Tony Ernst, x86, linux-kernel
* Andrew Morton <akpm@linux-foundation.org> wrote:
> Also we can tweak the code flow and the message to avoid dorky
> 80-column games:
> + printk_once(KERN_ERR "intel-iommu: exceeded %d IOMMUs\n",
> IOMMU_UNITS_SUPPORTED);
Not to mention the use of pr_err():
pr_err("intel-iommu: exceeded %d IOMMUs\n", IOMMU_UNITS_SUPPORTED);
Plus if we defined a proper driver message prefix at the top of
the driver:
#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
We could do:
pr_err("Exceeded max %d IOMMUs\n", IOMMU_UNITS_SUPPORTED);
Note, I added 'max', for clarity.
Plus IOMMU_UNITS_SUPPORTED could be renamed to the much shorter
IOMMU_MAX, without a loss of clarity:
pr_err("Exceeded max %d IOMMUs\n", IOMMU_MAX);
So we made that line vastly shorter, and made the human-readable
message actually longer and more expressive.
80 column wraps are almost always not a sign of lack of screen
real estate, but a symptom of lack of thinking.
Thanks,
Ingo
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH 2/2] x86, pci: Increase the number of iommus supported to be MAX_IO_APICS v2
2012-02-27 7:57 ` Ingo Molnar
@ 2012-02-27 8:03 ` Andrew Morton
2012-02-27 9:15 ` Ingo Molnar
0 siblings, 1 reply; 7+ messages in thread
From: Andrew Morton @ 2012-02-27 8:03 UTC (permalink / raw
To: Ingo Molnar
Cc: Mike Travis, David Woodhouse, Chris Wright, Daniel Rahn,
Jesse Barnes, Jack Steiner, Tony Ernst, x86, linux-kernel
On Mon, 27 Feb 2012 08:57:41 +0100 Ingo Molnar <mingo@elte.hu> wrote:
> * Andrew Morton <akpm@linux-foundation.org> wrote:
>
> > Also we can tweak the code flow and the message to avoid dorky
> > 80-column games:
>
> > + printk_once(KERN_ERR "intel-iommu: exceeded %d IOMMUs\n",
> > IOMMU_UNITS_SUPPORTED);
>
> Not to mention the use of pr_err():
>
> pr_err("intel-iommu: exceeded %d IOMMUs\n", IOMMU_UNITS_SUPPORTED);
Where's my pr_err_once() ;)
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH 2/2] x86, pci: Increase the number of iommus supported to be MAX_IO_APICS v2
2012-02-27 8:03 ` Andrew Morton
@ 2012-02-27 9:15 ` Ingo Molnar
0 siblings, 0 replies; 7+ messages in thread
From: Ingo Molnar @ 2012-02-27 9:15 UTC (permalink / raw
To: Andrew Morton
Cc: Mike Travis, David Woodhouse, Chris Wright, Daniel Rahn,
Jesse Barnes, Jack Steiner, Tony Ernst, x86, linux-kernel
* Andrew Morton <akpm@linux-foundation.org> wrote:
> On Mon, 27 Feb 2012 08:57:41 +0100 Ingo Molnar <mingo@elte.hu> wrote:
>
> > * Andrew Morton <akpm@linux-foundation.org> wrote:
> >
> > > Also we can tweak the code flow and the message to avoid dorky
> > > 80-column games:
> >
> > > + printk_once(KERN_ERR "intel-iommu: exceeded %d IOMMUs\n",
> > > IOMMU_UNITS_SUPPORTED);
> >
> > Not to mention the use of pr_err():
> >
> > pr_err("intel-iommu: exceeded %d IOMMUs\n", IOMMU_UNITS_SUPPORTED);
>
> Where's my pr_err_once() ;)
We suck when it comes to API consistency :-)
Ingo
^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2012-02-27 9:16 UTC | newest]
Thread overview: 7+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2012-02-23 0:49 [PATCH 0/2] Updates for SGI UV1/UV2 systems Mike Travis
2012-02-23 0:49 ` [PATCH 1/2] x86 PCI: Fix identity mapping for sandy bridge Mike Travis
2012-02-23 0:49 ` [PATCH 2/2] x86, pci: Increase the number of iommus supported to be MAX_IO_APICS v2 Mike Travis
2012-02-23 20:30 ` Andrew Morton
2012-02-27 7:57 ` Ingo Molnar
2012-02-27 8:03 ` Andrew Morton
2012-02-27 9:15 ` Ingo Molnar
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