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From: Jason Gunthorpe <jgg@nvidia.com>
To: Nicolin Chen <nicolinc@nvidia.com>
Cc: will@kernel.org, robin.murphy@arm.com, joro@8bytes.org,
	thierry.reding@gmail.com, vdumpa@nvidia.com,
	jonathanh@nvidia.com, linux-kernel@vger.kernel.org,
	iommu@lists.linux.dev, linux-arm-kernel@lists.infradead.org,
	linux-tegra@vger.kernel.org
Subject: Re: [PATCH v6 6/6] iommu/tegra241-cmdqv: Limit CMDs for guest owned VINTF
Date: Mon, 6 May 2024 10:00:05 -0300	[thread overview]
Message-ID: <20240506130005.GH3341011@nvidia.com> (raw)
In-Reply-To: <ZjhUAF07Co25F/qe@Asurada-Nvidia>

On Sun, May 05, 2024 at 08:52:32PM -0700, Nicolin Chen wrote:
> On Tue, Apr 30, 2024 at 09:17:58PM -0300, Jason Gunthorpe wrote:
> > On Tue, Apr 30, 2024 at 11:58:44AM -0700, Nicolin Chen wrote:
> > > Otherwise, there has to be a get_suported_cmdq callback so batch
> > > or its callers can avoid adding unsupported commands at the first
> > > place.
> > 
> > If you really feel strongly the invalidation could be split into
> > S1/S2/S1_VM groupings that align with the feature bits and that could
> > be passed down from one step above. But I don't think the complexity
> > is really needed. It is better to deal with it through the feature
> > mechanism.
> 
> Hmm, I tried following your design by passing in a CMD_TYPE_xxx
> to the tegra241_cmdqv_get_cmdq(), but I found a little painful
> to accommodate these two cases:
> 1. TLBI_NH_ASID is issued via arm_smmu_cmdq_issue_cmdlist(), so
>    we should not mark it as CMD_TYPE_ALL. Yet, this function is
>    used by other commands too. So, either we pass in a type from
>    higher callers, or simply check the opcode in that function.

Yes, you'd have to pass in the type there too, which makes it more
ugly.

> So, it feels to me that checking against the opcode is still a
> straightforward solution. And what I ended up with is somewhat
> similar to this v6, yet this time it only checks at batch init
> call as your design does.

Well, the only downside is that the commands have to be same in a
batch, but maybe that is OK anyhow.

Don't forget to take the hunks that fix the queue as well.

Jason

      reply	other threads:[~2024-05-06 13:00 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-04-30  4:43 [PATCH v6 0/6] Add Tegra241 (Grace) CMDQV Support (part 1/2) Nicolin Chen
2024-04-30  4:43 ` [PATCH v6 1/6] iommu/arm-smmu-v3: Pass in cmdq pointer to arm_smmu_cmdq_issue_cmdlist() Nicolin Chen
2024-04-30 13:54   ` Jason Gunthorpe
2024-04-30  4:43 ` [PATCH v6 2/6] iommu/arm-smmu-v3: Add CS_NONE quirk Nicolin Chen
2024-04-30 14:22   ` Jason Gunthorpe
2024-04-30 16:30     ` Nicolin Chen
2024-04-30 16:37       ` Jason Gunthorpe
2024-04-30 16:43         ` Nicolin Chen
2024-04-30  4:43 ` [PATCH v6 3/6] iommu/arm-smmu-v3: Make arm_smmu_cmdq_init reusable Nicolin Chen
2024-04-30 14:24   ` Jason Gunthorpe
2024-04-30 15:50     ` Nicolin Chen
2024-04-30  4:43 ` [PATCH v6 4/6] iommu/arm-smmu-v3: Make __arm_smmu_cmdq_skip_err reusable Nicolin Chen
2024-04-30 14:06   ` Jason Gunthorpe
2024-04-30 15:48     ` Nicolin Chen
2024-04-30  4:43 ` [PATCH v6 5/6] iommu/arm-smmu-v3: Add in-kernel support for NVIDIA Tegra241 (Grace) CMDQV Nicolin Chen
2024-04-30 16:35   ` Jason Gunthorpe
2024-04-30 18:08     ` Nicolin Chen
2024-05-01 13:00       ` Jason Gunthorpe
2024-05-01 17:43         ` Nicolin Chen
2024-05-02 12:41           ` Jason Gunthorpe
2024-05-02 19:26             ` Nicolin Chen
2024-04-30  4:43 ` [PATCH v6 6/6] iommu/tegra241-cmdqv: Limit CMDs for guest owned VINTF Nicolin Chen
2024-04-30 17:06   ` Jason Gunthorpe
2024-04-30 18:58     ` Nicolin Chen
2024-05-01  0:17       ` Jason Gunthorpe
2024-05-01 16:32         ` Nicolin Chen
2024-05-06  3:52         ` Nicolin Chen
2024-05-06 13:00           ` Jason Gunthorpe [this message]

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