From: Bartosz Golaszewski <brgl@bgdev.pl>
To: linus.walleij@linaro.org, brgl@bgdev.pl, jonathanh@nvidia.com,
treding@nvidia.com, sfr@canb.auug.org.au,
linux-gpio@vger.kernel.org, linux-tegra@vger.kernel.org,
linux-kernel@vger.kernel.org,
Prathamesh Shete <pshete@nvidia.com>
Cc: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>,
mochs@nvidia.com, csoto@nvidia.com, jamien@nvidia.com,
smangipudi@nvidia.com
Subject: Re: [PATCH v3] gpio: tegra186: Fix tegra186_gpio_is_accessible() check
Date: Wed, 24 Apr 2024 15:32:32 +0200 [thread overview]
Message-ID: <171396554137.82284.11131075774933207943.b4-ty@linaro.org> (raw)
In-Reply-To: <20240424095514.24397-1-pshete@nvidia.com>
From: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
On Wed, 24 Apr 2024 15:25:14 +0530, Prathamesh Shete wrote:
> The controller has several register bits describing access control
> information for a given GPIO pin. When SCR_SEC_[R|W]EN is unset, it
> means we have full read/write access to all the registers for given GPIO
> pin. When SCR_SEC[R|W]EN is set, it means we need to further check the
> accompanying SCR_SEC_G1[R|W] bit to determine read/write access to all
> the registers for given GPIO pin.
>
> [...]
Applied, thanks!
[1/1] gpio: tegra186: Fix tegra186_gpio_is_accessible() check
commit: d806f474a9a7993648a2c70642ee129316d8deff
Best regards,
--
Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
prev parent reply other threads:[~2024-04-24 13:32 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <CACMJSeu+fUdYoxue-q=DxFdvtopgshQY+i2kpZMP-RGOTqMu_g@mail.gmail.com>
2024-04-23 12:00 ` [PATCH v2] gpio: tegra186: Fix tegra186_gpio_is_accessible() check Prathamesh Shete
2024-04-24 8:31 ` Bartosz Golaszewski
2024-04-24 9:55 ` [PATCH v3] " Prathamesh Shete
2024-04-24 13:32 ` Bartosz Golaszewski [this message]
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