From: Palmer Dabbelt <palmer@rivosinc.com>
To: luc.vanoostenryck@gmail.com, linux-sparse@vger.kernel.org
Cc: Palmer Dabbelt <palmer@rivosinc.com>
Subject: [PATCH] RISC-V: Add support for the zicbom extension
Date: Wed, 10 Aug 2022 20:31:38 -0700 [thread overview]
Message-ID: <20220811033138.20676-1-palmer@rivosinc.com> (raw)
This was recently added to binutils and with any luck will soon be in
Linux, without it sparse will fail when trying to build new kernels on
systems with new toolchains.
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
---
target-riscv.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/target-riscv.c b/target-riscv.c
index 217ab7e8..db0f7e57 100644
--- a/target-riscv.c
+++ b/target-riscv.c
@@ -19,6 +19,7 @@
#define RISCV_GENERIC (RISCV_MUL|RISCV_DIV|RISCV_ATOMIC|RISCV_FPU)
#define RISCV_ZICSR (1 << 10)
#define RISCV_ZIFENCEI (1 << 11)
+#define RISCV_ZICBOM (1 << 12)
static unsigned int riscv_flags;
@@ -41,6 +42,7 @@ static void parse_march_riscv(const char *arg)
{ "c", RISCV_COMP },
{ "_zicsr", RISCV_ZICSR },
{ "_zifencei", RISCV_ZIFENCEI },
+ { "_zicbom", RISCV_ZICBOM },
};
int i;
@@ -131,6 +133,8 @@ static void predefine_riscv(const struct target *self)
predefine("__riscv_zicsr", 1, "1");
if (riscv_flags & RISCV_ZIFENCEI)
predefine("__riscv_zifencei", 1, "1");
+ if (riscv_flags & RISCV_ZICBOM)
+ predefine("__riscv_zicbom", 1, "1");
if (cmodel)
predefine_strong("__riscv_cmodel_%s", cmodel);
--
2.34.1
next reply other threads:[~2022-08-11 3:33 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-08-11 3:31 Palmer Dabbelt [this message]
2022-08-12 8:25 ` [PATCH] RISC-V: Add support for the zicbom extension Conor Dooley
2022-10-12 21:11 ` Conor Dooley
2022-10-12 23:34 ` Palmer Dabbelt
2022-10-13 11:34 ` Conor Dooley
2023-12-15 12:37 ` Geert Uytterhoeven
2023-12-18 13:58 ` Luc Van Oostenryck
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