From: Shahab Vahedi <Shahab.Vahedi@synopsys.com>
To: Michael Sit Wei Hong <michael.wei.hong.sit@intel.com>
Cc: Martin Blumenstingl <martin.blumenstingl@googlemail.com>,
Vineet Gupta <vgupta@kernel.org>,
"linux-snps-arc@lists.infradead.org"
<linux-snps-arc@lists.infradead.org>,
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"davem@davemloft.net" <davem@davemloft.net>,
"edumazet@google.com" <edumazet@google.com>,
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"hong.aun.looi@intel.com" <hong.aun.looi@intel.com>,
Jose Abreu <Jose.Abreu@synopsys.com>,
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Subject: Re: [PATCH net v5 2/3] net: stmmac: check if MAC needs to attach to a PHY
Date: Wed, 5 Apr 2023 09:06:23 +0000 [thread overview]
Message-ID: <f32d74cf-22e6-7c03-c9c9-a51eb5d10db6@synopsys.com> (raw)
In-Reply-To: <20230403212434.296975-1-martin.blumenstingl@googlemail.com>
Fixing the CC header. Apologies for the inconvenience.
------
Same happens on ARC HSDK [1]:
# dmesg | grep stmmaceth
stmmaceth f0008000.ethernet: use coherent DMA ops
stmmaceth f0008000.ethernet: IRQ eth_wake_irq not found
stmmaceth f0008000.ethernet: IRQ eth_lpi not found
stmmaceth f0008000.ethernet: PTP uses main clock
stmmaceth f0008000.ethernet: User ID: 0x10, Synopsys ID: 0x37
stmmaceth f0008000.ethernet: DWMAC1000
stmmaceth f0008000.ethernet: DMA HW capability register supported
stmmaceth f0008000.ethernet: RX Checksum Offload Engine supported
stmmaceth f0008000.ethernet: COE Type 2
stmmaceth f0008000.ethernet: TX Checksum insertion supported
stmmaceth f0008000.ethernet: Normal descriptors
stmmaceth f0008000.ethernet: Ring mode enabled
stmmaceth f0008000.ethernet: Enable RX Mitigation via HW Watchdog Timer
stmmaceth f0008000.ethernet: device MAC address 7e:14:df:5f:b8:78
stmmaceth f0008000.ethernet eth0: Register MEM_TYPE_PAGE_POOL RxQ-0
stmmaceth f0008000.ethernet eth0: PHY [stmmac-0:00] driver [Micrel KSZ9031 Gigabit PHY] (irq=POLL)
stmmaceth f0008000.ethernet eth0: no phy found
stmmaceth f0008000.ethernet eth0: __stmmac_open: Cannot attach to PHY (error: -19)
After reverting this patch:
# dmesg | grep stmmaceth
stmmaceth f0008000.ethernet: use coherent DMA ops
stmmaceth f0008000.ethernet: IRQ eth_wake_irq not found
stmmaceth f0008000.ethernet: IRQ eth_lpi not found
stmmaceth f0008000.ethernet: PTP uses main clock
stmmaceth f0008000.ethernet: User ID: 0x10, Synopsys ID: 0x37
stmmaceth f0008000.ethernet: DWMAC1000
stmmaceth f0008000.ethernet: DMA HW capability register supported
stmmaceth f0008000.ethernet: RX Checksum Offload Engine supported
stmmaceth f0008000.ethernet: COE Type 2
stmmaceth f0008000.ethernet: TX Checksum insertion supported
stmmaceth f0008000.ethernet: Normal descriptors
stmmaceth f0008000.ethernet: Ring mode enabled
stmmaceth f0008000.ethernet: Enable RX Mitigation via HW Watchdog Timer
stmmaceth f0008000.ethernet: device MAC address 26:05:ea:c0:66:16
stmmaceth f0008000.ethernet eth0: Register MEM_TYPE_PAGE_POOL RxQ-0
stmmaceth f0008000.ethernet eth0: PHY [stmmac-0:00] driver [Micrel KSZ9031
Gigabit PHY] (irq=POLL)
stmmaceth f0008000.ethernet eth0: No Safety Features support found
stmmaceth f0008000.ethernet eth0: PTP not supported by HW
stmmaceth f0008000.ethernet eth0: configuring for phy/rgmii-id link mode
stmmaceth f0008000.ethernet eth0: Link is Up - 1Gbps/Full - flow control off
[1]
arch/arc/boot/dts/hsdk.dts
--
Shahab
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parent reply other threads:[~2023-04-05 9:07 UTC|newest]
Thread overview: expand[flat|nested] mbox.gz Atom feed
[parent not found: <20230403212434.296975-1-martin.blumenstingl@googlemail.com>]
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