From: Jiri Slaby <jirislaby@kernel.org>
To: Konstantin <rilian.la.te@ya.ru>
Cc: Konstantin <ria.freelander@gmail.com>,
"Greg Kroah-Hartman" <gregkh@linuxfoundation.org>,
"Hugo Villeneuve" <hvilleneuve@dimonoff.com>,
"Andy Shevchenko" <andriy.shevchenko@linux.intel.com>,
"Lech Perczak" <lech.perczak@camlingroup.com>,
"Ilpo Järvinen" <ilpo.jarvinen@linux.intel.com>,
"Thomas Gleixner" <tglx@linutronix.de>,
linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org
Subject: Re: [PATCH 3/3] serial: sc16is7xx: add support for EXAR XR20M1172 UART
Date: Fri, 19 Apr 2024 07:45:04 +0200 [thread overview]
Message-ID: <5cee4da4-1620-449c-8160-ff4168b0688e@kernel.org> (raw)
In-Reply-To: <20240418132508.3447800-4-rilian.la.te@ya.ru>
On 18. 04. 24, 15:25, Konstantin wrote:
> From: Konstantin <ria.freelander@gmail.com>
>
> Its register set is mostly compatible with SC16IS762, but
> it has a support for additional division rates of UART
> with special DLD register. So, add handling this register
> via UPF_MAGIC_MULTIPLIER port flag.
>
> Signed-off-by: Konstantin Pugin <ria.freelander@gmail.com>
> ---
> drivers/tty/serial/sc16is7xx.c | 54 ++++++++++++++++++++++++++++++++--
> 1 file changed, 51 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/tty/serial/sc16is7xx.c b/drivers/tty/serial/sc16is7xx.c
> index a300eebf1401..7fc1c19b3891 100644
> --- a/drivers/tty/serial/sc16is7xx.c
> +++ b/drivers/tty/serial/sc16is7xx.c
> @@ -65,6 +65,7 @@
> /* Special Register set: Only if ((LCR[7] == 1) && (LCR != 0xBF)) */
> #define SC16IS7XX_DLL_REG (0x00) /* Divisor Latch Low */
> #define SC16IS7XX_DLH_REG (0x01) /* Divisor Latch High */
> +#define SC16IS7XX_DLD_REG (0x02) /* Divisor Latch Mode (only on EXAR chips) */
>
> /* Enhanced Register set: Only if (LCR == 0xBF) */
> #define SC16IS7XX_EFR_REG (0x02) /* Enhanced Features */
> @@ -218,6 +219,20 @@
> #define SC16IS7XX_TCR_RX_HALT(words) ((((words) / 4) & 0x0f) << 0)
> #define SC16IS7XX_TCR_RX_RESUME(words) ((((words) / 4) & 0x0f) << 4)
>
> +/* Divisor Latch Mode bits (EXAR extension)
> + *
> + * EXAR hardware is mostly compatible with SC16IS7XX, but supports additional feature:
> + * 4x and 8x divisor, instead of default 16x. It has a special register to program it.
> + * Bits 0 to 3 is fractional divisor, it used to set value of last 16 bits of
> + * uartclk * (16 / divisor) / baud, in case of default it will be uartclk / baud.
> + * Bits 4 and 5 used as switches, and should not be set to 1 simultaneously.
> + */
> +
> +#define SC16IS7XX_DLD_16X 0
> +#define SC16IS7XX_DLD_DIV(m) ((m) & 0xf)
Why not to use GENMASK() here and FIELD_PREP() in the code?
> +#define SC16IS7XX_DLD_8X BIT(4)
> +#define SC16IS7XX_DLD_4X BIT(5)
> +
> /*
> * TLR register bits
> * If TLR[3:0] or TLR[7:4] are logical 0, the selectable trigger levels via the
...
> @@ -559,13 +582,29 @@ static int sc16is7xx_set_baud(struct uart_port *port, int baud)
> struct sc16is7xx_one *one = to_sc16is7xx_one(port, port);
> u8 lcr;
> u8 prescaler = 0;
> - unsigned long clk = port->uartclk, div = clk / 16 / baud;
> + u8 divisor = 16;
> + u8 dld_mode = SC16IS7XX_DLD_16X;
> + bool has_dld = !!(port->flags & UPF_MAGIC_MULTIPLIER);
No need for !!.
> + unsigned long clk = port->uartclk, div, div16;
All these locals would deserve better ordering.
...
> @@ -1014,6 +1055,7 @@ static void sc16is7xx_set_termios(struct uart_port *port,
> unsigned int lcr, flow = 0;
> int baud;
> unsigned long flags;
> + bool has_dld = !!(port->flags & UPF_MAGIC_MULTIPLIER);
Ditto.
>
> kthread_cancel_delayed_work_sync(&one->ms_work);
>
thanks,
--
js
suse labs
prev parent reply other threads:[~2024-04-19 5:45 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-04-18 13:25 [PATCH 0/3] add support for EXAR XR20M1172 UART Konstantin
2024-04-18 13:25 ` [PATCH 1/3] serial: sc16is7xx: announce support of SER_RS485_RTS_ON_SEND Konstantin
2024-04-18 13:25 ` [PATCH 2/3] serial: sc16is7xx: Add bindings documentation for EXAR XR20M1172 UART Konstantin
2024-04-18 13:47 ` Vladimir Zapolskiy
2024-04-18 13:25 ` [PATCH 3/3] serial: sc16is7xx: add support " Konstantin
2024-04-19 5:45 ` Jiri Slaby [this message]
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=5cee4da4-1620-449c-8160-ff4168b0688e@kernel.org \
--to=jirislaby@kernel.org \
--cc=andriy.shevchenko@linux.intel.com \
--cc=gregkh@linuxfoundation.org \
--cc=hvilleneuve@dimonoff.com \
--cc=ilpo.jarvinen@linux.intel.com \
--cc=lech.perczak@camlingroup.com \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-serial@vger.kernel.org \
--cc=ria.freelander@gmail.com \
--cc=rilian.la.te@ya.ru \
--cc=tglx@linutronix.de \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for read-only IMAP folder(s) and NNTP newsgroup(s).