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From: "André Draszik" <andre.draszik@linaro.org>
To: Vinod Koul <vkoul@kernel.org>,
	 Kishon Vijay Abraham I <kishon@kernel.org>,
	Rob Herring <robh@kernel.org>,
	 Krzysztof Kozlowski <krzk+dt@kernel.org>,
	 Conor Dooley <conor+dt@kernel.org>,
	 Peter Griffin <peter.griffin@linaro.org>,
	 Marek Szyprowski <m.szyprowski@samsung.com>,
	 Sylwester Nawrocki <s.nawrocki@samsung.com>,
	 Alim Akhtar <alim.akhtar@samsung.com>,
	 Sam Protsenko <semen.protsenko@linaro.org>
Cc: "Krzysztof Kozlowski" <krzk@kernel.org>,
	"Tudor Ambarus" <tudor.ambarus@linaro.org>,
	"Will McVicker" <willmcvicker@google.com>,
	"Roy Luo" <royluo@google.com>,
	kernel-team@android.com, linux-phy@lists.infradead.org,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-samsung-soc@vger.kernel.org,
	"Krzysztof Kozlowski" <krzysztof.kozlowski@linaro.org>,
	"André Draszik" <andre.draszik@linaro.org>
Subject: [PATCH 1/7] dt-bindings: phy: samsung,usb3-drd-phy: add gs101 compatible
Date: Tue, 23 Apr 2024 18:06:03 +0100	[thread overview]
Message-ID: <20240423-usb-phy-gs101-v1-1-ebdcb3ac174d@linaro.org> (raw)
In-Reply-To: <20240423-usb-phy-gs101-v1-0-ebdcb3ac174d@linaro.org>

Add a dedicated google,gs101-usb31drd-phy compatible for Google Tensor
gs101 SoC.

It needs additional clocks enabled for register access, and additional
memory regions (PCS & PMA) are required for successful configuration.

Signed-off-by: André Draszik <andre.draszik@linaro.org>
---
 .../bindings/phy/samsung,usb3-drd-phy.yaml         | 78 +++++++++++++++++-----
 1 file changed, 61 insertions(+), 17 deletions(-)

diff --git a/Documentation/devicetree/bindings/phy/samsung,usb3-drd-phy.yaml b/Documentation/devicetree/bindings/phy/samsung,usb3-drd-phy.yaml
index 452e584d9812..db1dc4c60b72 100644
--- a/Documentation/devicetree/bindings/phy/samsung,usb3-drd-phy.yaml
+++ b/Documentation/devicetree/bindings/phy/samsung,usb3-drd-phy.yaml
@@ -25,6 +25,7 @@ description: |
 properties:
   compatible:
     enum:
+      - google,gs101-usb31drd-phy
       - samsung,exynos5250-usbdrd-phy
       - samsung,exynos5420-usbdrd-phy
       - samsung,exynos5433-usbdrd-phy
@@ -57,7 +58,18 @@ properties:
       the OF graph bindings specified.
 
   reg:
-    maxItems: 1
+    minItems: 1
+    items:
+      - description: PHY register base address.
+      - description: PCS register base address.
+      - description: PMA register base address.
+
+  reg-names:
+    minItems: 1
+    items:
+      - const: phy
+      - const: pcs
+      - const: pma
 
   samsung,pmu-syscon:
     $ref: /schemas/types.yaml#/definitions/phandle
@@ -85,30 +97,62 @@ allOf:
       properties:
         compatible:
           contains:
-            enum:
-              - samsung,exynos5433-usbdrd-phy
-              - samsung,exynos7-usbdrd-phy
+            const: google,gs101-usb31drd-phy
     then:
       properties:
         clocks:
-          minItems: 5
-          maxItems: 5
-        clock-names:
           items:
-            - const: phy
-            - const: ref
-            - const: phy_utmi
-            - const: phy_pipe
-            - const: itp
-    else:
-      properties:
-        clocks:
-          minItems: 2
-          maxItems: 2
+            - description: Gate of main PHY clock
+            - description: Gate of PHY reference clock
+            - description: Gate of control interface AXI clock
+            - description: Gate of control interface APB clock
+            - description: Gate of SCL APB clock
         clock-names:
           items:
             - const: phy
             - const: ref
+            - const: ctrl_aclk
+            - const: ctrl_pclk
+            - const: scl_pclk
+        reg:
+          minItems: 3
+        reg-names:
+          minItems: 3
+      required:
+        - reg-names
+    else:
+      if:
+        properties:
+          compatible:
+            contains:
+              enum:
+                - samsung,exynos5433-usbdrd-phy
+                - samsung,exynos7-usbdrd-phy
+      then:
+        properties:
+          clocks:
+            minItems: 5
+            maxItems: 5
+          clock-names:
+            items:
+              - const: phy
+              - const: ref
+              - const: phy_utmi
+              - const: phy_pipe
+              - const: itp
+          reg:
+            maxItems: 1
+      else:
+        properties:
+          clocks:
+            minItems: 2
+            maxItems: 2
+          clock-names:
+            items:
+              - const: phy
+              - const: ref
+          reg:
+            maxItems: 1
 
 additionalProperties: false
 

-- 
2.44.0.769.g3c40516874-goog


  reply	other threads:[~2024-04-23 17:06 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-04-23 17:06 [PATCH 0/7] USB31DRD phy support for Google Tensor gs101 (HS & SS) André Draszik
2024-04-23 17:06 ` André Draszik [this message]
2024-04-24 19:43   ` [PATCH 1/7] dt-bindings: phy: samsung,usb3-drd-phy: add gs101 compatible Rob Herring
2024-04-23 17:06 ` [PATCH 2/7] phy: exynos5-usbdrd: use exynos_get_pmu_regmap_by_phandle() for PMU regs André Draszik
2024-04-25  7:47   ` Krzysztof Kozlowski
2024-04-25 10:02     ` Peter Griffin
2024-04-25 10:16       ` Krzysztof Kozlowski
2024-04-23 17:06 ` [PATCH 3/7] phy: exynos5-usbdrd: support isolating HS and SS ports independently André Draszik
2024-04-23 17:06 ` [PATCH 4/7] phy: exynos5-usbdrd: set ref clk freq in exynos850_usbdrd_utmi_init() André Draszik
2024-04-24  5:03   ` kernel test robot
2024-04-24  7:41   ` kernel test robot
2024-04-23 17:06 ` [PATCH 5/7] phy: exynos5-usbdrd: uniform order of register bit macros André Draszik
2024-04-23 17:06 ` [PATCH 6/7] phy: exynos5-usbdrd: convert to clk_bulk for phy (register) access André Draszik
2024-04-23 17:06 ` [PATCH 7/7] phy: exynos5-usbdrd: support Exynos USBDRD 3.1 combo phy (HS & SS) André Draszik
2024-04-24  5:55   ` kernel test robot

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